From patchwork Wed Nov 13 22:12:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 11242795 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6FBD21390 for ; Wed, 13 Nov 2019 22:16:52 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2F446206E3 for ; Wed, 13 Nov 2019 22:16:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Q2QvVQrw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2F446206E3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=jms.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51720 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iV0wT-0003i2-MI for patchwork-qemu-devel@patchwork.kernel.org; Wed, 13 Nov 2019 17:16:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34696) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iV0t6-0001l0-Dn for qemu-devel@nongnu.org; Wed, 13 Nov 2019 17:13:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iV0t5-00014z-Dn for qemu-devel@nongnu.org; Wed, 13 Nov 2019 17:13:20 -0500 Received: from mail-pf1-x441.google.com ([2607:f8b0:4864:20::441]:36012) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iV0t3-00010S-3O; Wed, 13 Nov 2019 17:13:17 -0500 Received: by mail-pf1-x441.google.com with SMTP id b19so2609593pfd.3; Wed, 13 Nov 2019 14:13:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rndpeHxbj/C4hJGnw+1eeHlSftg7rDiNlHx9DUUhsi4=; b=Q2QvVQrwr9Y3i0kbVP9b8obuulJ3ApAcpv9Ah5q8l7T/dGYWdytdIGMw5bmf1BFeTK wRS7bWxxual+nURxenc8DRDmfKIoUI/Ne7IvxhXLF3n9mC6EdGUM7qZ+EARwCRRCWL43 HQje+51Rmrz87LooE+hDqVZbT/NQY3NgpK9XtSXYWyWF9tnr0dqYsF4AkMQh4knGxPEL bIkt41rh2m6MCNEiN5MJcWLVBwEPNBA7RMfrLbZlAj1bk7ZHu71XHDANajRhazl0W9Sy Jx036vQ8eEYauPjzybjMyUknqb+sPYUe+b7hl0mJidNlfwLJoAKXC6+UIRc2hgCF0ZFA wSmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=rndpeHxbj/C4hJGnw+1eeHlSftg7rDiNlHx9DUUhsi4=; b=m2Gwe4bddRfj1/1PSaFG1eVFa/aGWy3gj77L0v6z7LPTxKDh3/Q1cjTBU0fx6DRqaE E1WVCaWF7G612bqr606U9+4mN6v3ZIuQ9YcvHovVnGE4vHa17zoxVZpSc8kFjHlxydCy YNWoPTUCOkyvrrVjiOfUOOZpMX2jv4+/CeWkNJExIZual04b2J/FaKfYon6M6KAV8AGr jj0cLloaDZDzSInacfiXwS3Ac+aMxmmvc9CBmMBS4QKbAq7wN3DDh29B8w/OxnQuHeft gLl6GMs9eoRVP16W4l4F4xRiLaWzqy3rLvrnm3+4Zcma/XZUmfo1qOnMNxboyd6EbjjO z83w== X-Gm-Message-State: APjAAAUtvG4JxT9bDAzyqiisl8oBlIhdQSAPHXgsexEEMmxTCfzEt7x+ kLHghDVOFLUDOwjEnDUDx14= X-Google-Smtp-Source: APXvYqzakeii9HBttyGDQRJTQdroyE9HlIG2xOy74QGnsDrejzKqXTyH/Yu3FE2tDAlOvlHnxstEgA== X-Received: by 2002:a17:90a:b28c:: with SMTP id c12mr5739070pjr.22.1573683195848; Wed, 13 Nov 2019 14:13:15 -0800 (PST) Received: from voyager.lan ([45.124.203.14]) by smtp.gmail.com with ESMTPSA id w69sm5252005pfc.164.2019.11.13.14.13.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2019 14:13:15 -0800 (PST) From: Joel Stanley To: Peter Maydell , =?utf-8?q?C=C3=A9dric_Le_Goate?= =?utf-8?q?r?= Subject: [PATCH v3 1/4] aspeed/sdmc: Make ast2600 default 1G Date: Thu, 14 Nov 2019 08:42:58 +1030 Message-Id: <20191113221301.8768-2-joel@jms.id.au> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191113221301.8768-1-joel@jms.id.au> References: <20191113221301.8768-1-joel@jms.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, =?utf-8?q?Alex_Be?= =?utf-8?q?nn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Most boards have this much. Reviewed-by: Cédric Le Goater Reviewed-by: Alex Bennée Signed-off-by: Joel Stanley --- hw/misc/aspeed_sdmc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index f3a63a2e01db..2df3244b53c8 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -208,10 +208,10 @@ static int ast2600_rambits(AspeedSDMCState *s) } /* use a common default */ - warn_report("Invalid RAM size 0x%" PRIx64 ". Using default 512M", + warn_report("Invalid RAM size 0x%" PRIx64 ". Using default 1024M", s->ram_size); - s->ram_size = 512 << 20; - return ASPEED_SDMC_AST2600_512MB; + s->ram_size = 1024 << 20; + return ASPEED_SDMC_AST2600_1024MB; } static void aspeed_sdmc_reset(DeviceState *dev) From patchwork Wed Nov 13 22:12:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 11242791 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F9E613BD for ; Wed, 13 Nov 2019 22:16:00 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F326B206E3 for ; Wed, 13 Nov 2019 22:15:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="f3yHZL6i" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F326B206E3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=jms.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51716 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iV0vd-0003Wy-Ps for patchwork-qemu-devel@patchwork.kernel.org; Wed, 13 Nov 2019 17:15:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34843) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iV0tC-0001oO-VP for qemu-devel@nongnu.org; Wed, 13 Nov 2019 17:13:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iV0tB-0001Du-LK for qemu-devel@nongnu.org; Wed, 13 Nov 2019 17:13:26 -0500 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:34726) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iV0t7-00016P-V1; Wed, 13 Nov 2019 17:13:22 -0500 Received: by mail-pg1-x543.google.com with SMTP id z188so2264213pgb.1; Wed, 13 Nov 2019 14:13:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=thDO08iuJthlIoDRnaZrctxgEQ0GtnTwsT4oxGR+A5g=; b=f3yHZL6i3Bz8BDMXLZNwm6n9ggNx06bqe0BMu8NBTsvphxSlBtTrRur1Ck++FwZT8j 69dxTztU2y6r7D1Y8NUWPH1HcqRnRZ42LYJvjA3hhUFRB+GgIV05t3TxSLo0sNG8jovS 5Ud4mShPBZTm55SnDdJ9sekg6j9wvM1ra2JSF0p8a1EG9WGKNvAdQGb/16uzMswISDSl jYZjyiOgLL8Ccd1CZYLR7bNflKyZ7JpmO0oZsG9aqI6whHBqjL0JXPr2p29aptYJ78nf Jb7wTPIraZ9O9jyeBA5qodOHNHKl3E4J+4vLbBMFzj6OwxK1wbsQD8LmKSzNkuv6bIPe gBgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=thDO08iuJthlIoDRnaZrctxgEQ0GtnTwsT4oxGR+A5g=; b=MNOlZ+R2ZixT9tSKokhCdmZSF47AHmtakmjX04tftxq7yGu0USg914DeWymTIWAhAS yX3ZBxh1gmnQTYLfMePsriVrx3G3tzwOp+faOkSbVmuBK+WvpNr9Dc0WEZWiw6GDmegE Lup5cV9OJwjbDLHkWHITNR5ypA5AZlG1N7ktJ1m9DTGEbKvQ9zW1X2KAqs1OwWi1hr1M rfH69NtM3lkFxpv2h9CFhr+J7DcWKwEVU9PLIpogy4U3pu1MBNtDY04VMopWieywx3lL cMnaMHdSjJQfiGWjxYQoYJomKo+CHLMN+3sU0mgKmaUbCPPq597grtQw3Z78a4yDP0DL 7w0A== X-Gm-Message-State: APjAAAVB281uQes06ebYXCXgXnixOQLYbMnIMJJ8xllx7KReWtbRG33k WKnbAC23dKGed2PU8tib2miQKNlBjjY= X-Google-Smtp-Source: APXvYqz8d4rh92+HTJVxoMIitfjVp01ZwiF+WzZ8OQ9LhKCwmgwgy/MnxjpfaVKGkEn6N0uz60AAWw== X-Received: by 2002:a65:624e:: with SMTP id q14mr6221514pgv.277.1573683199705; Wed, 13 Nov 2019 14:13:19 -0800 (PST) Received: from voyager.lan ([45.124.203.14]) by smtp.gmail.com with ESMTPSA id w69sm5252005pfc.164.2019.11.13.14.13.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2019 14:13:19 -0800 (PST) From: Joel Stanley To: Peter Maydell , =?utf-8?q?C=C3=A9dric_Le_Goate?= =?utf-8?q?r?= Subject: [PATCH v3 2/4] aspeed/scu: Fix W1C behavior Date: Thu, 14 Nov 2019 08:42:59 +1030 Message-Id: <20191113221301.8768-3-joel@jms.id.au> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191113221301.8768-1-joel@jms.id.au> References: <20191113221301.8768-1-joel@jms.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, =?utf-8?q?Alex_Be?= =?utf-8?q?nn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" This models the clock write one to clear registers, and fixes up some incorrect behavior in all of the write to clear registers. There was also a typo in one of the register definitions. Reviewed-by: Cédric Le Goater Reviewed-by: Alex Bennée Signed-off-by: Joel Stanley --- v3: Beef up the comments --- hw/misc/aspeed_scu.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 717509bc5460..5518168e48b4 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -98,7 +98,7 @@ #define AST2600_CLK_STOP_CTRL TO_REG(0x80) #define AST2600_CLK_STOP_CTRL_CLR TO_REG(0x84) #define AST2600_CLK_STOP_CTRL2 TO_REG(0x90) -#define AST2600_CLK_STOP_CTR2L_CLR TO_REG(0x94) +#define AST2600_CLK_STOP_CTRL2_CLR TO_REG(0x94) #define AST2600_SDRAM_HANDSHAKE TO_REG(0x100) #define AST2600_HPLL_PARAM TO_REG(0x200) #define AST2600_HPLL_EXT TO_REG(0x204) @@ -532,11 +532,13 @@ static uint64_t aspeed_ast2600_scu_read(void *opaque, hwaddr offset, return s->regs[reg]; } -static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data, +static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data64, unsigned size) { AspeedSCUState *s = ASPEED_SCU(opaque); int reg = TO_REG(offset); + /* Truncate here so bitwise operations below behave as expected */ + uint32_t data = data64; if (reg >= ASPEED_AST2600_SCU_NR_REGS) { qemu_log_mask(LOG_GUEST_ERROR, @@ -563,15 +565,20 @@ static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data, /* fall through */ case AST2600_SYS_RST_CTRL: case AST2600_SYS_RST_CTRL2: + case AST2600_CLK_STOP_CTRL: + case AST2600_CLK_STOP_CTRL2: /* W1S (Write 1 to set) registers */ s->regs[reg] |= data; return; case AST2600_SYS_RST_CTRL_CLR: case AST2600_SYS_RST_CTRL2_CLR: + case AST2600_CLK_STOP_CTRL_CLR: + case AST2600_CLK_STOP_CTRL2_CLR: case AST2600_HW_STRAP1_CLR: case AST2600_HW_STRAP2_CLR: - /* W1C (Write 1 to clear) registers */ - s->regs[reg] &= ~data; + /* W1C (Write 1 to clear) registers are offset by one address from + * the data register */ + s->regs[reg - 1] &= ~data; return; case AST2600_RNG_DATA: From patchwork Wed Nov 13 22:13:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 11242799 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CAA391390 for ; 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Wed, 13 Nov 2019 14:13:23 -0800 (PST) From: Joel Stanley To: Peter Maydell , =?utf-8?q?C=C3=A9dric_Le_Goate?= =?utf-8?q?r?= Subject: [PATCH v3 3/4] watchdog/aspeed: Improve watchdog timeout message Date: Thu, 14 Nov 2019 08:43:00 +1030 Message-Id: <20191113221301.8768-4-joel@jms.id.au> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191113221301.8768-1-joel@jms.id.au> References: <20191113221301.8768-1-joel@jms.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, =?utf-8?q?Alex_Be?= =?utf-8?q?nn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Users benefit from knowing which watchdog timer has expired. The address of the watchdog's registers unambiguously indicates which has expired, so log that. Reviewed-by: Cédric Le Goater Reviewed-by: Alex Bennée Signed-off-by: Joel Stanley --- v2: Use HWADDR_PRIx v3: Fix spacing --- hw/watchdog/wdt_aspeed.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index 145be6f99ce2..d283d07d6546 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -219,7 +219,8 @@ static void aspeed_wdt_timer_expired(void *dev) return; } - qemu_log_mask(CPU_LOG_RESET, "Watchdog timer expired.\n"); + qemu_log_mask(CPU_LOG_RESET, "Watchdog timer %" HWADDR_PRIx " expired.\n", + s->iomem.addr); watchdog_perform_action(); timer_del(s->timer); } From patchwork Wed Nov 13 22:13:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 11242797 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A019913BD for ; Wed, 13 Nov 2019 22:22:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5B3CE206EE for ; Wed, 13 Nov 2019 22:22:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KSJ9+PCG" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5B3CE206EE Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=jms.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51750 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iV11x-0006cI-1M for patchwork-qemu-devel@patchwork.kernel.org; Wed, 13 Nov 2019 17:22:29 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34946) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iV0tN-0001sW-1T for qemu-devel@nongnu.org; Wed, 13 Nov 2019 17:13:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iV0tL-0001JV-0V for qemu-devel@nongnu.org; Wed, 13 Nov 2019 17:13:36 -0500 Received: from mail-pl1-x644.google.com ([2607:f8b0:4864:20::644]:34002) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iV0tE-0001G0-K8; Wed, 13 Nov 2019 17:13:28 -0500 Received: by mail-pl1-x644.google.com with SMTP id h13so1669042plr.1; Wed, 13 Nov 2019 14:13:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nAP5XJXdKxaozCcpOcXkIdrUjuBLz94yxW3NObWQlgM=; b=KSJ9+PCGE7qR0mmVCze0s+sM2HIzUzZ2VQXrgmI8YGkl/K4jObRNkEgMXQtLXIA+Em KlMRApyxFOkwr4yu5kGYDWmpyo0dbdy8+CHRemXlSryWMjZ09U5u5gAHEIitcquv1MIN JuwRPSJ9nHFy5ex1eyftCtooJJlrHd1sj2bNlkJqWSxnQrwLeMynca1jiClM6zFOVID2 +xCwxza1ArFXBpnKM2FHL3OnyNjDI7k5PldE2ncsRgiy2RVNFHYoSufKannhIRQLVvyQ PK/TVgdK1Acg0veLH0X5KmMgJlpW947o7cSXJTbNun8vKfLxdYhj8mLlLOqYI9sezHFa u+Mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=nAP5XJXdKxaozCcpOcXkIdrUjuBLz94yxW3NObWQlgM=; b=AGYUWAGmYHAXxuvayhb/ZAnVMOBV2WPTvaII6CcwQ87Gd54WTVW/ZT8W3TJL42HxcA Ag66WoXGTl3a+9PDudwixlxsqHt7U0jgoiP47c4xc/W/xZkEbCiq8IPQN1c6RAFyN2nM NCob1XPopzrkM8UKxSlvanWqUqBxGKyqYoL4sPFOe5Woi02UyqfZ7tff0a69dHi0Hq9U Wz9JRCzPuRr/JFa9DbezQBnPB+mNd5lQ/EKVLe8fD4oufvRnWqe4RnQN7h5OT5nvaBov Nf8XAiAbW/zrFXxV6pda/9qYBxBZ97KtwjLVa4258EvGeoABO2ioA+RuNe7VJaD9Q6Ug 65/Q== X-Gm-Message-State: APjAAAV0W9zZBeCv/13A48HF+DBCLyf7oBoRHzoGRPHSs9UQ2uJXJD6A +aF4QMKGTNzC1Sj+0m51xOE= X-Google-Smtp-Source: APXvYqzo/DKt23zo8dF8lERxUeqD/tcuTpx2OEFK+kMK+mysqvj4EWbNODKUa6HiksH032g2CRAqpw== X-Received: by 2002:a17:902:6f01:: with SMTP id w1mr6355065plk.35.1573683207515; Wed, 13 Nov 2019 14:13:27 -0800 (PST) Received: from voyager.lan ([45.124.203.14]) by smtp.gmail.com with ESMTPSA id w69sm5252005pfc.164.2019.11.13.14.13.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2019 14:13:27 -0800 (PST) From: Joel Stanley To: Peter Maydell , =?utf-8?q?C=C3=A9dric_Le_Goate?= =?utf-8?q?r?= Subject: [PATCH v3 4/4] watchdog/aspeed: Fix AST2600 frequency behaviour Date: Thu, 14 Nov 2019 08:43:01 +1030 Message-Id: <20191113221301.8768-5-joel@jms.id.au> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191113221301.8768-1-joel@jms.id.au> References: <20191113221301.8768-1-joel@jms.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, =?utf-8?q?Alex_Be?= =?utf-8?q?nn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The AST2600 control register sneakily changed the meaning of bit 4 without anyone noticing. It no longer controls the 1MHz vs APB clock select, and instead always runs at 1MHz. The AST2500 was always 1MHz too, but it retained bit 4, making it read only. We can model both using the same fixed 1MHz calculation. Fixes: 6b2b2a703cad ("hw: wdt_aspeed: Add AST2600 support") Reviewed-by: Cédric Le Goater Reviewed-by: Alex Bennée Signed-off-by: Joel Stanley --- v2: Fix Fixes line in commit message --- hw/watchdog/wdt_aspeed.c | 21 +++++++++++++++++---- include/hw/watchdog/wdt_aspeed.h | 1 + 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index d283d07d6546..122aa8daaadf 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -93,11 +93,11 @@ static uint64_t aspeed_wdt_read(void *opaque, hwaddr offset, unsigned size) } -static void aspeed_wdt_reload(AspeedWDTState *s, bool pclk) +static void aspeed_wdt_reload(AspeedWDTState *s) { uint64_t reload; - if (pclk) { + if (!(s->regs[WDT_CTRL] & WDT_CTRL_1MHZ_CLK)) { reload = muldiv64(s->regs[WDT_RELOAD_VALUE], NANOSECONDS_PER_SECOND, s->pclk_freq); } else { @@ -109,6 +109,16 @@ static void aspeed_wdt_reload(AspeedWDTState *s, bool pclk) } } +static void aspeed_wdt_reload_1mhz(AspeedWDTState *s) +{ + uint64_t reload = s->regs[WDT_RELOAD_VALUE] * 1000ULL; + + if (aspeed_wdt_is_enabled(s)) { + timer_mod(s->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + reload); + } +} + + static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data, unsigned size) { @@ -130,13 +140,13 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data, case WDT_RESTART: if ((data & 0xFFFF) == WDT_RESTART_MAGIC) { s->regs[WDT_STATUS] = s->regs[WDT_RELOAD_VALUE]; - aspeed_wdt_reload(s, !(s->regs[WDT_CTRL] & WDT_CTRL_1MHZ_CLK)); + awc->wdt_reload(s); } break; case WDT_CTRL: if (enable && !aspeed_wdt_is_enabled(s)) { s->regs[WDT_CTRL] = data; - aspeed_wdt_reload(s, !(data & WDT_CTRL_1MHZ_CLK)); + awc->wdt_reload(s); } else if (!enable && aspeed_wdt_is_enabled(s)) { s->regs[WDT_CTRL] = data; timer_del(s->timer); @@ -283,6 +293,7 @@ static void aspeed_2400_wdt_class_init(ObjectClass *klass, void *data) awc->offset = 0x20; awc->ext_pulse_width_mask = 0xff; awc->reset_ctrl_reg = SCU_RESET_CONTROL1; + awc->wdt_reload = aspeed_wdt_reload; } static const TypeInfo aspeed_2400_wdt_info = { @@ -317,6 +328,7 @@ static void aspeed_2500_wdt_class_init(ObjectClass *klass, void *data) awc->ext_pulse_width_mask = 0xfffff; awc->reset_ctrl_reg = SCU_RESET_CONTROL1; awc->reset_pulse = aspeed_2500_wdt_reset_pulse; + awc->wdt_reload = aspeed_wdt_reload_1mhz; } static const TypeInfo aspeed_2500_wdt_info = { @@ -336,6 +348,7 @@ static void aspeed_2600_wdt_class_init(ObjectClass *klass, void *data) awc->ext_pulse_width_mask = 0xfffff; /* TODO */ awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1; awc->reset_pulse = aspeed_2500_wdt_reset_pulse; + awc->wdt_reload = aspeed_wdt_reload_1mhz; } static const TypeInfo aspeed_2600_wdt_info = { diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h index dfedd7662dd1..819c22993a6e 100644 --- a/include/hw/watchdog/wdt_aspeed.h +++ b/include/hw/watchdog/wdt_aspeed.h @@ -47,6 +47,7 @@ typedef struct AspeedWDTClass { uint32_t ext_pulse_width_mask; uint32_t reset_ctrl_reg; void (*reset_pulse)(AspeedWDTState *s, uint32_t property); + void (*wdt_reload)(AspeedWDTState *s); } AspeedWDTClass; #endif /* WDT_ASPEED_H */