From patchwork Thu Nov 14 21:59:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kars de Jong X-Patchwork-Id: 11244523 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1294613BD for ; Thu, 14 Nov 2019 22:00:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F1F9F206E6 for ; Thu, 14 Nov 2019 22:00:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726977AbfKNWAP (ORCPT ); Thu, 14 Nov 2019 17:00:15 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:37167 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726613AbfKNWAP (ORCPT ); Thu, 14 Nov 2019 17:00:15 -0500 Received: by mail-wm1-f67.google.com with SMTP id b17so8027471wmj.2; Thu, 14 Nov 2019 14:00:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KCp04SO08u0mriK7qTV+FETiFzUDNrc3ZT4Yx/eQ8E0=; b=bkwKD/mLPvlAvyvc3xjlW3xx/ozL/qM3YaQWKOHLgL0eANSSghq0wCbWtAiW53a9VN NKjB8q53gtH/lwXN5Ztfvqa+x0zwzDKT2ZP/vD5wRVgzOFfwPXt6Ydq8al/rsgIVZKcD ceDYtOdCnnr+Ggi4GQkIKjqlwdSQYZIjP3OeRz/fP84LuTaFHjbtlXghRsP4OdDduXIA lC5+8zBNrjwbxRrFKt1aoGB3BiATbk58QWrki6xoCp0yd4oAi/mSxz2bMJ1FJTa7goqB 69smGi8e4R5RbuMJwJYF04vxdGPWStN6aghFUGPchpfw6ppNp72pHFeRmQ/ZbFVusKMU DC5A== X-Gm-Message-State: APjAAAXwqyBf0w9CqdTEkfQfLoXwJ7+rDq57Yu1D3mhBHsQWB96WdO0r rU1j4yAhP3pF5b9kltnFPCs= X-Google-Smtp-Source: APXvYqyUYLr90vakhVt9iJUErgMhgn2uIaVAQDI3j9S0d0+QxRdqGsZrqDHmgyKtuzOIephZ9KUL1g== X-Received: by 2002:a05:600c:21d9:: with SMTP id x25mr11483090wmj.50.1573768812968; Thu, 14 Nov 2019 14:00:12 -0800 (PST) Received: from localhost.localdomain (2001-1c06-18c6-e000-0cda-4949-05a4-23b4.cable.dynamic.v6.ziggo.nl. [2001:1c06:18c6:e000:cda:4949:5a4:23b4]) by smtp.gmail.com with ESMTPSA id x11sm8764771wro.84.2019.11.14.14.00.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2019 14:00:12 -0800 (PST) From: Kars de Jong To: "James E.J. Bottomley" , "Martin K. Petersen" , Hannes Reinecke Cc: linux-scsi@vger.kernel.org, linux-m68k@vger.kernel.org, schmitzmic@gmail.com, fthain@telegraphics.com.au, Kars de Jong Subject: [PATCH 1/2] esp_scsi: Correct ordering of PCSCSI definition in esp_rev enum Date: Thu, 14 Nov 2019 22:59:54 +0100 Message-Id: <20191114215956.21767-2-jongk@linux-m68k.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191114215956.21767-1-jongk@linux-m68k.org> References: <20191112185710.23988-1-jongk@linux-m68k.org> <20191114215956.21767-1-jongk@linux-m68k.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The order of the definitions in the esp_rev enum is important. The values are used in comparisons for chip features. Add a comment to the enum explaining this. Also, the actual values for the enum fields are irrelevant, so remove the explicit values (suggested by Geert Uytterhoeven). This makes adding a new field in the middle of the enum easier. Finally, move the PCSCSI definition to the right place in the enum. In its previous location, at the end of the enum, the wrong values are written to the CONFIG3 register when used with FAST-SCSI targets. Signed-off-by: Kars de Jong --- drivers/scsi/esp_scsi.c | 2 +- drivers/scsi/esp_scsi.h | 17 +++++++++-------- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c index bb88995a12c7..4fc3eee3138b 100644 --- a/drivers/scsi/esp_scsi.c +++ b/drivers/scsi/esp_scsi.c @@ -2373,10 +2373,10 @@ static const char *esp_chip_names[] = { "ESP100A", "ESP236", "FAS236", + "AM53C974", "FAS100A", "FAST", "FASHME", - "AM53C974", }; static struct scsi_transport_template *esp_transport_template; diff --git a/drivers/scsi/esp_scsi.h b/drivers/scsi/esp_scsi.h index 91b32f2a1a1b..f764d64e1f25 100644 --- a/drivers/scsi/esp_scsi.h +++ b/drivers/scsi/esp_scsi.h @@ -257,15 +257,16 @@ struct esp_cmd_priv { }; #define ESP_CMD_PRIV(CMD) ((struct esp_cmd_priv *)(&(CMD)->SCp)) +/* NOTE: this enum is ordered based on chip features! */ enum esp_rev { - ESP100 = 0x00, /* NCR53C90 - very broken */ - ESP100A = 0x01, /* NCR53C90A */ - ESP236 = 0x02, - FAS236 = 0x03, - FAS100A = 0x04, - FAST = 0x05, - FASHME = 0x06, - PCSCSI = 0x07, /* AM53c974 */ + ESP100, /* NCR53C90 - very broken */ + ESP100A, /* NCR53C90A */ + ESP236, + FAS236, + PCSCSI, /* AM53c974 */ + FAS100A, + FAST, + FASHME, }; struct esp_cmd_entry { From patchwork Thu Nov 14 21:59:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kars de Jong X-Patchwork-Id: 11244525 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 751D01393 for ; Thu, 14 Nov 2019 22:00:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 601A6206CB for ; Thu, 14 Nov 2019 22:00:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727020AbfKNWAW (ORCPT ); Thu, 14 Nov 2019 17:00:22 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:44037 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726613AbfKNWAV (ORCPT ); Thu, 14 Nov 2019 17:00:21 -0500 Received: by mail-wr1-f66.google.com with SMTP id f2so8564595wrs.11; Thu, 14 Nov 2019 14:00:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Hrl0VhjMq3hbLdl2Wl73aiSbu+ELz+H+EwNAdixffwM=; b=k+4kfa/l3UN7b+wVSfzoIOEasQHbUk3TJZfn1jrbZhZN6pULHzQ3Q60A7Uwgn6M00Y eRE0PhCmwSaRrMnh8kAB1Mzg8C992LHSgyEq6cnJe94jug1kpTYsbzU8xsgTdMtHY3qI WgALgGe52KKhdKKn+AeVK/RtL0whYAFhpMbKx8Hz/nb4u6GYIMgwGpziogGnoRehT9uJ D72SvV9ar7isv2rHBdfiJz+BvXuv1dFWrlxf2xBm3wvYVYVibsr92xASkaknUQPH8Cr0 RFSKYPW0PQu6aqvdzNnN2VVdz26r+VhsGoKWDxJe40NebFwQYitBHmTw++BkmuMAmHDa 7aKA== X-Gm-Message-State: APjAAAXXoAE6Daxc+SJPcxR+5rOFEdnpz/1vaJw3dGoS69QiqOsvgcKV DHHNCJHSmVysncEijKJQzI0= X-Google-Smtp-Source: APXvYqylLVhAZNqe7+JkLIUwddmHsTyHl6FkOumHoE8i2I9Fpn/OFVoSpJ114sn1BekEBOGNZCCHrQ== X-Received: by 2002:adf:e505:: with SMTP id j5mr8916085wrm.46.1573768817088; Thu, 14 Nov 2019 14:00:17 -0800 (PST) Received: from localhost.localdomain (2001-1c06-18c6-e000-0cda-4949-05a4-23b4.cable.dynamic.v6.ziggo.nl. [2001:1c06:18c6:e000:cda:4949:5a4:23b4]) by smtp.gmail.com with ESMTPSA id x11sm8764771wro.84.2019.11.14.14.00.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2019 14:00:16 -0800 (PST) From: Kars de Jong To: "James E.J. Bottomley" , "Martin K. Petersen" , Hannes Reinecke Cc: linux-scsi@vger.kernel.org, linux-m68k@vger.kernel.org, schmitzmic@gmail.com, fthain@telegraphics.com.au, Kars de Jong Subject: [PATCH 2/2] esp_scsi: Add support for FSC chip Date: Thu, 14 Nov 2019 22:59:55 +0100 Message-Id: <20191114215956.21767-3-jongk@linux-m68k.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191114215956.21767-1-jongk@linux-m68k.org> References: <20191112185710.23988-1-jongk@linux-m68k.org> <20191114215956.21767-1-jongk@linux-m68k.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The FSC (NCR53CF9x-2 / SYM53CF9x-2) has a different family code than QLogic or Emulex parts. This caused it to be detected as a FAS100A. Unforunately, this meant the configuration of the CONFIG3 register was incorrect. This causes data transfer issues with FAST-SCSI targets. The FSC also has the CONFIG4 register. It can be used to enable a feature called Active Negation which should always be enabled according to the data manual. Signed-off-by: Kars de Jong --- drivers/scsi/esp_scsi.c | 19 ++++++++++++------- drivers/scsi/esp_scsi.h | 28 ++++++++++++++++++++-------- 2 files changed, 32 insertions(+), 15 deletions(-) diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c index 4fc3eee3138b..e887ea3e514a 100644 --- a/drivers/scsi/esp_scsi.c +++ b/drivers/scsi/esp_scsi.c @@ -243,7 +243,7 @@ static void esp_set_all_config3(struct esp *esp, u8 val) /* Reset the ESP chip, _not_ the SCSI bus. */ static void esp_reset_esp(struct esp *esp) { - u8 family_code, version; + u8 family_code; /* Now reset the ESP chip */ scsi_esp_cmd(esp, ESP_CMD_RC); @@ -257,13 +257,16 @@ static void esp_reset_esp(struct esp *esp) */ esp->max_period = ((35 * esp->ccycle) / 1000); if (esp->rev == FAST) { - version = esp_read8(ESP_UID); - family_code = (version & 0xf8) >> 3; - if (family_code == 0x02) + family_code = ESP_FAMILY(esp_read8(ESP_UID)); + if (family_code == ESP_UID_F236) esp->rev = FAS236; - else if (family_code == 0x0a) + else if (family_code == ESP_UID_HME) esp->rev = FASHME; /* Version is usually '5'. */ - else + else if (family_code == ESP_UID_FSC) { + esp->rev = FSC; + /* Enable Active Negation */ + esp_write8(ESP_CONFIG4_RADE, ESP_CFG4); + } else esp->rev = FAS100A; esp->min_period = ((4 * esp->ccycle) / 1000); } else { @@ -308,7 +311,8 @@ static void esp_reset_esp(struct esp *esp) case FAS236: case PCSCSI: - /* Fast 236, AM53c974 or HME */ + case FSC: + /* Fast 236, AM53c974, FSC or HME */ esp_write8(esp->config2, ESP_CFG2); if (esp->rev == FASHME) { u8 cfg3 = esp->target[0].esp_config3; @@ -2374,6 +2378,7 @@ static const char *esp_chip_names[] = { "ESP236", "FAS236", "AM53C974", + "FSC", "FAS100A", "FAST", "FASHME", diff --git a/drivers/scsi/esp_scsi.h b/drivers/scsi/esp_scsi.h index f764d64e1f25..60de32d17d6a 100644 --- a/drivers/scsi/esp_scsi.h +++ b/drivers/scsi/esp_scsi.h @@ -78,12 +78,14 @@ #define ESP_CONFIG3_IMS 0x80 /* ID msg chk'ng (esp/fas236) */ #define ESP_CONFIG3_OBPUSH 0x80 /* Push odd-byte to dma (hme) */ -/* ESP config register 4 read-write, found only on am53c974 chips */ -#define ESP_CONFIG4_RADE 0x04 /* Active negation */ -#define ESP_CONFIG4_RAE 0x08 /* Active negation on REQ and ACK */ -#define ESP_CONFIG4_PWD 0x20 /* Reduced power feature */ -#define ESP_CONFIG4_GE0 0x40 /* Glitch eater bit 0 */ -#define ESP_CONFIG4_GE1 0x80 /* Glitch eater bit 1 */ +/* ESP config register 4 read-write, found on am53c974 and FSC chips */ +#define ESP_CONFIG4_BBTE 0x01 /* Back-to-back transfers (fsc) */ +#define ESP_CONGIG4_TEST 0x02 /* Transfer counter test mode (fsc) */ +#define ESP_CONFIG4_RADE 0x04 /* Active negation (am53c974/fsc) */ +#define ESP_CONFIG4_RAE 0x08 /* Act. negation REQ/ACK (am53c974) */ +#define ESP_CONFIG4_PWD 0x20 /* Reduced power feature (am53c974) */ +#define ESP_CONFIG4_GE0 0x40 /* Glitch eater bit 0 (am53c974) */ +#define ESP_CONFIG4_GE1 0x80 /* Glitch eater bit 1 (am53c974) */ #define ESP_CONFIG_GE_12NS (0) #define ESP_CONFIG_GE_25NS (ESP_CONFIG_GE1) @@ -209,10 +211,15 @@ #define ESP_TEST_TS 0x04 /* Tristate test mode */ /* ESP unique ID register read-only, found on fas236+fas100a only */ +#define ESP_UID_FAM 0xf8 /* ESP family bitmask */ + +#define ESP_FAMILY(uid) (((uid) & ESP_UID_FAM) >> 3) + +/* Values for the ESP family bits */ #define ESP_UID_F100A 0x00 /* ESP FAS100A */ #define ESP_UID_F236 0x02 /* ESP FAS236 */ -#define ESP_UID_REV 0x07 /* ESP revision */ -#define ESP_UID_FAM 0xf8 /* ESP family */ +#define ESP_UID_HME 0x0a /* FAS HME */ +#define ESP_UID_FSC 0x14 /* NCR/Symbios Logic FSC */ /* ESP fifo flags register read-only */ /* Note that the following implies a 16 byte FIFO on the ESP. */ @@ -264,6 +271,11 @@ enum esp_rev { ESP236, FAS236, PCSCSI, /* AM53c974 */ +<<<<<<< HEAD +======= + FSC, /* NCR/Symbios Logic FSC */ + /* Chips below this line use ESP_CONFIG3_FAST to enable FAST SCSI */ +>>>>>>> fb55f6c862d7... esp_scsi: Add support for FSC chip FAS100A, FAST, FASHME,