From patchwork Wed Nov 20 17:36:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Summers, Stuart" X-Patchwork-Id: 11254555 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D87C114ED for ; Wed, 20 Nov 2019 17:35:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C095220895 for ; Wed, 20 Nov 2019 17:35:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C095220895 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 545BA6EA89; Wed, 20 Nov 2019 17:35:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5B6766EA89 for ; Wed, 20 Nov 2019 17:35:44 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Nov 2019 09:35:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,222,1571727600"; d="scan'208";a="237821205" Received: from jssummer-xeon.ra.intel.com ([10.23.184.90]) by fmsmga002.fm.intel.com with ESMTP; 20 Nov 2019 09:35:43 -0800 From: Stuart Summers To: intel-gfx@lists.freedesktop.org Date: Wed, 20 Nov 2019 09:36:42 -0800 Message-Id: <20191120173642.70109-1-stuart.summers@intel.com> X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Extend reset modparam to domain resets X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In the event a platform does not properly implement reset, do not go through reset flows for engine domains to avoid an unlikely situation where writes are accepted but register values are never cleared, as this can result in GPU wedges in these cases. Signed-off-by: Stuart Summers --- drivers/gpu/drm/i915/gt/intel_reset.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c index 0388f9375366..0454e01e063c 100644 --- a/drivers/gpu/drm/i915/gt/intel_reset.c +++ b/drivers/gpu/drm/i915/gt/intel_reset.c @@ -270,6 +270,12 @@ static int gen6_hw_domain_reset(struct intel_gt *gt, u32 hw_domain_mask) struct intel_uncore *uncore = gt->uncore; int err; + if (!i915_modparams.reset) { + DRM_DEBUG_DRIVER("Skipping 0x%08x engines reset\n", + hw_domain_mask); + return 0; + } + /* * GEN6_GDRST is not in the gt power well, no need to check * for fifo space for the write or forcewake the chip for @@ -494,6 +500,13 @@ static int gen8_engine_reset_prepare(struct intel_engine_cs *engine) return 0; } + if (!i915_modparams.reset) { + DRM_DEBUG_DRIVER("Skipping %s reset request {request: %08x, RESET_CTL: %08x}\n", + engine->name, request, + intel_uncore_read_fw(uncore, reg)); + return 0; + } + intel_uncore_write_fw(uncore, reg, _MASKED_BIT_ENABLE(request)); ret = __intel_wait_for_register_fw(uncore, reg, mask, ack, 700, 0, NULL);