From patchwork Thu Nov 21 20:14:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clint Taylor X-Patchwork-Id: 11256883 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4BF4D14C0 for ; Thu, 21 Nov 2019 20:15:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 329D52068F for ; Thu, 21 Nov 2019 20:15:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 329D52068F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B853899AB; Thu, 21 Nov 2019 20:15:02 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id CA55C899AB for ; Thu, 21 Nov 2019 20:15:01 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Nov 2019 12:14:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,227,1571727600"; d="scan'208";a="357910031" Received: from cataylo2-ubuntu18-10.jf.intel.com ([10.7.199.54]) by orsmga004.jf.intel.com with ESMTP; 21 Nov 2019 12:14:57 -0800 From: clinton.a.taylor@intel.com To: Intel-gfx@lists.freedesktop.org Date: Thu, 21 Nov 2019 12:14:55 -0800 Message-Id: <20191121201455.2558-1-clinton.a.taylor@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20191120234020.29887-1-clinton.a.taylor@intel.com> References: <20191120234020.29887-1-clinton.a.taylor@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3] drm/i915: Disable display interrupts during display IRQ handler X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Clint Taylor During the Display Interrupt Service routine the Display Interrupt Enable bit must be disabled, The interrupts handled, then the Display Interrupt Enable bit must be set to prevent possible missed interrupts. Bspec: 49212 V2: Change Title to remove SDE reference. V3: Fix TAB spacing. Cc: Lucas De Marchi Cc: Aditya Swarup Reviewed-by: Matt Roper Signed-off-by: Clint Taylor --- drivers/gpu/drm/i915/i915_irq.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index dae00f7dd7df..8b338744eddf 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2484,7 +2484,11 @@ __gen11_irq_handler(struct drm_i915_private * const i915, * GEN11_DISPLAY_INT_CTL has same format as GEN8_MASTER_IRQ * for the display related bits. */ + raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, 0x0); gen8_de_irq_handler(i915, disp_ctl); + raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, + GEN11_DISPLAY_IRQ_ENABLE); + enable_rpm_wakeref_asserts(&i915->runtime_pm); }