From patchwork Mon Nov 25 12:32:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260303 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A1D7A109A for ; Mon, 25 Nov 2019 12:32:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 825552085B for ; Mon, 25 Nov 2019 12:32:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Qv2ifQpT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727518AbfKYMcQ (ORCPT ); Mon, 25 Nov 2019 07:32:16 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:34892 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727464AbfKYMcQ (ORCPT ); Mon, 25 Nov 2019 07:32:16 -0500 Received: by mail-wr1-f68.google.com with SMTP id s5so17796266wrw.2; Mon, 25 Nov 2019 04:32:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Vm4lxT7DIRCaDo7VZPEDNhEMDj6D6gJ7QlAT92qzc0o=; b=Qv2ifQpTfQyLY+NsQAIW7s3uW5yZMHHp+AjNj/Aguu2n9swZoQZ+VcmlhVq/g6vKad 7fUUn+mM12VXPATCREYdq3H/cnutRsmMV+AaRJyh0K6vdxyA2kskSkoCRd9SV5+OW6An zY9G/8LcBfdxBxbMizCDe+NcRN+ZX9DBRiPDQsoU7UvECVs+xtNGUSQKGD/Q3jbDmKVB gtMEb0m/KCiqrw1vvaxdKQp8thvQ6B/k5AQkH6PoGytOW3H16Z9o8+h0iybHv7Vrb0B0 cLz2D5I109BmTSLyFNq0UaaQRm+DIRLv+DTuzi2WvN/Ul77UdQQWQ/ZQzduvOElEh52g bUnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Vm4lxT7DIRCaDo7VZPEDNhEMDj6D6gJ7QlAT92qzc0o=; b=tUXTj5TD52qbdT5riaAjgUK8nkUURK/OSefqASfuMsUbh8C6eatWKn3iLDi522/jrL OyL+ZQJfvSV77WYhs+ZEwnLzHBsRDJ/q/knel0n+/vSHBCU3OpBxqvT6FYkFrAEa9v4V m9ez/ExAIIflj8PWEII/1HTjsH2OMLRI0+FRkq/h7zllYpC5sFkgGXa2df3rgjgjyKjK dKD9sWCXz+DHgvvbiLbxCY96+TGUdlHKYbm5PCaUOuFM+HmqpyMmr62VKpr6scUxydIS pXEWyD/7+qQSOkFMfhYgXkg1AciEHmEQLWXYkI+COEQOpaka4Wp6dRsBYXVSRRWBzsqT Ewgw== X-Gm-Message-State: APjAAAWM46YOO0GbzFFklR5NhwzrWtN5hvEmb1k+VO2/i56M4QWWBjzr KzLsibbzKRQYqmoujkuucSM= X-Google-Smtp-Source: APXvYqw169kj38JIdtLw8AtEOV6yCSePMs+g3UWry8PXyMEEQfJLGNWskxt8XvP8Vb8exyf4xjin7A== X-Received: by 2002:adf:9cc9:: with SMTP id h9mr30161371wre.137.1574685134210; Mon, 25 Nov 2019 04:32:14 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id 72sm10630103wrl.73.2019.11.25.04.32.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:13 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 01/10] usb: host: xhci-tegra: Fix "tega" -> "tegra" typo Date: Mon, 25 Nov 2019 13:32:01 +0100 Message-Id: <20191125123210.1564323-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding The tegra_xusb_mbox_regs structure was misspelled tega_xusb_mbox_regs. Fortunately this was done consistently so it didn't cause any issues. Signed-off-by: Thierry Reding Reviewed-by: JC Kuo --- drivers/usb/host/xhci-tegra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index bf9065438320..aa1c4e5fd750 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -145,7 +145,7 @@ struct tegra_xusb_phy_type { unsigned int num; }; -struct tega_xusb_mbox_regs { +struct tegra_xusb_mbox_regs { u16 cmd; u16 data_in; u16 data_out; @@ -166,7 +166,7 @@ struct tegra_xusb_soc { } usb2, ulpi, hsic, usb3; } ports; - struct tega_xusb_mbox_regs mbox; + struct tegra_xusb_mbox_regs mbox; bool scale_ss_clock; bool has_ipfs; From patchwork Mon Nov 25 12:32:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260305 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E378C109A for ; Mon, 25 Nov 2019 12:32:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C398D2084D for ; Mon, 25 Nov 2019 12:32:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mR3LPOGz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727590AbfKYMcT (ORCPT ); Mon, 25 Nov 2019 07:32:19 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:44345 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727464AbfKYMcS (ORCPT ); Mon, 25 Nov 2019 07:32:18 -0500 Received: by mail-wr1-f65.google.com with SMTP id i12so17767665wrn.11; Mon, 25 Nov 2019 04:32:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r+qw/KtpSnFUlLnEiXkCoitlkbC2ot04gXVHUo3aq5g=; b=mR3LPOGzcP9HUCJ340ZXIZXULHUqvPJv9fFGr3xSzH2zRr2BQhJJ2nWwboFjz1O8V8 fR8jSM7gQMOEgRG/ChYwUYptRDZ8oe1JE+i+phPi8TnTP+sWQzhjilAMMm4v9fxmYAIz U0kLyg4Se5CILRcOxFehfG/e81M+4b48yFZF9ISGIKNgXIZAi+JJifAXYmgt0s+S0gIJ DMriYk16zxO2mx2Z+ccLTaVLEOrXf1G/gioq0mxgobLMGrVP+P2419YAlO+j3c0Gvo35 A4WTJww7GEa99eT3dRi0MwLHXuBoVx2cO0eZPohzbAW+DM2E9EuxJn2R5G8pMOI4r3pn weUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r+qw/KtpSnFUlLnEiXkCoitlkbC2ot04gXVHUo3aq5g=; b=D63L8AMiEPtaM+0gTSfb5c2hHzsN+SoFSdk9Su/Nd6yEa0quyiTafNGSuTTr5qWJ74 8lfVjlyGDCpTgcem5OevkYCmdpA6cyO22UgZLq++RjnXCbi6M5KxIz3AaaK+7lkXDDNh nbhYP1/fP/KbZdeiyFJeF23qhgcjp7u+NLTeKwK45eM3kIDx4CZI3hY+dHb1gWgRtlAv SzhUdd+dPVAP+4MSgN/Xui6cZxQLH1BVK3GKr3Vj2v3KOadBH0EsoADIYhCUekdu6Bpw 6+h3IJ3fSdq9PItyDOStVnWvjapasqXNBsJDIMKtUbXt9EAwjxfdbifsaXNopyxuv/IJ 6Hjg== X-Gm-Message-State: APjAAAXdRlAVCZe8AH6svHlq3IYkDXl52gJA1ddNOdCCA0rddg50aGiJ ljZhY/6R8XluHsVP1jk9PNM= X-Google-Smtp-Source: APXvYqwF7ZczL8SLi03RMHfGEv078O7+GKL3SxU5vw58+zwKgnT93M+WikQfmRAyV2X9haF6kBxF1w== X-Received: by 2002:adf:dc06:: with SMTP id t6mr32255757wri.378.1574685136182; Mon, 25 Nov 2019 04:32:16 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id e16sm7560107wme.35.2019.11.25.04.32.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:15 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 02/10] usb: host: xhci-tegra: Separate firmware request and load Date: Mon, 25 Nov 2019 13:32:02 +0100 Message-Id: <20191125123210.1564323-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding Subsequent patches for system suspend/resume support will need to reload the firmware on resume. Since the firmware remains in system memory, the driver doesn't need to reload it from the filesystem. However, the XUSB controller will be reset across suspend/resume, so it needs to load the firmware into its microcontroller on resume. Split the firmware request and the firmware load code into two separate functions so that the driver can reuse the firmware in system memory to reload the microcontroller on resume. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 40 ++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 10 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index aa1c4e5fd750..5cfd54862670 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -793,17 +793,10 @@ static int tegra_xusb_runtime_resume(struct device *dev) return err; } -static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) +static int tegra_xusb_request_firmware(struct tegra_xusb *tegra) { - unsigned int code_tag_blocks, code_size_blocks, code_blocks; struct tegra_xusb_fw_header *header; - struct device *dev = tegra->dev; const struct firmware *fw; - unsigned long timeout; - time64_t timestamp; - struct tm time; - u64 address; - u32 value; int err; err = request_firmware(&fw, tegra->soc->firmware, tegra->dev); @@ -828,6 +821,24 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) memcpy(tegra->fw.virt, fw->data, tegra->fw.size); release_firmware(fw); + return 0; +} + +static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) +{ + unsigned int code_tag_blocks, code_size_blocks, code_blocks; + struct tegra_xusb_fw_header *header; + struct xhci_cap_regs __iomem *cap; + struct xhci_op_regs __iomem *op; + struct device *dev = tegra->dev; + unsigned long timeout; + time64_t timestamp; + struct tm time; + u64 address; + u32 value; + + header = (struct tegra_xusb_fw_header *)tegra->fw.virt; + if (csb_readl(tegra, XUSB_CSB_MP_ILOAD_BASE_LO) != 0) { dev_info(dev, "Firmware already loaded, Falcon state %#x\n", csb_readl(tegra, XUSB_FALC_CPUCTL)); @@ -1208,10 +1219,16 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto put_rpm; } + err = tegra_xusb_request_firmware(tegra); + if (err < 0) { + dev_err(&pdev->dev, "failed to request firmware: %d\n", err); + goto disable_phy; + } + err = tegra_xusb_load_firmware(tegra); if (err < 0) { dev_err(&pdev->dev, "failed to load firmware: %d\n", err); - goto put_rpm; + goto free_firmware; } tegra->hcd->regs = tegra->regs; @@ -1221,7 +1238,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) err = usb_add_hcd(tegra->hcd, tegra->xhci_irq, IRQF_SHARED); if (err < 0) { dev_err(&pdev->dev, "failed to add USB HCD: %d\n", err); - goto put_rpm; + goto free_firmware; } device_wakeup_enable(tegra->hcd->self.controller); @@ -1281,6 +1298,9 @@ static int tegra_xusb_probe(struct platform_device *pdev) tegra_xusb_runtime_suspend(&pdev->dev); put_hcd: usb_put_hcd(tegra->hcd); +free_firmware: + dma_free_coherent(&pdev->dev, tegra->fw.size, tegra->fw.virt, + tegra->fw.phys); disable_phy: tegra_xusb_phy_disable(tegra); pm_runtime_disable(&pdev->dev); From patchwork Mon Nov 25 12:32:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260307 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2C1B1109A for ; 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[217.229.24.237]) by smtp.gmail.com with ESMTPSA id w13sm10160668wrm.8.2019.11.25.04.32.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:17 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 03/10] usb: host: xhci-tegra: Avoid a fixed duration sleep Date: Mon, 25 Nov 2019 13:32:03 +0100 Message-Id: <20191125123210.1564323-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding Do not use a fixed duration sleep to wait for the DMA controller to become ready. Instead, poll the L2IMEMOP_RESULT register for the VLD flag to determine when the XUSB controller's DMA master is ready. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 5cfd54862670..d15fd16168ae 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -101,6 +101,8 @@ #define L2IMEMOP_ACTION_SHIFT 24 #define L2IMEMOP_INVALIDATE_ALL (0x40 << L2IMEMOP_ACTION_SHIFT) #define L2IMEMOP_LOAD_LOCKED_RESULT (0x11 << L2IMEMOP_ACTION_SHIFT) +#define XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT 0x101a18 +#define L2IMEMOP_RESULT_VLD BIT(31) #define XUSB_CSB_MP_APMAP 0x10181c #define APMAP_BOOTPATH BIT(31) @@ -893,7 +895,22 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) csb_writel(tegra, 0, XUSB_FALC_DMACTL); - msleep(50); + /* wait for RESULT_VLD to get set */ + timeout = jiffies + msecs_to_jiffies(10); + + do { + value = csb_readl(tegra, XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT); + if (value & L2IMEMOP_RESULT_VLD) + break; + + usleep_range(50, 100); + } while (time_is_after_jiffies(timeout)); + + value = csb_readl(tegra, XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT); + if ((value & L2IMEMOP_RESULT_VLD) == 0) { + dev_err(dev, "DMA controller not ready %#010x\n", value); + return -EBUSY; + } csb_writel(tegra, le32_to_cpu(header->boot_codetag), XUSB_FALC_BOOTVEC); From patchwork Mon Nov 25 12:32:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260309 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 29FF213A4 for ; Mon, 25 Nov 2019 12:32:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0A9072085B for ; Mon, 25 Nov 2019 12:32:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Z0xoiP6v" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727645AbfKYMcW (ORCPT ); Mon, 25 Nov 2019 07:32:22 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:44360 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727522AbfKYMcW (ORCPT ); Mon, 25 Nov 2019 07:32:22 -0500 Received: by mail-wr1-f68.google.com with SMTP id i12so17767878wrn.11; Mon, 25 Nov 2019 04:32:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=l3/Z1fhi0sT4mnf9G+kfrVr9ykZvAJKB2VFXTX41fH4=; b=Z0xoiP6vKJLT3wjGE2vIUh8hI6OzXfOl++d0fPX8V5vic4QI5C5lsb3Wg4Vu3xMTyW GpArEu3FYNaziu/Uw+hEvVGGzvqQQ6/aGodHzJdKLeyMEZZSfPf4fznpzVi35W4MIHqM BkBammKBUXixBceuCVFbuzBUrMK6dxF6gJYpj2tzjGEhj3eeVAz7tZ+wBuluus1+vsp8 daG2KoTqXTitsPRAkEuPSI17SUZ/xFds+a+e+Orp88qDWlACYex5geDD11b+a10j1+uN exrf/gWdlhZBxCz9PjuMe5hcO/o57Bvzos6VzN4ioOUufJMFD70qhyPN0/AY2O9VSwdZ 9C8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=l3/Z1fhi0sT4mnf9G+kfrVr9ykZvAJKB2VFXTX41fH4=; b=UC+QyglScPZ2rjcd+yS93VYLQhKKMzEbvxpMYQDnyuikGWqQ/m5/qkXM9IsG2U1c4E ZyenSbtG+dstKD8jn3fxXjjQ0CvVFNWRMLbcSnzlEc6Fi7rCeFqHEs2C7WIelQ9yoL0P 9jVBgF/bTb5ElIsMD/g9lFhwuBc5xT0wxaBpYCnGmsc2XXunWccCxgiJmEUbzJb9rASZ DvblXl0pkfnGMB+w/7zxMpvhJvmN2WRbkqOkERhEr0zQxsMzj+qpD2Fe3V4o9IFl1EAa 9beb0TaDDJILurARdv4O8mp4K8zi2+C87EjyPoC1NTWF84VBfjym+/1e7dOUGe9Sb9OE xW3A== X-Gm-Message-State: APjAAAVXc8mDfTsWPK/wYi2ZtTad7PM0zO/Ll+DYSa9kRj3SgWt8mw8R Yq/dctnHoivMzp8LCstDqAg= X-Google-Smtp-Source: APXvYqzQKPLYO9K/1bejokPpxq1E5pmB7z+1za15mWrySqAaV1k1t/q/7t0mfVX3KNjJNp213ykvjQ== X-Received: by 2002:a5d:4983:: with SMTP id r3mr14731858wrq.134.1574685140280; Mon, 25 Nov 2019 04:32:20 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id t14sm10026180wrw.87.2019.11.25.04.32.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:19 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 04/10] usb: host: xhci-tegra: Use CNR as firmware ready indicator Date: Mon, 25 Nov 2019 13:32:04 +0100 Message-Id: <20191125123210.1564323-5-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding The Falcon CPU state is a suboptimal indicator for firmware readiness, since the Falcon can be in a running state if the firmware is handling port state changes or running other tasks. Instead, the driver should check the STS_CNR bit to determine whether or not the firmware has been successfully loaded and is ready for XHCI operation. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index d15fd16168ae..85642806fa2a 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -829,10 +829,10 @@ static int tegra_xusb_request_firmware(struct tegra_xusb *tegra) static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) { unsigned int code_tag_blocks, code_size_blocks, code_blocks; + struct xhci_cap_regs __iomem *cap = tegra->regs; struct tegra_xusb_fw_header *header; - struct xhci_cap_regs __iomem *cap; - struct xhci_op_regs __iomem *op; struct device *dev = tegra->dev; + struct xhci_op_regs __iomem *op; unsigned long timeout; time64_t timestamp; struct tm time; @@ -840,6 +840,7 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) u32 value; header = (struct tegra_xusb_fw_header *)tegra->fw.virt; + op = tegra->regs + HC_LENGTH(readl(&cap->hc_capbase)); if (csb_readl(tegra, XUSB_CSB_MP_ILOAD_BASE_LO) != 0) { dev_info(dev, "Firmware already loaded, Falcon state %#x\n", @@ -915,21 +916,23 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) csb_writel(tegra, le32_to_cpu(header->boot_codetag), XUSB_FALC_BOOTVEC); - /* Boot Falcon CPU and wait for it to enter the STOPPED (idle) state. */ - timeout = jiffies + msecs_to_jiffies(5); - + /* Boot Falcon CPU and wait for USBSTS_CNR to get cleared. */ csb_writel(tegra, CPUCTL_STARTCPU, XUSB_FALC_CPUCTL); - while (time_before(jiffies, timeout)) { - if (csb_readl(tegra, XUSB_FALC_CPUCTL) == CPUCTL_STATE_STOPPED) + timeout = jiffies + msecs_to_jiffies(200); + + do { + value = readl(&op->status); + if ((value & STS_CNR) == 0) break; - usleep_range(100, 200); - } + usleep_range(1000, 2000); + } while (time_is_after_jiffies(timeout)); - if (csb_readl(tegra, XUSB_FALC_CPUCTL) != CPUCTL_STATE_STOPPED) { - dev_err(dev, "Falcon failed to start, state: %#x\n", - csb_readl(tegra, XUSB_FALC_CPUCTL)); + value = readl(&op->status); + if (value & STS_CNR) { + value = csb_readl(tegra, XUSB_FALC_CPUCTL); + dev_err(dev, "XHCI controller not read: %#010x\n", value); return -EIO; } From patchwork Mon Nov 25 12:32:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260311 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6055615AC for ; Mon, 25 Nov 2019 12:32:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 40EC620869 for ; Mon, 25 Nov 2019 12:32:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="CPCHripa" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727691AbfKYMc0 (ORCPT ); Mon, 25 Nov 2019 07:32:26 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:39801 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727568AbfKYMc0 (ORCPT ); Mon, 25 Nov 2019 07:32:26 -0500 Received: by mail-wm1-f66.google.com with SMTP id t26so15759915wmi.4; Mon, 25 Nov 2019 04:32:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0/oaAKLiGa4/IhwzkurA0aDtjDQ0oFXesoS/Wwe9dmU=; b=CPCHripaJVxNHral/TWl+v+wVGmwC5ZwyR3Tlkob6MY9B7l54845CCqH/H8aSdypN+ BvR8cvpzlElbmXYIoMUf4dwfnEsa4RwvSvWI5QgYaPaCaSncFRMHZaTMUS3Sim0FLJ6P nd7YVCecpa6XP8g6gSRhH3q2pUQJP3sqMRnjBFx7DCrlLHXyGvXiS6S32+T+3Ata8CrQ +ULG1cmKHpnLfk3srbcx4cbkg2sJv/66TJP6LSSMBsSayFaDhw/nOI4F0HxqFo0G9VOn vXNWBWEsP37V+gdytoolhqLKB4oTfGDhirgWEUsH5TabmbU87jEaZELE8c8T+DhdLSda 3VPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0/oaAKLiGa4/IhwzkurA0aDtjDQ0oFXesoS/Wwe9dmU=; b=YjYF3EumwK05skYavxTXTnLlx1NcwVQ+DzlxxDkTErGstbBf+6Imn9pQy9YgL8+PHM 1iIXV4T+eel76HkIQpmBbkvwrwI9mv8lnpAyOvNbEKBeM9VHSivN9u4bSKiNrJgBuZb9 xKaKxxSQiqQHioOHSinXpa1fdcquGbh10RjxYqfDJtmYrEIdaaYGtP8RfoJy4EdBilPG 4AwhlaRnZN8eoXd0KtIN9ZfAB5RZWEBKre/HfMmfqgny+bvohHkPi30cv9gKc8RWCrBi LfcrFCltmD68UaN5/kHfaFeAcu4GlA3MhDa5BCzg5ZCRjIXQVznC1nuyb6eLnQ4hwe6a 5CTA== X-Gm-Message-State: APjAAAWQ0kuDVs2jnB3No2jIPrJUsLfbMXo9qui/xJGdKl/g6LfS0Gl/ ciNMs2dCTZCPjS99akT3ASheTV6SWcU= X-Google-Smtp-Source: APXvYqwvdiKPUcRJUbV3tmawWig/VSQYQmkSpUd4rJTwChx0TZS/SRbHg4p1uD5KJhmkS+0z6l0uwA== X-Received: by 2002:a7b:ce11:: with SMTP id m17mr26509411wmc.123.1574685142579; Mon, 25 Nov 2019 04:32:22 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id c15sm10255382wrx.78.2019.11.25.04.32.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:21 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 05/10] usb: host: xhci-tegra: Extract firmware enable helper Date: Mon, 25 Nov 2019 13:32:05 +0100 Message-Id: <20191125123210.1564323-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding Extract a helper that enables message generation from the firmware. This removes clutter from tegra_xusb_probe() and will also come in useful for subsequent patches that introduce suspend/resume support. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 41 +++++++++++++++++++++++++---------- 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 85642806fa2a..4244367d3573 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -997,11 +997,37 @@ static int tegra_xusb_powerdomain_init(struct device *dev, return 0; } -static int tegra_xusb_probe(struct platform_device *pdev) +static int __tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra) { struct tegra_xusb_mbox_msg msg; - struct resource *regs; + int err; + + /* Enable firmware messages from controller. */ + msg.cmd = MBOX_CMD_MSG_ENABLED; + msg.data = 0; + + err = tegra_xusb_mbox_send(tegra, &msg); + if (err < 0) + dev_err(tegra->dev, "failed to enable messages: %d\n", err); + + return err; +} + +static int tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra) +{ + int err; + + mutex_lock(&tegra->lock); + err = __tegra_xusb_enable_firmware_messages(tegra); + mutex_unlock(&tegra->lock); + + return err; +} + +static int tegra_xusb_probe(struct platform_device *pdev) +{ struct tegra_xusb *tegra; + struct resource *regs; struct xhci_hcd *xhci; unsigned int i, j, k; struct phy *phy; @@ -1281,21 +1307,12 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto put_usb3; } - mutex_lock(&tegra->lock); - - /* Enable firmware messages from controller. */ - msg.cmd = MBOX_CMD_MSG_ENABLED; - msg.data = 0; - - err = tegra_xusb_mbox_send(tegra, &msg); + err = tegra_xusb_enable_firmware_messages(tegra); if (err < 0) { dev_err(&pdev->dev, "failed to enable messages: %d\n", err); - mutex_unlock(&tegra->lock); goto remove_usb3; } - mutex_unlock(&tegra->lock); - err = devm_request_threaded_irq(&pdev->dev, tegra->mbox_irq, tegra_xusb_mbox_irq, tegra_xusb_mbox_thread, 0, From patchwork Mon Nov 25 12:32:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260313 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 32A63109A for ; Mon, 25 Nov 2019 12:32:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 12F442085B for ; Mon, 25 Nov 2019 12:32:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="d7oqB39f" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727696AbfKYMc2 (ORCPT ); Mon, 25 Nov 2019 07:32:28 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:36671 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727568AbfKYMc2 (ORCPT ); Mon, 25 Nov 2019 07:32:28 -0500 Received: by mail-wm1-f68.google.com with SMTP id n188so13801675wme.1; Mon, 25 Nov 2019 04:32:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Fq4QUTXmofakE88LRqI1Nn/WRd5sQuZkre83p4oy/uk=; b=d7oqB39fFhkVy/jAkcoZ1DuIr/lzr4hJyUeD3L5Wg3rXC5HzrzMnJMonOng786bWRj yeoXT6zrkS5WdBy9AtiY2Ph6NrHzNuWxX9NjM8d4Tut4q1x1x5op05a7W9RPgR7jlkcX j6MaOFWDRcKXwjSqvOgzGlSpz5lTJybu0f1tlYMNcbrHzo6g8SFXln2VDE4DVcZqMAVm 8Y6xIhamGe6EFOhxDUmobftD89UnqakNrmSGhfsdxGhWh9w5HknQSCweM2kagV8lqkL7 XSRB38dKqAQpjT/hwbIK2y0jEdXsOcbWWxzvA6Pl8P8odIkTHTNhLZ8/ZfM4A1enPF5H XT6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Fq4QUTXmofakE88LRqI1Nn/WRd5sQuZkre83p4oy/uk=; b=D0rlfFlSMti+a5p+zrJdFhXpE8IMWVkfE7od5j1c54iryIWJ9+c8RAiZSmNotoKIA4 COsO4JXDdy8CivK6DpzSYlV5L8SBZrW5YONf4Hi6kEvIG+roA8d1by23lQemUtiBYrke qNkoLBWnRS0YpeVGF0UnGeUxENhhnjgsbXu90MvGWT5uMhbs/yK0DtgNxv3de3e6LEEd zzsIFRFvZY/YjBhaK2ZGwgkoYJXEuSy8ZvhKcFMaB3RSNhX242YNOVMgHgzM/qAZSUJ+ Ek4ktl8hm12gVT2ZYL5Lij965LW42KwiRawSYFapApSbaVbLlgsLHD9nZjFeUjLmzDxN SKXQ== X-Gm-Message-State: APjAAAWyYx72aZGzFmDJJ/fK9u0uVVK29Tac+gv3RkCs4SmTZA7A1tHq ZBKDkW6Uh+styb8OT7R3hYQ= X-Google-Smtp-Source: APXvYqxPTm9H4SuowQQSUCdYN4gh+yo+/waYRspzg8FJktNhGSxx6+qEgsL4lOCSdzxxaTB9PFjBog== X-Received: by 2002:a05:600c:230d:: with SMTP id 13mr21980943wmo.12.1574685144504; Mon, 25 Nov 2019 04:32:24 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id j11sm10201204wrq.26.2019.11.25.04.32.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:23 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 06/10] usb: host: xhci-tegra: Reuse stored register base address Date: Mon, 25 Nov 2019 13:32:06 +0100 Message-Id: <20191125123210.1564323-7-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding The base address of the XUSB controller's registers is already stored in the HCD. Move assignment to the HCD fields to an earlier point so that they can be reused in the tegra_xusb_config() function. This avoids the need to pass the base address as an extra parameter, which in turn comes in handy in subsequent patches that need to call this function from the suspend/resume paths where these values are no longer readily available. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 4244367d3573..5eca3ea0e8b2 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -625,9 +625,9 @@ static irqreturn_t tegra_xusb_mbox_thread(int irq, void *data) return IRQ_HANDLED; } -static void tegra_xusb_config(struct tegra_xusb *tegra, - struct resource *regs) +static void tegra_xusb_config(struct tegra_xusb *tegra) { + u32 regs = tegra->hcd->rsrc_start; u32 value; if (tegra->soc->has_ipfs) { @@ -641,7 +641,7 @@ static void tegra_xusb_config(struct tegra_xusb *tegra, /* Program BAR0 space */ value = fpci_readl(tegra, XUSB_CFG_4); value &= ~(XUSB_BASE_ADDR_MASK << XUSB_BASE_ADDR_SHIFT); - value |= regs->start & (XUSB_BASE_ADDR_MASK << XUSB_BASE_ADDR_SHIFT); + value |= regs & (XUSB_BASE_ADDR_MASK << XUSB_BASE_ADDR_SHIFT); fpci_writel(tegra, value, XUSB_CFG_4); usleep_range(100, 200); @@ -1230,6 +1230,10 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto put_powerdomains; } + tegra->hcd->regs = tegra->regs; + tegra->hcd->rsrc_start = regs->start; + tegra->hcd->rsrc_len = resource_size(regs); + /* * This must happen after usb_create_hcd(), because usb_create_hcd() * will overwrite the drvdata of the device with the hcd it creates. @@ -1253,7 +1257,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto disable_phy; } - tegra_xusb_config(tegra, regs); + tegra_xusb_config(tegra); /* * The XUSB Falcon microcontroller can only address 40 bits, so set @@ -1277,10 +1281,6 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto free_firmware; } - tegra->hcd->regs = tegra->regs; - tegra->hcd->rsrc_start = regs->start; - tegra->hcd->rsrc_len = resource_size(regs); - err = usb_add_hcd(tegra->hcd, tegra->xhci_irq, IRQF_SHARED); if (err < 0) { dev_err(&pdev->dev, "failed to add USB HCD: %d\n", err); From patchwork Mon Nov 25 12:32:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260315 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1B3F713A4 for ; Mon, 25 Nov 2019 12:32:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F09BF20836 for ; Mon, 25 Nov 2019 12:32:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="e8+3lxng" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727698AbfKYMc3 (ORCPT ); Mon, 25 Nov 2019 07:32:29 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:35381 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727692AbfKYMc2 (ORCPT ); Mon, 25 Nov 2019 07:32:28 -0500 Received: by mail-wm1-f67.google.com with SMTP id n5so5643024wmc.0; Mon, 25 Nov 2019 04:32:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+wGE7eGbER/uxhRZC0l8KVWxKSKWKBs7W4PgNx8ou4Y=; b=e8+3lxngSkt3c+e+uFoZXWAuDKeeqzXuBD4iYNZfImRJqLWPoikH2EPRsc5RDt3xYt kZebhyWcpMAYytvvvm14A7Corb5Lqgs+AuXc6ShxpJccaIOxAwEbpOb0039m/dDbP5ee Vxdsr6KYmNapzZ1eV8msIL6QJt9BJhi9C6tNwBnHMMu/Qy1Ao/TswdTuTzbNXcEKqA+t h2cvZxIavBooaNeC3PUJcBawPWacJqPYAcBVjbEfsOXUW4QaYiTIFSQLVm8Cg/3lyWJk TXRLKR+Yn6E5se/1bLg3K218OT9LWJKk/oLWUvMp2BFLUX71gQodeLEI2ZvaY2ZWV6vr 7dsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+wGE7eGbER/uxhRZC0l8KVWxKSKWKBs7W4PgNx8ou4Y=; b=fkf9sAQ9SkWZnZvN7FGTsTGXQkIwbbNwiuK2LXA9Br1+le76KwoxcJB6T+R+nyYgJv 5jira0j08GHzx0XbdA+JmYHWjwtKeqV7LgWhpxwu3EAaVzO7xJqpTp3XLHiBv0mQNZbO 66J30HaIVi91sD0xuRS/dbsdWIZtoVVkcmuspljc6nMYIUEMbj4miucmRWfinDXy74My ers8uopfBAWXVFOKDL9HKNovG466e+UdkwHCQPyZJN2+IAVUCFqjPK4EbUuR2qPRh1SA mf/NLx59mVcKjtEIl1Fhhz2s5Lb7tGXZ5OpnUc4GjhJMv96ponSWZScpKMUhAPU4HSax GShQ== X-Gm-Message-State: APjAAAXdpjyS0+LrGI2KHaKW2Mk5ddEZOoAChG4hYNtgis2Z6xkiJ3wM 6Fw4t40NB39Gs2glxj+t+UY= X-Google-Smtp-Source: APXvYqwI7PlIUjhEeL3YuDFmoCQ13dFFykx4gkRSJOG3x3xqocJgT54vThpyAy+5qiz/zo84KW0Haw== X-Received: by 2002:a1c:20ce:: with SMTP id g197mr27164770wmg.99.1574685146545; Mon, 25 Nov 2019 04:32:26 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id 2sm10194209wrq.31.2019.11.25.04.32.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:25 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 07/10] usb: host: xhci-tegra: Enable runtime PM as late as possible Date: Mon, 25 Nov 2019 13:32:07 +0100 Message-Id: <20191125123210.1564323-8-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding A number of things can currently go wrong after the XUSB controller has been enabled, which means that it might need to be disabled again before it has ever been used. Avoid this by delaying runtime PM enablement until it's really required right before registers are accessed for the first time. Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 33 +++++++++++++++++---------------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 5eca3ea0e8b2..f043aab7bf53 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -1246,19 +1246,6 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto put_hcd; } - pm_runtime_enable(&pdev->dev); - if (pm_runtime_enabled(&pdev->dev)) - err = pm_runtime_get_sync(&pdev->dev); - else - err = tegra_xusb_runtime_resume(&pdev->dev); - - if (err < 0) { - dev_err(&pdev->dev, "failed to enable device: %d\n", err); - goto disable_phy; - } - - tegra_xusb_config(tegra); - /* * The XUSB Falcon microcontroller can only address 40 bits, so set * the DMA mask accordingly. @@ -1266,7 +1253,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) err = dma_set_mask_and_coherent(tegra->dev, DMA_BIT_MASK(40)); if (err < 0) { dev_err(&pdev->dev, "failed to set DMA mask: %d\n", err); - goto put_rpm; + goto disable_phy; } err = tegra_xusb_request_firmware(tegra); @@ -1275,16 +1262,30 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto disable_phy; } + pm_runtime_enable(&pdev->dev); + + if (!pm_runtime_enabled(&pdev->dev)) + err = tegra_xusb_runtime_resume(&pdev->dev); + else + err = pm_runtime_get_sync(&pdev->dev); + + if (err < 0) { + dev_err(&pdev->dev, "failed to enable device: %d\n", err); + goto free_firmware; + } + + tegra_xusb_config(tegra); + err = tegra_xusb_load_firmware(tegra); if (err < 0) { dev_err(&pdev->dev, "failed to load firmware: %d\n", err); - goto free_firmware; + goto put_rpm; } err = usb_add_hcd(tegra->hcd, tegra->xhci_irq, IRQF_SHARED); if (err < 0) { dev_err(&pdev->dev, "failed to add USB HCD: %d\n", err); - goto free_firmware; + goto put_rpm; } device_wakeup_enable(tegra->hcd->self.controller); From patchwork Mon Nov 25 12:32:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260317 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 352BB13A4 for ; Mon, 25 Nov 2019 12:32:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0D80E2085B for ; Mon, 25 Nov 2019 12:32:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="B6YICcxr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727662AbfKYMcb (ORCPT ); Mon, 25 Nov 2019 07:32:31 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:45947 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727637AbfKYMcb (ORCPT ); Mon, 25 Nov 2019 07:32:31 -0500 Received: by mail-wr1-f66.google.com with SMTP id z10so17719684wrs.12; Mon, 25 Nov 2019 04:32:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7nvRSeYdEHiiiK8kd3BX5ojZ7p/90dHMgcmHKqRHifs=; b=B6YICcxrBWaKYmbBYio30k9B2w3qneV9s9oHOqpSB98rVQXM1ddpgCMxVjigNoiwOa SiHeAzj3HH/STZNTLR3sq2jUxMxKrxtnVxahUOFrFu4PKs7jw7Y22ffGeucJv349xpkl /m8i/JFWHZgSWWcp+kvVVqD4NAcM5T0VxhM3LlNGOmoZqI5i01iJdeud4CIJzSpRkMQ4 R1grDYak/7bGMAVtR0c1wRygsjHb9QNkr7t4hbE2qU6pjJjpdgK8EYKbizN2gqOUkqHa 3BkoXOL/tdqT2ljvPyNPFm8S0Tf1VCdr8v80JidM4KeMX2NuHEg/rE7oUn/lLzxub/3G VeLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7nvRSeYdEHiiiK8kd3BX5ojZ7p/90dHMgcmHKqRHifs=; b=Kz5hcQmQP5DsbXYZtRQLqJ4qEIOmSCjtznic8C0iVYrbNdrZWRETh8Arbyz/qn60LB UX/9+R6mfMBnyUhp5S8wxhLtVrF1EteuQfhbyMPs6CdTP9qW/1eCxaPneZL92bez178+ ALuA/qbQrWYUZUngt7UTrzetnYNsx+JUfBFMBeAHExCOyrEkkWA76RYNJVr6JgLAwZCI SohA26bEe0FzJlZFEE3ehSlesmRaN3MC3X8eXPYPi4r868P0KXCEKIu7joR1byJFbkDU /ehGyJtfzkp2Uiee0bmZ3wOJgAJFRsmqqvB3XHMj1BHL77naFNkmem+NL0DyU/w/FELM 1x4g== X-Gm-Message-State: APjAAAW/aid6Z/CV6gQgfgjpAEaq5K2B3H/K0r/AVD7WEG/IGEaQI6WK 8qtlECCZYx5gvWAmE9FcQyE= X-Google-Smtp-Source: APXvYqwS4hvuz2OwRcPobZ91rJOT7Xab22ED4YHGODKy5UD+E3Ad4TcbKSHCTc9dRc/VDpepzttLjw== X-Received: by 2002:a05:6000:10c5:: with SMTP id b5mr32330984wrx.121.1574685148539; Mon, 25 Nov 2019 04:32:28 -0800 (PST) Received: from localhost (pD9E518ED.dip0.t-ipconnect.de. [217.229.24.237]) by smtp.gmail.com with ESMTPSA id x2sm8036638wmc.3.2019.11.25.04.32.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:27 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 08/10] usb: host: xhci-tegra: Add support for XUSB context save/restore Date: Mon, 25 Nov 2019 13:32:08 +0100 Message-Id: <20191125123210.1564323-9-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding The XUSB controller contains registers that need to be saved on suspend and restored on resume in addition to the XHCI specific registers. Add support for saving and restoring the XUSB specific context. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 102 +++++++++++++++++++++++++++++++++- 1 file changed, 100 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index f043aab7bf53..be1b47fadb3b 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -154,12 +154,25 @@ struct tegra_xusb_mbox_regs { u16 owner; }; +struct tegra_xusb_context_soc { + struct { + const unsigned int *offsets; + unsigned int num_offsets; + } ipfs; + + struct { + const unsigned int *offsets; + unsigned int num_offsets; + } fpci; +}; + struct tegra_xusb_soc { const char *firmware; const char * const *supply_names; unsigned int num_supplies; const struct tegra_xusb_phy_type *phy_types; unsigned int num_types; + const struct tegra_xusb_context_soc *context; struct { struct { @@ -174,6 +187,11 @@ struct tegra_xusb_soc { bool has_ipfs; }; +struct tegra_xusb_context { + u32 *ipfs; + u32 *fpci; +}; + struct tegra_xusb { struct device *dev; void __iomem *regs; @@ -220,6 +238,8 @@ struct tegra_xusb { void *virt; dma_addr_t phys; } fw; + + struct tegra_xusb_context context; }; static struct hc_driver __read_mostly tegra_xhci_hc_driver; @@ -795,6 +815,37 @@ static int tegra_xusb_runtime_resume(struct device *dev) return err; } +#ifdef CONFIG_PM_SLEEP +static int tegra_xusb_init_context(struct tegra_xusb *tegra) +{ + const struct tegra_xusb_context_soc *soc = tegra->soc->context; + + /* + * Skip support for context save/restore if the SoC doesn't have any + * XUSB specific context that needs to be saved/restored. + */ + if (!soc) + return 0; + + tegra->context.ipfs = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets, + sizeof(u32), GFP_KERNEL); + if (!tegra->context.ipfs) + return -ENOMEM; + + tegra->context.fpci = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets, + sizeof(u32), GFP_KERNEL); + if (!tegra->context.fpci) + return -ENOMEM; + + return 0; +} +#else +static inline int tegra_xusb_init_context(struct tegra_xusb *tegra) +{ + return 0; +} +#endif + static int tegra_xusb_request_firmware(struct tegra_xusb *tegra) { struct tegra_xusb_fw_header *header; @@ -1043,6 +1094,10 @@ static int tegra_xusb_probe(struct platform_device *pdev) mutex_init(&tegra->lock); tegra->dev = &pdev->dev; + err = tegra_xusb_init_context(tegra); + if (err < 0) + return err; + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); tegra->regs = devm_ioremap_resource(&pdev->dev, regs); if (IS_ERR(tegra->regs)) @@ -1386,14 +1441,55 @@ static int tegra_xusb_remove(struct platform_device *pdev) } #ifdef CONFIG_PM_SLEEP +static void tegra_xusb_save_context(struct tegra_xusb *tegra) +{ + const struct tegra_xusb_context_soc *soc = tegra->soc->context; + struct tegra_xusb_context *ctx = &tegra->context; + unsigned int i; + + if (soc && soc->ipfs.num_offsets > 0) { + for (i = 0; i < soc->ipfs.num_offsets; i++) + ctx->ipfs[i] = ipfs_readl(tegra, soc->ipfs.offsets[i]); + } + + if (soc && soc->fpci.num_offsets > 0) { + for (i = 0; i < soc->fpci.num_offsets; i++) + ctx->fpci[i] = fpci_readl(tegra, soc->fpci.offsets[i]); + } +} + +static void tegra_xusb_restore_context(struct tegra_xusb *tegra) +{ + const struct tegra_xusb_context_soc *soc = tegra->soc->context; + struct tegra_xusb_context *ctx = &tegra->context; + unsigned int i; + + if (soc && soc->fpci.num_offsets > 0) { + for (i = 0; i < soc->fpci.num_offsets; i++) + fpci_writel(tegra, ctx->fpci[i], soc->fpci.offsets[i]); + } + + if (soc && soc->ipfs.num_offsets > 0) { + for (i = 0; i < soc->ipfs.num_offsets; i++) + ipfs_writel(tegra, ctx->ipfs[i], soc->ipfs.offsets[i]); + } +} + static int tegra_xusb_suspend(struct device *dev) { struct tegra_xusb *tegra = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); bool wakeup = device_may_wakeup(dev); + int err; /* TODO: Powergate controller across suspend/resume. */ - return xhci_suspend(xhci, wakeup); + err = xhci_suspend(xhci, wakeup); + if (err < 0) + return err; + + tegra_xusb_save_context(tegra); + + return 0; } static int tegra_xusb_resume(struct device *dev) @@ -1401,7 +1497,9 @@ static int tegra_xusb_resume(struct device *dev) struct tegra_xusb *tegra = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); - return xhci_resume(xhci, 0); + tegra_xusb_restore_context(tegra); + + return xhci_resume(xhci, false); } #endif From patchwork Mon Nov 25 12:32:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260319 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 822D8109A for ; Mon, 25 Nov 2019 12:32:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 59E5520862 for ; Mon, 25 Nov 2019 12:32:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="bzT/17ER" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727702AbfKYMcf (ORCPT ); Mon, 25 Nov 2019 07:32:35 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:34930 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727637AbfKYMcf (ORCPT ); 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[217.229.24.237]) by smtp.gmail.com with ESMTPSA id u14sm10414805wrm.51.2019.11.25.04.32.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:29 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 09/10] usb: host: xhci-tegra: Add XUSB controller context Date: Mon, 25 Nov 2019 13:32:09 +0100 Message-Id: <20191125123210.1564323-10-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding Define the offsets of the registers that need to be saved on suspend and restored on resume for the various NVIDIA Tegra generations supported by the XUSB driver. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 80 ++++++++++++++++++++++++++++++----- 1 file changed, 69 insertions(+), 11 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index be1b47fadb3b..cd3afec408ea 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -38,7 +38,15 @@ #define XUSB_CFG_4 0x010 #define XUSB_BASE_ADDR_SHIFT 15 #define XUSB_BASE_ADDR_MASK 0x1ffff +#define XUSB_CFG_16 0x040 +#define XUSB_CFG_24 0x060 +#define XUSB_CFG_AXI_CFG 0x0f8 #define XUSB_CFG_ARU_C11_CSBRANGE 0x41c +#define XUSB_CFG_ARU_CONTEXT 0x43c +#define XUSB_CFG_ARU_CONTEXT_HS_PLS 0x478 +#define XUSB_CFG_ARU_CONTEXT_FS_PLS 0x47c +#define XUSB_CFG_ARU_CONTEXT_HSFS_SPEED 0x480 +#define XUSB_CFG_ARU_CONTEXT_HSFS_PP 0x484 #define XUSB_CFG_CSB_BASE_ADDR 0x800 /* FPCI mailbox registers */ @@ -62,11 +70,20 @@ #define MBOX_SMI_INTR_EN BIT(3) /* IPFS registers */ +#define IPFS_XUSB_HOST_MSI_BAR_SZ_0 0x0c0 +#define IPFS_XUSB_HOST_MSI_AXI_BAR_ST_0 0x0c4 +#define IPFS_XUSB_HOST_MSI_FPCI_BAR_ST_0 0x0c8 +#define IPFS_XUSB_HOST_MSI_VEC0_0 0x100 +#define IPFS_XUSB_HOST_MSI_EN_VEC0_0 0x140 #define IPFS_XUSB_HOST_CONFIGURATION_0 0x180 #define IPFS_EN_FPCI BIT(0) +#define IPFS_XUSB_HOST_FPCI_ERROR_MASKS_0 0x184 #define IPFS_XUSB_HOST_INTR_MASK_0 0x188 #define IPFS_IP_INT_MASK BIT(16) +#define IPFS_XUSB_HOST_INTR_ENABLE_0 0x198 +#define IPFS_XUSB_HOST_UFPCI_CONFIG_0 0x19c #define IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0 0x1bc +#define IPFS_XUSB_HOST_MCCIF_FIFOCTRL_0 0x1dc #define CSB_PAGE_SELECT_MASK 0x7fffff #define CSB_PAGE_SELECT_SHIFT 9 @@ -820,13 +837,6 @@ static int tegra_xusb_init_context(struct tegra_xusb *tegra) { const struct tegra_xusb_context_soc *soc = tegra->soc->context; - /* - * Skip support for context save/restore if the SoC doesn't have any - * XUSB specific context that needs to be saved/restored. - */ - if (!soc) - return 0; - tegra->context.ipfs = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets, sizeof(u32), GFP_KERNEL); if (!tegra->context.ipfs) @@ -1447,12 +1457,12 @@ static void tegra_xusb_save_context(struct tegra_xusb *tegra) struct tegra_xusb_context *ctx = &tegra->context; unsigned int i; - if (soc && soc->ipfs.num_offsets > 0) { + if (soc->ipfs.num_offsets > 0) { for (i = 0; i < soc->ipfs.num_offsets; i++) ctx->ipfs[i] = ipfs_readl(tegra, soc->ipfs.offsets[i]); } - if (soc && soc->fpci.num_offsets > 0) { + if (soc->fpci.num_offsets > 0) { for (i = 0; i < soc->fpci.num_offsets; i++) ctx->fpci[i] = fpci_readl(tegra, soc->fpci.offsets[i]); } @@ -1464,12 +1474,12 @@ static void tegra_xusb_restore_context(struct tegra_xusb *tegra) struct tegra_xusb_context *ctx = &tegra->context; unsigned int i; - if (soc && soc->fpci.num_offsets > 0) { + if (soc->fpci.num_offsets > 0) { for (i = 0; i < soc->fpci.num_offsets; i++) fpci_writel(tegra, ctx->fpci[i], soc->fpci.offsets[i]); } - if (soc && soc->ipfs.num_offsets > 0) { + if (soc->ipfs.num_offsets > 0) { for (i = 0; i < soc->ipfs.num_offsets; i++) ipfs_writel(tegra, ctx->ipfs[i], soc->ipfs.offsets[i]); } @@ -1526,12 +1536,50 @@ static const struct tegra_xusb_phy_type tegra124_phy_types[] = { { .name = "hsic", .num = 2, }, }; +static const unsigned int tegra124_xusb_context_ipfs[] = { + IPFS_XUSB_HOST_MSI_BAR_SZ_0, + IPFS_XUSB_HOST_MSI_BAR_SZ_0, + IPFS_XUSB_HOST_MSI_AXI_BAR_ST_0, + IPFS_XUSB_HOST_MSI_FPCI_BAR_ST_0, + IPFS_XUSB_HOST_MSI_VEC0_0, + IPFS_XUSB_HOST_MSI_EN_VEC0_0, + IPFS_XUSB_HOST_FPCI_ERROR_MASKS_0, + IPFS_XUSB_HOST_INTR_MASK_0, + IPFS_XUSB_HOST_INTR_ENABLE_0, + IPFS_XUSB_HOST_UFPCI_CONFIG_0, + IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0, + IPFS_XUSB_HOST_MCCIF_FIFOCTRL_0, +}; + +static const unsigned int tegra124_xusb_context_fpci[] = { + XUSB_CFG_ARU_CONTEXT_HS_PLS, + XUSB_CFG_ARU_CONTEXT_FS_PLS, + XUSB_CFG_ARU_CONTEXT_HSFS_SPEED, + XUSB_CFG_ARU_CONTEXT_HSFS_PP, + XUSB_CFG_ARU_CONTEXT, + XUSB_CFG_AXI_CFG, + XUSB_CFG_24, + XUSB_CFG_16, +}; + +static const struct tegra_xusb_context_soc tegra124_xusb_context = { + .ipfs = { + .num_offsets = ARRAY_SIZE(tegra124_xusb_context_ipfs), + .offsets = tegra124_xusb_context_ipfs, + }, + .fpci = { + .num_offsets = ARRAY_SIZE(tegra124_xusb_context_fpci), + .offsets = tegra124_xusb_context_fpci, + }, +}; + static const struct tegra_xusb_soc tegra124_soc = { .firmware = "nvidia/tegra124/xusb.bin", .supply_names = tegra124_supply_names, .num_supplies = ARRAY_SIZE(tegra124_supply_names), .phy_types = tegra124_phy_types, .num_types = ARRAY_SIZE(tegra124_phy_types), + .context = &tegra124_xusb_context, .ports = { .usb2 = { .offset = 4, .count = 4, }, .hsic = { .offset = 6, .count = 2, }, @@ -1570,6 +1618,7 @@ static const struct tegra_xusb_soc tegra210_soc = { .num_supplies = ARRAY_SIZE(tegra210_supply_names), .phy_types = tegra210_phy_types, .num_types = ARRAY_SIZE(tegra210_phy_types), + .context = &tegra124_xusb_context, .ports = { .usb2 = { .offset = 4, .count = 4, }, .hsic = { .offset = 8, .count = 1, }, @@ -1595,12 +1644,20 @@ static const struct tegra_xusb_phy_type tegra186_phy_types[] = { { .name = "hsic", .num = 1, }, }; +static const struct tegra_xusb_context_soc tegra186_xusb_context = { + .fpci = { + .num_offsets = ARRAY_SIZE(tegra124_xusb_context_fpci), + .offsets = tegra124_xusb_context_fpci, + }, +}; + static const struct tegra_xusb_soc tegra186_soc = { .firmware = "nvidia/tegra186/xusb.bin", .supply_names = tegra186_supply_names, .num_supplies = ARRAY_SIZE(tegra186_supply_names), .phy_types = tegra186_phy_types, .num_types = ARRAY_SIZE(tegra186_phy_types), + .context = &tegra186_xusb_context, .ports = { .usb3 = { .offset = 0, .count = 3, }, .usb2 = { .offset = 3, .count = 3, }, @@ -1630,6 +1687,7 @@ static const struct tegra_xusb_soc tegra194_soc = { .num_supplies = ARRAY_SIZE(tegra194_supply_names), .phy_types = tegra194_phy_types, .num_types = ARRAY_SIZE(tegra194_phy_types), + .context = &tegra186_xusb_context, .ports = { .usb3 = { .offset = 0, .count = 4, }, .usb2 = { .offset = 4, .count = 4, }, From patchwork Mon Nov 25 12:32:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11260321 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F716109A for ; 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[217.229.24.237]) by smtp.gmail.com with ESMTPSA id u18sm10450346wrp.14.2019.11.25.04.32.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:31 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 10/10] usb: host: xhci-tegra: Implement basic ELPG support Date: Mon, 25 Nov 2019 13:32:10 +0100 Message-Id: <20191125123210.1564323-11-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding This implements basic engine-level powergate support which allows the XUSB controller to be put into a low power mode on system sleep and get it out of that low power mode again on resume. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 137 ++++++++++++++++++++++++++++++++-- 1 file changed, 129 insertions(+), 8 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index cd3afec408ea..d0e30927a73f 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -1451,6 +1451,45 @@ static int tegra_xusb_remove(struct platform_device *pdev) } #ifdef CONFIG_PM_SLEEP +static bool xhci_hub_ports_suspended(struct xhci_hub *hub) +{ + struct device *dev = hub->hcd->self.controller; + bool status = true; + unsigned int i; + u32 value; + + for (i = 0; i < hub->num_ports; i++) { + value = readl(hub->ports[i]->addr); + if ((value & PORT_PE) == 0) + continue; + + if ((value & PORT_PLS_MASK) != XDEV_U3) { + dev_info(dev, "%u-%u isn't suspended: %#010x\n", + hub->hcd->self.busnum, i + 1, value); + status = false; + } + } + + return status; +} + +static int tegra_xusb_check_ports(struct tegra_xusb *tegra) +{ + struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); + unsigned long flags; + int err = 0; + + spin_lock_irqsave(&xhci->lock, flags); + + if (!xhci_hub_ports_suspended(&xhci->usb2_rhub) || + !xhci_hub_ports_suspended(&xhci->usb3_rhub)) + err = -EBUSY; + + spin_unlock_irqrestore(&xhci->lock, flags); + + return err; +} + static void tegra_xusb_save_context(struct tegra_xusb *tegra) { const struct tegra_xusb_context_soc *soc = tegra->soc->context; @@ -1485,31 +1524,113 @@ static void tegra_xusb_restore_context(struct tegra_xusb *tegra) } } -static int tegra_xusb_suspend(struct device *dev) +static int tegra_xusb_enter_elpg(struct tegra_xusb *tegra, bool wakeup) { - struct tegra_xusb *tegra = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); - bool wakeup = device_may_wakeup(dev); + u32 value; int err; - /* TODO: Powergate controller across suspend/resume. */ + err = tegra_xusb_check_ports(tegra); + if (err < 0) { + dev_err(tegra->dev, "not all ports suspended: %d\n", err); + return err; + } + err = xhci_suspend(xhci, wakeup); - if (err < 0) + if (err < 0) { + dev_err(tegra->dev, "failed to suspend XHCI: %d\n", err); return err; + } tegra_xusb_save_context(tegra); + tegra_xusb_phy_disable(tegra); + tegra_xusb_clk_disable(tegra); return 0; } -static int tegra_xusb_resume(struct device *dev) +static int tegra_xusb_exit_elpg(struct tegra_xusb *tegra, bool wakeup) { - struct tegra_xusb *tegra = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(tegra->hcd); + u32 value; + int err; + err = tegra_xusb_clk_enable(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to enable clocks: %d\n", err); + return err; + } + + err = tegra_xusb_phy_enable(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to enable PHYs: %d\n", err); + goto disable_clk; + } + + tegra_xusb_config(tegra); tegra_xusb_restore_context(tegra); - return xhci_resume(xhci, false); + err = tegra_xusb_load_firmware(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to load firmware: %d\n", err); + goto disable_phy; + } + + err = __tegra_xusb_enable_firmware_messages(tegra); + if (err < 0) { + dev_err(tegra->dev, "failed to enable messages: %d\n", err); + goto disable_phy; + } + + err = xhci_resume(xhci, true); + if (err < 0) { + dev_err(tegra->dev, "failed to resume XHCI: %d\n", err); + goto disable_phy; + } + + return 0; + +disable_phy: + tegra_xusb_phy_disable(tegra); +disable_clk: + tegra_xusb_clk_disable(tegra); + return err; +} + +static int tegra_xusb_suspend(struct device *dev) +{ + struct tegra_xusb *tegra = dev_get_drvdata(dev); + bool wakeup = device_may_wakeup(dev); + int err; + + synchronize_irq(tegra->mbox_irq); + + mutex_lock(&tegra->lock); + + err = tegra_xusb_enter_elpg(tegra, wakeup); + if (err < 0) + goto unlock; + +unlock: + mutex_unlock(&tegra->lock); + return err; +} + +static int tegra_xusb_resume(struct device *dev) +{ + struct tegra_xusb *tegra = dev_get_drvdata(dev); + bool wakeup = device_may_wakeup(dev); + int err; + + mutex_lock(&tegra->lock); + + err = tegra_xusb_exit_elpg(tegra, wakeup); + if (err < 0) + goto unlock; + +unlock: + mutex_unlock(&tegra->lock); + return err; } #endif