From patchwork Tue Dec 3 05:23:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11270523 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ECAA4139A for ; Tue, 3 Dec 2019 05:23:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C1B3E2073F for ; Tue, 3 Dec 2019 05:23:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="G4NHZCta" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726323AbfLCFXn (ORCPT ); Tue, 3 Dec 2019 00:23:43 -0500 Received: from mail-pj1-f67.google.com ([209.85.216.67]:36888 "EHLO mail-pj1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726957AbfLCFXm (ORCPT ); Tue, 3 Dec 2019 00:23:42 -0500 Received: by mail-pj1-f67.google.com with SMTP id ep17so1035738pjb.4 for ; Mon, 02 Dec 2019 21:23:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=/nB1fYa5n9lqubCyUBVAtESr33YzPH2vKA4mG1o1BMA=; b=G4NHZCtaScI13ud9Mx0Sn8CcLA81Z5aAXTxjKQg/X07I6EdgIJgEm/z74mLnrkqGe7 suhIexigSE/ogvHIMIwb2iucC++fFuyFbohiwt7Qejhb5x65KrM14ZEekYlQGhKZN8iM y7XDyQueLzSEpRW/oAeLCEHVP6l7TtteYWNCOh4jLSmCUHY4If9PoKUV0yYdD3P67sMX RtksZUSxCq8QGbvUebXvCOWXklHuLymyZXQrCh7LtFAtd23QNcxuUaXwi13e2MDmKgGp MX3j5QOP4GTF+Kivk9dtFf5kyEYImstQUdKQQLQ9wfWBuQWThGMZqDLfXi//IVJeMuhy RVig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=/nB1fYa5n9lqubCyUBVAtESr33YzPH2vKA4mG1o1BMA=; b=im/awzVmSCA91e4pRh5K9iceBGDEG6q1KZe43ShjPZmU0nejRfQrndTwuiAbH3w99s xf2mabMsKMRjPGNr8ldCQsZnixADvWBOp9iwaTBHwJrY8JO5FrwN6xCLShLquIYN4Dxt gd4jhR318h3We981txfO2RKPKy5RGXKYzPbyOGiQT/2w22zOPKUznae5U8l58UHujaNq tkN5BMMl4Cogo8/VrR5wCk2Vrpu366nvbjKk5ReNwc5kvjNJiDtbtZEG5H9l/3GX/HAu Ul2tEKBwbEdGJJHCGvupNN3tuFAwKP+T5jKW9oF0VwH8jvBDb2skLBUbz8d/BhoexVF5 DfOA== X-Gm-Message-State: APjAAAWndjeHejogZzIZZD/4lUy8cz5yfcoJVIrApGjmiTEN72YCnJpB rPuL0Ct4LJ4ywkzgp7l9tE6guQ== X-Google-Smtp-Source: APXvYqw01mqlT0Kebsq/fKYvNedhsbHCUq2O5qTPO5WnkhpvtR1a82eSvBHbHEjQ/goPXrNmy0qVfA== X-Received: by 2002:a17:90a:db43:: with SMTP id u3mr3587202pjx.56.1575350620471; Mon, 02 Dec 2019 21:23:40 -0800 (PST) Received: from localhost ([14.96.109.134]) by smtp.gmail.com with ESMTPSA id o67sm1453975pga.62.2019.12.02.21.23.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 02 Dec 2019 21:23:39 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, swboyd@chromium.org, sivaa@codeaurora.org, Andy Gross Cc: Daniel Lezcano , Amit Kucheria , linux-pm@vger.kernel.org Subject: [PATCH v2 1/9] drivers: thermal: tsens: De-constify struct tsens_features Date: Tue, 3 Dec 2019 10:53:22 +0530 Message-Id: <4ea61a3f0c1b58e139eb20493a5d757d1eddb878.1575349416.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org struct tsens_features is currently initialized as part of platform data at compile-time and not modifiable. We now have some usecases in feature detection across IP versions where it is more flexible to update the features after probing registers. Remove const qualifier from tsens_features and the encapsulating tsens_plat_data. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-8960.c | 2 +- drivers/thermal/qcom/tsens-v0_1.c | 6 +++--- drivers/thermal/qcom/tsens-v1.c | 6 +++--- drivers/thermal/qcom/tsens-v2.c | 6 +++--- drivers/thermal/qcom/tsens.h | 12 ++++++------ 5 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index fb77acb8d13b9..a383a57cfbbcb 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -279,7 +279,7 @@ static const struct tsens_ops ops_8960 = { .resume = resume_8960, }; -const struct tsens_plat_data data_8960 = { +struct tsens_plat_data data_8960 = { .num_sensors = 11, .ops = &ops_8960, }; diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens-v0_1.c index 4b8dd6de02ce4..959a9371d205c 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -327,7 +327,7 @@ static int calibrate_8974(struct tsens_priv *priv) /* v0.1: 8916, 8974 */ -static const struct tsens_features tsens_v0_1_feat = { +static struct tsens_features tsens_v0_1_feat = { .ver_major = VER_0_1, .crit_int = 0, .adc = 1, @@ -377,7 +377,7 @@ static const struct tsens_ops ops_8916 = { .get_temp = get_temp_common, }; -const struct tsens_plat_data data_8916 = { +struct tsens_plat_data data_8916 = { .num_sensors = 5, .ops = &ops_8916, .hw_ids = (unsigned int []){0, 1, 2, 4, 5 }, @@ -392,7 +392,7 @@ static const struct tsens_ops ops_8974 = { .get_temp = get_temp_common, }; -const struct tsens_plat_data data_8974 = { +struct tsens_plat_data data_8974 = { .num_sensors = 11, .ops = &ops_8974, .feat = &tsens_v0_1_feat, diff --git a/drivers/thermal/qcom/tsens-v1.c b/drivers/thermal/qcom/tsens-v1.c index bd2ddb684a45d..b682a4df00810 100644 --- a/drivers/thermal/qcom/tsens-v1.c +++ b/drivers/thermal/qcom/tsens-v1.c @@ -299,7 +299,7 @@ static int calibrate_8976(struct tsens_priv *priv) /* v1.x: msm8956,8976,qcs404,405 */ -static const struct tsens_features tsens_v1_feat = { +static struct tsens_features tsens_v1_feat = { .ver_major = VER_1_X, .crit_int = 0, .adc = 1, @@ -368,7 +368,7 @@ static const struct tsens_ops ops_generic_v1 = { .get_temp = get_temp_tsens_valid, }; -const struct tsens_plat_data data_tsens_v1 = { +struct tsens_plat_data data_tsens_v1 = { .ops = &ops_generic_v1, .feat = &tsens_v1_feat, .fields = tsens_v1_regfields, @@ -381,7 +381,7 @@ static const struct tsens_ops ops_8976 = { }; /* Valid for both MSM8956 and MSM8976. Sensor ID 3 is unused. */ -const struct tsens_plat_data data_8976 = { +struct tsens_plat_data data_8976 = { .num_sensors = 11, .ops = &ops_8976, .hw_ids = (unsigned int[]){0, 1, 2, 4, 5, 6, 7, 8, 9, 10}, diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index a4d15e1abfddd..f1c8ec62e69f9 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -27,7 +27,7 @@ /* v2.x: 8996, 8998, sdm845 */ -static const struct tsens_features tsens_v2_feat = { +static struct tsens_features tsens_v2_feat = { .ver_major = VER_2_X, .crit_int = 1, .adc = 0, @@ -81,14 +81,14 @@ static const struct tsens_ops ops_generic_v2 = { .get_temp = get_temp_tsens_valid, }; -const struct tsens_plat_data data_tsens_v2 = { +struct tsens_plat_data data_tsens_v2 = { .ops = &ops_generic_v2, .feat = &tsens_v2_feat, .fields = tsens_v2_regfields, }; /* Kept around for backward compatibility with old msm8996.dtsi */ -const struct tsens_plat_data data_8996 = { +struct tsens_plat_data data_8996 = { .num_sensors = 13, .ops = &ops_generic_v2, .feat = &tsens_v2_feat, diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index e24a865fbc34c..be364bf1d5a63 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -440,7 +440,7 @@ struct tsens_plat_data { const u32 num_sensors; const struct tsens_ops *ops; unsigned int *hw_ids; - const struct tsens_features *feat; + struct tsens_features *feat; const struct reg_field *fields; }; @@ -481,7 +481,7 @@ struct tsens_priv { struct regmap_field *rf[MAX_REGFIELDS]; struct tsens_context ctx; - const struct tsens_features *feat; + struct tsens_features *feat; const struct reg_field *fields; const struct tsens_ops *ops; @@ -502,15 +502,15 @@ int tsens_set_trips(void *_sensor, int low, int high); irqreturn_t tsens_irq_thread(int irq, void *data); /* TSENS target */ -extern const struct tsens_plat_data data_8960; +extern struct tsens_plat_data data_8960; /* TSENS v0.1 targets */ -extern const struct tsens_plat_data data_8916, data_8974; +extern struct tsens_plat_data data_8916, data_8974; /* TSENS v1 targets */ -extern const struct tsens_plat_data data_tsens_v1, data_8976; +extern struct tsens_plat_data data_tsens_v1, data_8976; /* TSENS v2 targets */ -extern const struct tsens_plat_data data_8996, data_tsens_v2; +extern struct tsens_plat_data data_8996, data_tsens_v2; #endif /* __QCOM_TSENS_H__ */ From patchwork Tue Dec 3 05:23:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11270551 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 52B00139A for ; Tue, 3 Dec 2019 05:24:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 31EB82073C for ; Tue, 3 Dec 2019 05:24:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ANH+ejgm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726991AbfLCFXq (ORCPT ); Tue, 3 Dec 2019 00:23:46 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:36412 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726975AbfLCFXp (ORCPT ); Tue, 3 Dec 2019 00:23:45 -0500 Received: by mail-pf1-f194.google.com with SMTP id b19so1249185pfd.3 for ; Mon, 02 Dec 2019 21:23:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=3jEZWcL7GDtf1dkrmxImtelr/uLTAn26FhaUYUisOhw=; b=ANH+ejgmPfpj3NzV3qtaOVx1ksjtj4W69naT7IoMuV1TjeGCfzrZrda08QEo0VfJoW PQDnpU2Ta8Q+V8e77eF2OsPDDY4DlStmUCh1zqAAMVnCeuoIArFe9a2yjeboqGUBPg/c 1HG/HR+5jBsN8dyNCCq6daMvLh6b742dkK37EaponwduxnD0dYXqzAkF7PxRgz8pabV7 0OwuJ17wONmLe4ZNQhmjFDTsMFm0lblFyZ3mqQGfnWwoUVJiyB7KHZjmeh59ZMYjR/Y9 GXgXTFND0z5uh33fnzPx/WHvA0x2QbmlI1AP07kvsL2HnohhzXA5Vs9iIHmIPuoCHaSc J4ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=3jEZWcL7GDtf1dkrmxImtelr/uLTAn26FhaUYUisOhw=; b=gA61MS0kNFk4jtV0UsMPP44DFtT439ldvn9xsq4U3GdQZKw2Kzz7fYzET9/5G/Pjlz U2OXSh70jALM2mAdBJgzNDObSHx/nLddprYoRCtxr/Cac2f3Lr4ChVK3gcb9IZbM0VVq oYXhNMWCBZGokIg3gvvv36KzYghJSHCmxR6NYZwk6JbB7nfiC0Q8jrqzlZFVS70TpiJ+ TNyUVohjUA4Eh1iiezw+46fanU6/O6QfU2zFbbRFGYRnJSbKtlh4/YVO4PWRqFv1x6do MDUKSovqMi2y85cAn+ndSdZlHEdVZN3qKUfT+rOGq4Weu8QaPlKT7ktsFnOFPlfFXhdQ NeIA== X-Gm-Message-State: APjAAAV9oAbUp/Cmv+oURdhsUL3/w7kOTtU7kHqV7dG+tfvzicw0AfXW VqsGMcTaV7yPA4TDDy5O1D1giA== X-Google-Smtp-Source: APXvYqxOpO0V31DdYipTMzgAyt2QeL+WNvprU5q1bpRDMfG5vQZjOpkOe3TyskN+E7PuiClBUGB5XA== X-Received: by 2002:aa7:86ce:: with SMTP id h14mr2901081pfo.248.1575350624411; Mon, 02 Dec 2019 21:23:44 -0800 (PST) Received: from localhost ([14.96.109.134]) by smtp.gmail.com with ESMTPSA id p16sm1509689pgm.8.2019.12.02.21.23.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 02 Dec 2019 21:23:43 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, swboyd@chromium.org, sivaa@codeaurora.org, Andy Gross Cc: Daniel Lezcano , Amit Kucheria , linux-pm@vger.kernel.org Subject: [PATCH v2 2/9] drivers: thermal: tsens: Pass around struct tsens_sensor as a constant Date: Tue, 3 Dec 2019 10:53:23 +0530 Message-Id: <1d24d634859bebd57e346c3ec4c726a01b7644ba.1575349416.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org All the sensor data is initialised at init time. Lock it down by passing it to functions as a constant. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-8960.c | 2 +- drivers/thermal/qcom/tsens-common.c | 14 +++++++------- drivers/thermal/qcom/tsens.h | 6 +++--- 3 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index a383a57cfbbcb..2a28a5af209ec 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -245,7 +245,7 @@ static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s) return adc_code * slope + offset; } -static int get_temp_8960(struct tsens_sensor *s, int *temp) +static int get_temp_8960(const struct tsens_sensor *s, int *temp) { int ret; u32 code, trdy; diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index c8d57ee0a5bb2..c2df30a08b9e4 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -128,7 +128,7 @@ static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s) * Return: Temperature in milliCelsius on success, a negative errno will * be returned in error cases */ -static int tsens_hw_to_mC(struct tsens_sensor *s, int field) +static int tsens_hw_to_mC(const struct tsens_sensor *s, int field) { struct tsens_priv *priv = s->priv; u32 resolution; @@ -160,7 +160,7 @@ static int tsens_hw_to_mC(struct tsens_sensor *s, int field) * * Return: ADC code or temperature in deciCelsius. */ -static int tsens_mC_to_hw(struct tsens_sensor *s, int temp) +static int tsens_mC_to_hw(const struct tsens_sensor *s, int temp) { struct tsens_priv *priv = s->priv; @@ -275,7 +275,7 @@ static int tsens_threshold_violated(struct tsens_priv *priv, u32 hw_id, } static int tsens_read_irq_state(struct tsens_priv *priv, u32 hw_id, - struct tsens_sensor *s, struct tsens_irq_data *d) + const struct tsens_sensor *s, struct tsens_irq_data *d) { int ret; @@ -346,10 +346,10 @@ irqreturn_t tsens_irq_thread(int irq, void *data) for (i = 0; i < priv->num_sensors; i++) { bool trigger = false; - struct tsens_sensor *s = &priv->sensor[i]; + const struct tsens_sensor *s = &priv->sensor[i]; u32 hw_id = s->hw_id; - if (IS_ERR(priv->sensor[i].tzd)) + if (IS_ERR(s->tzd)) continue; if (!tsens_threshold_violated(priv, hw_id, &d)) continue; @@ -457,7 +457,7 @@ void tsens_disable_irq(struct tsens_priv *priv) regmap_field_write(priv->rf[INT_EN], 0); } -int get_temp_tsens_valid(struct tsens_sensor *s, int *temp) +int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp) { struct tsens_priv *priv = s->priv; int hw_id = s->hw_id; @@ -486,7 +486,7 @@ int get_temp_tsens_valid(struct tsens_sensor *s, int *temp) return 0; } -int get_temp_common(struct tsens_sensor *s, int *temp) +int get_temp_common(const struct tsens_sensor *s, int *temp) { struct tsens_priv *priv = s->priv; int hw_id = s->hw_id; diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index be364bf1d5a63..70dc34c805377 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -67,7 +67,7 @@ struct tsens_ops { /* mandatory callbacks */ int (*init)(struct tsens_priv *priv); int (*calibrate)(struct tsens_priv *priv); - int (*get_temp)(struct tsens_sensor *s, int *temp); + int (*get_temp)(const struct tsens_sensor *s, int *temp); /* optional callbacks */ int (*enable)(struct tsens_priv *priv, int i); void (*disable)(struct tsens_priv *priv); @@ -494,8 +494,8 @@ struct tsens_priv { char *qfprom_read(struct device *dev, const char *cname); void compute_intercept_slope(struct tsens_priv *priv, u32 *pt1, u32 *pt2, u32 mode); int init_common(struct tsens_priv *priv); -int get_temp_tsens_valid(struct tsens_sensor *s, int *temp); -int get_temp_common(struct tsens_sensor *s, int *temp); +int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp); +int get_temp_common(const struct tsens_sensor *s, int *temp); int tsens_enable_irq(struct tsens_priv *priv); void tsens_disable_irq(struct tsens_priv *priv); int tsens_set_trips(void *_sensor, int low, int high); From patchwork Tue Dec 3 05:23:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11270531 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 657A71805 for ; Tue, 3 Dec 2019 05:23:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 44BBF207DD for ; Tue, 3 Dec 2019 05:23:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="OAsl82Oz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727070AbfLCFXt (ORCPT ); Tue, 3 Dec 2019 00:23:49 -0500 Received: from mail-pg1-f194.google.com ([209.85.215.194]:35005 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726987AbfLCFXs (ORCPT ); Tue, 3 Dec 2019 00:23:48 -0500 Received: by mail-pg1-f194.google.com with SMTP id l24so1127734pgk.2 for ; Mon, 02 Dec 2019 21:23:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=jCnbshc6gwC9Lz7KrpZNRQtAnW1kUNCWIyQg9GLVi8g=; b=OAsl82OzpSmTAhx0IKBHZKzsbwj/Z21pQqt+a4HJyo/HZFuWYG9T4G04aGZRPpDabt +EEHPB/YWvTT1xhURL6ea6bIVo+plxAXVlqEIbZR06NB9Sh2Wq9iHh9wwy3WlzDu+HTw uFjhM186omJhFZh1qp3s9THXC88LAjvd7sLJd4FM4Em2wk/cI/SNy0/OyPbVGovb4Q69 GJEWRkCGmkBjBwaoIDjgfYabTSvOlon7UJgG4w9P5zJVxHSdgpBOicTCBHw2ZvQPh4M2 bsPl8engt05uk4jXYpdp992AtjFowJHclWUqfPjTgcuzgsI2DEJPaghc7lXxnn+s0Qvw e2qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=jCnbshc6gwC9Lz7KrpZNRQtAnW1kUNCWIyQg9GLVi8g=; b=NDZZ+3HnouO1ZGqScIcrBPBA1Kxi+Wdzu/Cr3bYlMbrfKlC+NA+JXlD36XWJlXPcri OWXZnpSxnw1bjUYy3xVeUxsg79UY2ZPiRU1lYa8cSgp1NNFbbo+FakzA41FV29j+6L1+ qwGmKdfeCtoX1JlZeBriuiNSy/tHQm9bXr+YA1Ek2KqkUXXurwfxQ+14GDX1iEm2obxI CnrxhGvFMmdcusRkGGOo8mz3y4xYD7hB7jypR3KSxKn3m/pt5yE2RPBPCHubP3J80K+5 iIhZCJJo49QUBH4qcWiBO399WOlljPtKYr4jfQ1i3ME6clcK+2jHaiuyS+Mrxm2Ck5yi dryw== X-Gm-Message-State: APjAAAUv7fe5BX7ktxpDEEAPqiuNEK3Cz78MzrRL1UR2Ipz9VreRoRqx qytMh9gfxDJSj39ATosTOX067g== X-Google-Smtp-Source: APXvYqw8o/ivZvCeU5FcoWoVFv5gCQhQQbbWRwtLMDtOtVpHS+BJUEGR4dGGFMZkC5woDR2/luVSEg== X-Received: by 2002:a63:6787:: with SMTP id b129mr3465932pgc.103.1575350627967; Mon, 02 Dec 2019 21:23:47 -0800 (PST) Received: from localhost ([14.96.109.134]) by smtp.gmail.com with ESMTPSA id z30sm1426685pff.131.2019.12.02.21.23.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 02 Dec 2019 21:23:47 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, swboyd@chromium.org, sivaa@codeaurora.org, Andy Gross Cc: Daniel Lezcano , Amit Kucheria , linux-pm@vger.kernel.org Subject: [PATCH v2 3/9] drivers: thermal: tsens: use simpler variables Date: Tue, 3 Dec 2019 10:53:24 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We already dereference the sensor and save it into a variable. Use the variable directly to make the code easier to read. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index c2df30a08b9e4..1cbc5a6e5b4fd 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -368,7 +368,7 @@ irqreturn_t tsens_irq_thread(int irq, void *data) tsens_set_interrupt(priv, hw_id, UPPER, disable); if (d.up_thresh > temp) { dev_dbg(priv->dev, "[%u] %s: re-arm upper\n", - priv->sensor[i].hw_id, __func__); + hw_id, __func__); tsens_set_interrupt(priv, hw_id, UPPER, enable); } else { trigger = true; @@ -379,7 +379,7 @@ irqreturn_t tsens_irq_thread(int irq, void *data) tsens_set_interrupt(priv, hw_id, LOWER, disable); if (d.low_thresh < temp) { dev_dbg(priv->dev, "[%u] %s: re-arm low\n", - priv->sensor[i].hw_id, __func__); + hw_id, __func__); tsens_set_interrupt(priv, hw_id, LOWER, enable); } else { trigger = true; @@ -392,7 +392,7 @@ irqreturn_t tsens_irq_thread(int irq, void *data) if (trigger) { dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n", hw_id, __func__, temp); - thermal_zone_device_update(priv->sensor[i].tzd, + thermal_zone_device_update(s->tzd, THERMAL_EVENT_UNSPECIFIED); } else { dev_dbg(priv->dev, "[%u] %s: no violation: %d\n", @@ -435,7 +435,7 @@ int tsens_set_trips(void *_sensor, int low, int high) spin_unlock_irqrestore(&priv->ul_lock, flags); dev_dbg(dev, "[%u] %s: (%d:%d)->(%d:%d)\n", - s->hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high); + hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high); return 0; } From patchwork Tue Dec 3 05:23:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11270533 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CE5F9138C for ; Tue, 3 Dec 2019 05:23:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ACF0C2073F for ; Tue, 3 Dec 2019 05:23:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="RlW/Wke8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727110AbfLCFXw (ORCPT ); Tue, 3 Dec 2019 00:23:52 -0500 Received: from mail-pf1-f196.google.com ([209.85.210.196]:34100 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727059AbfLCFXw (ORCPT ); Tue, 3 Dec 2019 00:23:52 -0500 Received: by mail-pf1-f196.google.com with SMTP id n13so1257429pff.1 for ; Mon, 02 Dec 2019 21:23:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=dPgz2TLGaXm8AZ5IU/e4WWLoSFiMiQO40kFKZ/olifE=; b=RlW/Wke8DNfq5+TindW3a7DNLR09DVaesqF1xwIrlU7rF0EUhASXBKcdEv9gChCMzZ XYOazRvnQp5BEKikwNaDgdpOXqIZGn3q6lanaKG0VVk49ZOEbdZeDfoipfCq5ELIMQj1 l+zmNmnCi30CeiFDdCpZFNLjVkhEZwrSF5TTeCJsP86nGSsRgQFi17NQBUwsLWN3lPG4 XYVktpX4JahsUhum0NFi75QXwlGDhJzOsawFqpujLOvLJB5PyoyN6ODaS4V7T8uSFZTh //laIC4A0qj7KfbwbD+XBv++Ues5+BnYRmsODvf/kbCaKBOLc+fIzic6drSvmxvM7SDf z2yA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=dPgz2TLGaXm8AZ5IU/e4WWLoSFiMiQO40kFKZ/olifE=; b=RTj2g5GHQC7RkKx9tLhSv4Jne3rHZ3sQuWZyBPhaUm12g2X9bU7W7asTm05oEit39d IMUP3XPmQKDrlgXnKaeqmhyCuKxGUQmUkS7npWrPnqy4lhymmDxLHkX80g30qderqH2V RltF6pJOyKhTveZ1iBe5xwaF34Rulk/XmI9grfdhYokSetNHOAydeeOL1h1oxN1aP+t/ 5oNWG0dJPHGE52x3bkwa6yLdoV+R6138yIub6i3V5cTSSYFgp27BROXlijsMF47oKRpe w4+GFbsVt5vOx7rKWAwtqloGFY66wOGOJQhl6Zb6q1gqo7JgHQl2lgBrhJywOm9vnRfB tADA== X-Gm-Message-State: APjAAAUvJgdRd9+Z/1zZURrNdf2H+9MygXNKP8fgF56N5Nbx7lbUjG0w 23+VX8DQM8W7+Nmv9CiKHRJCFg== X-Google-Smtp-Source: APXvYqylmspoWJ46AcNlcJaiTcm8u1XOhBNgM1Yg5iDosjeRJVqyvHVAbi4h9+HiQGANGd2ojEB1+A== X-Received: by 2002:a63:f006:: with SMTP id k6mr3420716pgh.380.1575350631471; Mon, 02 Dec 2019 21:23:51 -0800 (PST) Received: from localhost ([14.96.109.134]) by smtp.gmail.com with ESMTPSA id f10sm1388888pfd.28.2019.12.02.21.23.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 02 Dec 2019 21:23:51 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, swboyd@chromium.org, sivaa@codeaurora.org, Andy Gross Cc: Daniel Lezcano , Amit Kucheria , linux-pm@vger.kernel.org Subject: [PATCH v2 4/9] drivers: thermal: tsens: Release device in success path Date: Tue, 3 Dec 2019 10:53:25 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We don't currently call put_device in case of successfully initialising the device. Allow control to fall thru so we can use same code to put_device and return error. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 1cbc5a6e5b4fd..e84e94a6f1a73 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -687,8 +687,6 @@ int __init init_common(struct tsens_priv *priv) tsens_enable_irq(priv); tsens_debug_init(op); - return 0; - err_put_device: put_device(&op->dev); return ret; From patchwork Tue Dec 3 05:23:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11270537 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C1E5F139A for ; Tue, 3 Dec 2019 05:23:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8D7BC207DD for ; Tue, 3 Dec 2019 05:23:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="uZAxKqWE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727165AbfLCFX5 (ORCPT ); Tue, 3 Dec 2019 00:23:57 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:40106 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727059AbfLCFX4 (ORCPT ); Tue, 3 Dec 2019 00:23:56 -0500 Received: by mail-pf1-f194.google.com with SMTP id q8so1241163pfh.7 for ; Mon, 02 Dec 2019 21:23:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=8w3O8kJK6JTKWYTOLIspbo7nR07jsNBKlB261OZVEtM=; b=uZAxKqWEcy29faTTXe2jVdbbU5Ut17g1yPUntWjg2iFjIVevIyE6fSSrrXuZV/cOwm jjDR0dZf3ysYheXyeY0qdEmfCFZLjxqIMz5IarYDA2syYb91NKkiwKU9Rtptg3SduyBB cJ8CavFk9djEqXOQRDMJDEZFxxpKea51/to8/5gijI/xgHx0PGLlYT+1knMm/7ccRht8 lDHhUfp11oPrbPrySmHowxnNhsg2BUAjqbbJ0zOgkxM+qsx8bI8n0nhPW8cT/wtHY9Bq pl7em8fHh+moux7E+yKj9OPBTps7StVesl98lVlv02KTDEPMcoQ6nX787o2QpaPit2Re GSqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=8w3O8kJK6JTKWYTOLIspbo7nR07jsNBKlB261OZVEtM=; b=S0Q/l+0Z3NW7U1CpPBCUvZWjTbiMgTjXuH6nPLWUbYuqt6wmps7nKJp4mU0C1u9iBT tv3FNsqMyfdTvvof/4d5csFzVhHdP4uZuFPRNATv4lqB3XUTi7dTXhOQNu9G9XWtvMnw elaWEsXX++ktxshMhjdmno2flCkA/cnqBJ/gHaiFt4FbXDK7RjmRRaxQtWvCq/FhczGu 3xdQHSwqgWGKDsXJslvIKxIsQyEGYkrxhPPwGvGdRM2Mr5S5ixlzDBNGVD3FAGPS401h TsPEKTtELiEmxvb3LxUAS1Lz+v6hLnDPCPty+2F9mZuqg8VEQW+Hj9VV9qfBJqIc/0CT PIhw== X-Gm-Message-State: APjAAAUoUQam9pzVJYZDhah3xyDUoA3/CpksmEz8XRB2bRPwJ6p5fqqb +T++85cZZK6kVS04vpswS0UN8g== X-Google-Smtp-Source: APXvYqyEzUgxiA1qaPTGx9QEj9sSNAyiQt7FLWNyshKWzynEKcLEukf71AzN8u3Jp8GG5zVeooI4Nw== X-Received: by 2002:a65:66da:: with SMTP id c26mr3470228pgw.354.1575350635780; Mon, 02 Dec 2019 21:23:55 -0800 (PST) Received: from localhost ([14.96.109.134]) by smtp.gmail.com with ESMTPSA id l2sm1112425pjf.4.2019.12.02.21.23.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 02 Dec 2019 21:23:55 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, swboyd@chromium.org, sivaa@codeaurora.org, Andy Gross Cc: Daniel Lezcano , Amit Kucheria , linux-pm@vger.kernel.org Subject: [PATCH v2 5/9] drivers: thermal: tsens: Add critical interrupt support Date: Tue, 3 Dec 2019 10:53:26 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org TSENS IP v2.x adds critical threshold interrupt support for each sensor in addition to the upper/lower threshold interrupt. Add support in the driver. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 126 ++++++++++++++++++++++++++-- drivers/thermal/qcom/tsens-v2.c | 8 +- drivers/thermal/qcom/tsens.c | 26 +++++- drivers/thermal/qcom/tsens.h | 72 ++++++++++++++++ 4 files changed, 221 insertions(+), 11 deletions(-) diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index e84e94a6f1a73..4cf550766cf66 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -23,6 +23,10 @@ * @low_thresh: lower threshold temperature value * @low_irq_mask: mask register for lower threshold irqs * @low_irq_clear: clear register for lower threshold irqs + * @crit_viol: critical threshold violated + * @crit_thresh: critical threshold temperature value + * @crit_irq_mask: mask register for critical threshold irqs + * @crit_irq_clear: clear register for critical threshold irqs * * Structure containing data about temperature threshold settings and * irq status if they were violated. @@ -36,6 +40,10 @@ struct tsens_irq_data { int low_thresh; u32 low_irq_mask; u32 low_irq_clear; + u32 crit_viol; + u32 crit_thresh; + u32 crit_irq_mask; + u32 crit_irq_clear; }; char *qfprom_read(struct device *dev, const char *cname) @@ -189,6 +197,9 @@ static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id, case LOWER: index = LOW_INT_CLEAR_0 + hw_id; break; + case CRITICAL: + /* No critical interrupts before v2 */ + break; } regmap_field_write(priv->rf[index], enable ? 0 : 1); } @@ -214,6 +225,10 @@ static void tsens_set_interrupt_v2(struct tsens_priv *priv, u32 hw_id, index_mask = LOW_INT_MASK_0 + hw_id; index_clear = LOW_INT_CLEAR_0 + hw_id; break; + case CRITICAL: + index_mask = CRIT_INT_MASK_0 + hw_id; + index_clear = CRIT_INT_CLEAR_0 + hw_id; + break; } if (enable) { @@ -268,7 +283,14 @@ static int tsens_threshold_violated(struct tsens_priv *priv, u32 hw_id, ret = regmap_field_read(priv->rf[LOWER_STATUS_0 + hw_id], &d->low_viol); if (ret) return ret; - if (d->up_viol || d->low_viol) + + if (priv->feat->crit_int) { + ret = regmap_field_read(priv->rf[CRITICAL_STATUS_0 + hw_id], &d->crit_viol); + if (ret) + return ret; + } + + if (d->up_viol || d->low_viol || d->crit_viol) return 1; return 0; @@ -292,22 +314,36 @@ static int tsens_read_irq_state(struct tsens_priv *priv, u32 hw_id, ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask); if (ret) return ret; + ret = regmap_field_read(priv->rf[CRIT_INT_CLEAR_0 + hw_id], &d->crit_irq_clear); + if (ret) + return ret; + ret = regmap_field_read(priv->rf[CRIT_INT_MASK_0 + hw_id], &d->crit_irq_mask); + if (ret) + return ret; + + d->crit_thresh = tsens_hw_to_mC(s, CRIT_THRESH_0 + hw_id); } else { /* No mask register on older TSENS */ d->up_irq_mask = 0; d->low_irq_mask = 0; + d->crit_irq_clear = 0; + d->crit_irq_mask = 0; + d->crit_thresh = 0; } d->up_thresh = tsens_hw_to_mC(s, UP_THRESH_0 + hw_id); d->low_thresh = tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id); - dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u) | clr(%u|%u) | mask(%u|%u)\n", - hw_id, __func__, (d->up_viol || d->low_viol) ? "(V)" : "", - d->low_viol, d->up_viol, d->low_irq_clear, d->up_irq_clear, - d->low_irq_mask, d->up_irq_mask); - dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d)\n", hw_id, __func__, - (d->up_viol || d->low_viol) ? "(violation)" : "", - d->low_thresh, d->up_thresh); + dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u|%u) |" + " clr(%u|%u|%u) | mask(%u|%u|%u)\n", + hw_id, __func__, + (d->up_viol || d->low_viol || d->crit_viol) ? "(V)" : "", + d->low_viol, d->up_viol, d->crit_viol, + d->low_irq_clear, d->up_irq_clear, d->crit_irq_clear, + d->low_irq_mask, d->up_irq_mask, d->crit_irq_mask); + dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d:%d)\n", hw_id, __func__, + (d->up_viol || d->low_viol || d->crit_viol) ? "(V)" : "", + d->low_thresh, d->up_thresh, d->crit_thresh); return 0; } @@ -321,6 +357,64 @@ static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver) return 0; } +/** + * tsens_critical_irq_thread - Threaded interrupt handler for critical interrupts + * @irq: irq number + * @data: tsens controller private data + * + * Check all sensors to find ones that violated their critical threshold limits. + * Clear and then re-enable the interrupt. + * + * The level-triggered interrupt might deassert if the temperature returned to + * within the threshold limits by the time the handler got scheduled. We + * consider the irq to have been handled in that case. + * + * Return: IRQ_HANDLED + */ +irqreturn_t tsens_critical_irq_thread(int irq, void *data) +{ + struct tsens_priv *priv = data; + struct tsens_irq_data d; + unsigned long flags; + int temp, ret, i; + + for (i = 0; i < priv->num_sensors; i++) { + const struct tsens_sensor *s = &priv->sensor[i]; + u32 hw_id = s->hw_id; + + if (IS_ERR(s->tzd)) + continue; + if (!tsens_threshold_violated(priv, hw_id, &d)) + continue; + ret = get_temp_tsens_valid(s, &temp); + if (ret) { + dev_err(priv->dev, "[%u] %s: error reading sensor\n", hw_id, __func__); + continue; + } + + spin_lock_irqsave(&priv->ul_lock, flags); + + tsens_read_irq_state(priv, hw_id, s, &d); + + if (d.crit_viol && + !masked_irq(hw_id, d.crit_irq_mask, tsens_version(priv))) { + tsens_set_interrupt(priv, hw_id, CRITICAL, false); + if (d.crit_thresh > temp) { + dev_dbg(priv->dev, "[%u] %s: re-arm upper\n", + hw_id, __func__); + } else { + dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n", + hw_id, __func__, temp); + } + tsens_set_interrupt(priv, hw_id, CRITICAL, true); + } + + spin_unlock_irqrestore(&priv->crit_lock, flags); + } + + return IRQ_HANDLED; +} + /** * tsens_irq_thread - Threaded interrupt handler for uplow interrupts * @irq: irq number @@ -683,6 +777,22 @@ int __init init_common(struct tsens_priv *priv) } } + if (priv->feat->crit_int) { + /* This loop might need changes if enum regfield_ids is reordered */ + for (j = CRITICAL_STATUS_0; j <= CRIT_THRESH_15; j += 16) { + for (i = 0; i < priv->feat->max_sensors; i++) { + int idx = j + i; + + priv->rf[idx] = devm_regmap_field_alloc(dev, priv->tm_map, + priv->fields[idx]); + if (IS_ERR(priv->rf[idx])) { + ret = PTR_ERR(priv->rf[idx]); + goto err_put_device; + } + } + } + } + spin_lock_init(&priv->ul_lock); tsens_enable_irq(priv); tsens_debug_init(op); diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index f1c8ec62e69f9..ce5ef0055d136 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -51,8 +51,9 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 2), /* TEMPERATURE THRESHOLDS */ - REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 0, 11), - REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12, 23), + REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 0, 11), + REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12, 23), + REG_FIELD_FOR_EACH_SENSOR16(CRIT_THRESH, TM_Sn_CRITICAL_THRESHOLD_OFF, 0, 11), /* INTERRUPTS [CLEAR/STATUS/MASK] */ REG_FIELD_SPLIT_BITS_0_15(LOW_INT_STATUS, TM_UPPER_LOWER_INT_STATUS_OFF), @@ -61,6 +62,9 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { REG_FIELD_SPLIT_BITS_16_31(UP_INT_STATUS, TM_UPPER_LOWER_INT_STATUS_OFF), REG_FIELD_SPLIT_BITS_16_31(UP_INT_CLEAR, TM_UPPER_LOWER_INT_CLEAR_OFF), REG_FIELD_SPLIT_BITS_16_31(UP_INT_MASK, TM_UPPER_LOWER_INT_MASK_OFF), + REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_STATUS, TM_CRITICAL_INT_STATUS_OFF), + REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_CLEAR, TM_CRITICAL_INT_CLEAR_OFF), + REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_MASK, TM_CRITICAL_INT_MASK_OFF), /* Sn_STATUS */ REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 11), diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 015e7d2015985..70eae517d31b4 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -87,7 +87,7 @@ static const struct thermal_zone_of_device_ops tsens_of_ops = { static int tsens_register(struct tsens_priv *priv) { - int i, ret, irq; + int i, ret, irq, irq_crit; struct thermal_zone_device *tzd; struct platform_device *pdev; @@ -122,6 +122,30 @@ static int tsens_register(struct tsens_priv *priv) goto err_put_device; } + if (priv->feat->crit_int) { + /* We override ret to 0 i.e. don't return errors + * in this block to allow older DTs to continue working. + */ + + irq_crit = platform_get_irq_byname(pdev, "critical"); + if (irq_crit < 0) { + dev_warn(&pdev->dev, "Missing critical irq in DT\n"); + goto err_crit_int; + } + ret = devm_request_threaded_irq(&pdev->dev, irq_crit, + NULL, tsens_critical_irq_thread, + IRQF_TRIGGER_HIGH | IRQF_ONESHOT, + dev_name(&pdev->dev), priv); + if (ret) { + dev_warn(&pdev->dev, "Failed to request critical irq\n"); + ret = 0; + goto err_crit_int; + } + + enable_irq_wake(irq_crit); + } + +err_crit_int: enable_irq_wake(irq); err_put_device: diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 70dc34c805377..05d5f73178683 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -23,6 +23,7 @@ struct tsens_priv; +/* IP version numbers in ascending order */ enum tsens_ver { VER_0_1 = 0, VER_1_X, @@ -32,6 +33,7 @@ enum tsens_ver { enum tsens_irq_type { LOWER, UPPER, + CRITICAL, }; /** @@ -374,6 +376,70 @@ enum regfield_ids { CRITICAL_STATUS_13, CRITICAL_STATUS_14, CRITICAL_STATUS_15, + CRIT_INT_STATUS_0, /* CRITICAL interrupt status */ + CRIT_INT_STATUS_1, + CRIT_INT_STATUS_2, + CRIT_INT_STATUS_3, + CRIT_INT_STATUS_4, + CRIT_INT_STATUS_5, + CRIT_INT_STATUS_6, + CRIT_INT_STATUS_7, + CRIT_INT_STATUS_8, + CRIT_INT_STATUS_9, + CRIT_INT_STATUS_10, + CRIT_INT_STATUS_11, + CRIT_INT_STATUS_12, + CRIT_INT_STATUS_13, + CRIT_INT_STATUS_14, + CRIT_INT_STATUS_15, + CRIT_INT_CLEAR_0, /* CRITICAL interrupt clear */ + CRIT_INT_CLEAR_1, + CRIT_INT_CLEAR_2, + CRIT_INT_CLEAR_3, + CRIT_INT_CLEAR_4, + CRIT_INT_CLEAR_5, + CRIT_INT_CLEAR_6, + CRIT_INT_CLEAR_7, + CRIT_INT_CLEAR_8, + CRIT_INT_CLEAR_9, + CRIT_INT_CLEAR_10, + CRIT_INT_CLEAR_11, + CRIT_INT_CLEAR_12, + CRIT_INT_CLEAR_13, + CRIT_INT_CLEAR_14, + CRIT_INT_CLEAR_15, + CRIT_INT_MASK_0, /* CRITICAL interrupt mask */ + CRIT_INT_MASK_1, + CRIT_INT_MASK_2, + CRIT_INT_MASK_3, + CRIT_INT_MASK_4, + CRIT_INT_MASK_5, + CRIT_INT_MASK_6, + CRIT_INT_MASK_7, + CRIT_INT_MASK_8, + CRIT_INT_MASK_9, + CRIT_INT_MASK_10, + CRIT_INT_MASK_11, + CRIT_INT_MASK_12, + CRIT_INT_MASK_13, + CRIT_INT_MASK_14, + CRIT_INT_MASK_15, + CRIT_THRESH_0, /* CRITICAL threshold values */ + CRIT_THRESH_1, + CRIT_THRESH_2, + CRIT_THRESH_3, + CRIT_THRESH_4, + CRIT_THRESH_5, + CRIT_THRESH_6, + CRIT_THRESH_7, + CRIT_THRESH_8, + CRIT_THRESH_9, + CRIT_THRESH_10, + CRIT_THRESH_11, + CRIT_THRESH_12, + CRIT_THRESH_13, + CRIT_THRESH_14, + CRIT_THRESH_15, MIN_STATUS_0, /* MIN threshold violated */ MIN_STATUS_1, MIN_STATUS_2, @@ -460,6 +526,8 @@ struct tsens_context { * @srot_map: pointer to SROT register address space * @tm_offset: deal with old device trees that don't address TM and SROT * address space separately + * @ul_lock: lock while processing upper/lower threshold interrupts + * @crit_lock: lock while processing critical threshold interrupts * @rf: array of regmap_fields used to store value of the field * @ctx: registers to be saved and restored during suspend/resume * @feat: features of the IP @@ -479,6 +547,9 @@ struct tsens_priv { /* lock for upper/lower threshold interrupts */ spinlock_t ul_lock; + /* lock for critical threshold interrupts */ + spinlock_t crit_lock; + struct regmap_field *rf[MAX_REGFIELDS]; struct tsens_context ctx; struct tsens_features *feat; @@ -500,6 +571,7 @@ int tsens_enable_irq(struct tsens_priv *priv); void tsens_disable_irq(struct tsens_priv *priv); int tsens_set_trips(void *_sensor, int low, int high); irqreturn_t tsens_irq_thread(int irq, void *data); +irqreturn_t tsens_critical_irq_thread(int irq, void *data); /* TSENS target */ extern struct tsens_plat_data data_8960; From patchwork Tue Dec 3 05:23:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11270539 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 21FE1139A for ; Tue, 3 Dec 2019 05:24:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EADFB2073C for ; Tue, 3 Dec 2019 05:24:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="R/khThpT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727206AbfLCFYA (ORCPT ); Tue, 3 Dec 2019 00:24:00 -0500 Received: from mail-pg1-f193.google.com ([209.85.215.193]:37600 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727158AbfLCFYA (ORCPT ); Tue, 3 Dec 2019 00:24:00 -0500 Received: by mail-pg1-f193.google.com with SMTP id q127so1122502pga.4 for ; Mon, 02 Dec 2019 21:24:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=pxI8Cguos0cKTF66KT8H5qjY9kYioUE26xd0gbt68Gc=; b=R/khThpTZ5VGKEcaAzltnXnGVMvls+2niXJixyEaM7T6feDm4Rsn+Jc+OseJvEUtQn 90wFYjXIl233asz+Nl1z5xXwvkXUJLXtkQr0HqbiHXZbhTb7hMSWw/JI53lV3vmZo3Kb 67TjZMFxmrfSW7V+aqyBPgll3RqxDmIqj/o5DjMfEbc6zaOqeTVrfhr/6pJ3onjPFMM2 x/UVOR9XjeWCZ98luMqS4meyhImXXcEWvxuJTiUojMF+ok84dH+pYHCYf0fWl3drBzGp OJT6ha/blImEElUM064/UbT2yzBf4EbNS8+x0k9tmoMr+lrLETgFewaxbBFVENgkiJ/s xYfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=pxI8Cguos0cKTF66KT8H5qjY9kYioUE26xd0gbt68Gc=; b=VDhyx+H6pe/BLZajAG46oOGRDai31hDQ5EAiLl6H9aLJ69KxwTelOgdELWccTieaab HeR7qzT3tDvbTfw93jcT3yokQhQz+rf7G42hUZvbdjAIRcm3DIRhsGja0lE4B6SJr2Ej SSd4SRtQjQad6sDShq2TRgbUhvy2SzYWKFMLIpQ9F4A6/b6CI/srmtHLNygIFO6hevlc KoKHUP9mnZFM+W7SfWkzHfQQw9PxAPC+wJs+bUuuWaV1pv+I2UQCGJTy4WokoP9QoG1j +FufLI96teose22VoqmVspYGzr/cQLvOalZH8MFFQ1uB0+8tN+yqslla2q8ZslZXtxVv +Tdw== X-Gm-Message-State: APjAAAUv3+2qyP2r0hS6NAxYycKV6S/x2lme36/ueSODBk3R+KTMMpnH HS8omt99VW2oBX5+3ZWlQxqUBA== X-Google-Smtp-Source: APXvYqwEHaDBttyrg0oYI1U7P0VDlO3SVQ9lwX0GOb7tR2Ob8+L59vwzNbg1zoqaYEt32gep2Z6oKQ== X-Received: by 2002:a63:2b84:: with SMTP id r126mr3371433pgr.77.1575350639600; Mon, 02 Dec 2019 21:23:59 -0800 (PST) Received: from localhost ([14.96.109.134]) by smtp.gmail.com with ESMTPSA id k19sm1449664pfg.132.2019.12.02.21.23.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 02 Dec 2019 21:23:59 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, swboyd@chromium.org, sivaa@codeaurora.org, Andy Gross Cc: Daniel Lezcano , Amit Kucheria , linux-pm@vger.kernel.org Subject: [PATCH v2 6/9] drivers: thermal: tsens: Add watchdog support Date: Tue, 3 Dec 2019 10:53:27 +0530 Message-Id: <06b51a577b17120cd6003408034ca15ff9d33b70.1575349416.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org TSENS IP v2.3 onwards adds support for a watchdog to detect if the TSENS HW FSM is stuck. Add support to detect and restart the FSM in the driver. The watchdog is configured by the bootloader, we just enable the feature in the kernel. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 38 +++++++++++++++++++++++++++++ drivers/thermal/qcom/tsens-v2.c | 10 ++++++++ drivers/thermal/qcom/tsens.h | 14 +++++++++++ 3 files changed, 62 insertions(+) diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 4cf550766cf66..ecbc722eb3487 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -377,6 +377,24 @@ irqreturn_t tsens_critical_irq_thread(int irq, void *data) struct tsens_irq_data d; unsigned long flags; int temp, ret, i; + u32 wdog_status, wdog_count; + + if (priv->feat->has_watchdog) { + /* Watchdog is present only on v2.3+ */ + ret = regmap_field_read(priv->rf[WDOG_BARK_STATUS], &wdog_status); + if (ret) + return ret; + + /* Clear WDOG interrupt */ + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1); + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0); + + ret = regmap_field_read(priv->rf[WDOG_BARK_COUNT], &wdog_count); + if (ret) + return ret; + if (wdog_count) + dev_dbg(priv->dev, "%s: watchdog count: %d\n", __func__, wdog_count); + } for (i = 0; i < priv->num_sensors; i++) { const struct tsens_sensor *s = &priv->sensor[i]; @@ -684,6 +702,7 @@ int __init init_common(struct tsens_priv *priv) { void __iomem *tm_base, *srot_base; struct device *dev = priv->dev; + u32 ver_minor; struct resource *res; u32 enabled; int ret, i, j; @@ -733,6 +752,9 @@ int __init init_common(struct tsens_priv *priv) if (IS_ERR(priv->rf[i])) return PTR_ERR(priv->rf[i]); } + ret = regmap_field_read(priv->rf[VER_MINOR], &ver_minor); + if (ret) + goto err_put_device; } priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map, @@ -793,6 +815,22 @@ int __init init_common(struct tsens_priv *priv) } } + if (tsens_version(priv) > VER_1_X && ver_minor > 2) { + /* Watchdog is present only on v2.3+ */ + priv->feat->has_watchdog = 1; + for (i = WDOG_BARK_STATUS; i <= CC_MON_MASK; i++) { + priv->rf[i] = devm_regmap_field_alloc(dev, priv->tm_map, + priv->fields[i]); + if (IS_ERR(priv->rf[i])) { + ret = PTR_ERR(priv->rf[i]); + goto err_put_device; + } + } + /* Enable WDOG and disable cycle completion monitoring */ + regmap_field_write(priv->rf[WDOG_BARK_MASK], 0); + regmap_field_write(priv->rf[CC_MON_MASK], 1); + } + spin_lock_init(&priv->ul_lock); tsens_enable_irq(priv); tsens_debug_init(op); diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index ce5ef0055d136..b293ed32174b5 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -24,6 +24,7 @@ #define TM_Sn_CRITICAL_THRESHOLD_OFF 0x0060 #define TM_Sn_STATUS_OFF 0x00a0 #define TM_TRDY_OFF 0x00e4 +#define TM_WDOG_LOG_OFF 0x013c /* v2.x: 8996, 8998, sdm845 */ @@ -66,6 +67,15 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_CLEAR, TM_CRITICAL_INT_CLEAR_OFF), REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_MASK, TM_CRITICAL_INT_MASK_OFF), + /* WATCHDOG on v2.3 or later */ + [WDOG_BARK_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 31, 31), + [WDOG_BARK_CLEAR] = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF, 31, 31), + [WDOG_BARK_MASK] = REG_FIELD(TM_CRITICAL_INT_MASK_OFF, 31, 31), + [CC_MON_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 30, 30), + [CC_MON_CLEAR] = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF, 30, 30), + [CC_MON_MASK] = REG_FIELD(TM_CRITICAL_INT_MASK_OFF, 30, 30), + [WDOG_BARK_COUNT] = REG_FIELD(TM_WDOG_LOG_OFF, 0, 7), + /* Sn_STATUS */ REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 11), REG_FIELD_FOR_EACH_SENSOR16(VALID, TM_Sn_STATUS_OFF, 21, 21), diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 05d5f73178683..f93f7509a5a46 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -440,6 +440,18 @@ enum regfield_ids { CRIT_THRESH_13, CRIT_THRESH_14, CRIT_THRESH_15, + + /* WATCHDOG */ + WDOG_BARK_STATUS, + WDOG_BARK_CLEAR, + WDOG_BARK_MASK, + WDOG_BARK_COUNT, + + /* CYCLE COMPLETION MONITOR */ + CC_MON_STATUS, + CC_MON_CLEAR, + CC_MON_MASK, + MIN_STATUS_0, /* MIN threshold violated */ MIN_STATUS_1, MIN_STATUS_2, @@ -484,6 +496,7 @@ enum regfield_ids { * @adc: do the sensors only output adc code (instead of temperature)? * @srot_split: does the IP neatly splits the register space into SROT and TM, * with SROT only being available to secure boot firmware? + * @has_watchdog: does this IP support watchdog functionality? * @max_sensors: maximum sensors supported by this version of the IP */ struct tsens_features { @@ -491,6 +504,7 @@ struct tsens_features { unsigned int crit_int:1; unsigned int adc:1; unsigned int srot_split:1; + unsigned int has_watchdog:1; unsigned int max_sensors; };