From patchwork Tue Dec 10 00:52:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11281185 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D869138C for ; Tue, 10 Dec 2019 00:52:37 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7450C20637 for ; Tue, 10 Dec 2019 00:52:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=aj.id.au header.i=@aj.id.au header.b="kzpsk9a+"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="kuB49+zX" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7450C20637 Authentication-Results: mail.kernel.org; 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b=kuB49+zX TByF//kQfk8ML5iLwfoo2LgALJGu0CGBDN5gGRxO1l9z/JRHo6EdImNLORc/CYhy HKiWxi3IIT5P1XR7vTaiI2G/VUpwkyf5wLxgyfH5w2khXYU2hbcVybsC8fmHMrCS pksc3WhGOXBwybnBPxRWGzu7bXYj7g3i7V5D1eMbzee1PIBKw/Jk6+V6jLhCnqDk sa5GX7TlOIuo4SJeLBQL9tBofrAQulV50gHwFuTZ4mqTQHt544YqRYAbYHqI1MhP GxRQaoMI9gYiSQBhEnbxwfhnSGJQZ9of8WenFUQsLBy03trzYnvEl7JGi/PrvbeG 0WxkQ2aA865CQw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedufedrudelvddgvddvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomheptehnughrvgifucflvghffhgvrhihuceorghnughrvgifsegr jhdrihgurdgruheqnecukfhppedvtddvrdekuddrudekrdeftdenucfrrghrrghmpehmrg hilhhfrhhomheprghnughrvgifsegrjhdrihgurdgruhenucevlhhushhtvghrufhiiigv pedt X-ME-Proxy: Received: from mistburn.au.ibm.com (bh02i525f01.au.ibm.com [202.81.18.30]) by mail.messagingengine.com (Postfix) with ESMTPA id BE98B30600D4; Mon, 9 Dec 2019 19:51:25 -0500 (EST) From: Andrew Jeffery To: qemu-arm@nongnu.org Subject: [PATCH 1/2] hw/sd: Configure number of slots exposed by the ASPEED SDHCI model Date: Tue, 10 Dec 2019 11:22:50 +1030 Message-Id: <11e1d38d2374a48996a3496c906db215de246583.1575938234.git-series.andrew@aj.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.27 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org, clg@kaod.org, joel@jms.id.au Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The AST2600 includes a second cut-down version of the SD/MMC controller found in the AST2500, named the eMMC controller. It's cut down in the sense that it only supports one slot rather than two, but it brings the total number of slots supported by the AST2600 to three. The existing code assumed that the SD controller always provided two slots. Rework the SDHCI object to expose the number of slots as a property to be set by the SoC configuration. Signed-off-by: Andrew Jeffery Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/arm/aspeed.c | 2 +- hw/arm/aspeed_ast2600.c | 2 ++ hw/arm/aspeed_soc.c | 3 +++ hw/sd/aspeed_sdhci.c | 11 +++++++++-- include/hw/sd/aspeed_sdhci.h | 1 + 5 files changed, 16 insertions(+), 3 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 028191ff36fc..862549b1f3a9 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -259,7 +259,7 @@ static void aspeed_board_init(MachineState *machine, cfg->i2c_init(bmc); } - for (i = 0; i < ARRAY_SIZE(bmc->soc.sdhci.slots); i++) { + for (i = 0; i < bmc->soc.sdhci.num_slots; i++) { SDHCIState *sdhci = &bmc->soc.sdhci.slots[i]; DriveInfo *dinfo = drive_get_next(IF_SD); BlockBackend *blk; diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 931887ac681f..931ee5aae183 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -208,6 +208,8 @@ static void aspeed_soc_ast2600_init(Object *obj) sysbus_init_child_obj(obj, "sdc", OBJECT(&s->sdhci), sizeof(s->sdhci), TYPE_ASPEED_SDHCI); + object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort); + /* Init sd card slot class here so that they're under the correct parent */ for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i]), diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index f4fe243458fd..3498f55603f2 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -215,6 +215,9 @@ static void aspeed_soc_init(Object *obj) sysbus_init_child_obj(obj, "sdc", OBJECT(&s->sdhci), sizeof(s->sdhci), TYPE_ASPEED_SDHCI); + object_property_set_int(OBJECT(&s->sdhci), ASPEED_SDHCI_NUM_SLOTS, + "num-slots", &error_abort); + /* Init sd card slot class here so that they're under the correct parent */ for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i]), diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c index cff3eb7dd21e..939d1510dedb 100644 --- a/hw/sd/aspeed_sdhci.c +++ b/hw/sd/aspeed_sdhci.c @@ -13,6 +13,7 @@ #include "qapi/error.h" #include "hw/irq.h" #include "migration/vmstate.h" +#include "hw/qdev-properties.h" #define ASPEED_SDHCI_INFO 0x00 #define ASPEED_SDHCI_INFO_RESET 0x00030000 @@ -120,14 +121,14 @@ static void aspeed_sdhci_realize(DeviceState *dev, Error **errp) /* Create input irqs for the slots */ qdev_init_gpio_in_named_with_opaque(DEVICE(sbd), aspeed_sdhci_set_irq, - sdhci, NULL, ASPEED_SDHCI_NUM_SLOTS); + sdhci, NULL, sdhci->num_slots); sysbus_init_irq(sbd, &sdhci->irq); memory_region_init_io(&sdhci->iomem, OBJECT(sdhci), &aspeed_sdhci_ops, sdhci, TYPE_ASPEED_SDHCI, 0x1000); sysbus_init_mmio(sbd, &sdhci->iomem); - for (int i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { + for (int i = 0; i < sdhci->num_slots; ++i) { Object *sdhci_slot = OBJECT(&sdhci->slots[i]); SysBusDevice *sbd_slot = SYS_BUS_DEVICE(&sdhci->slots[i]); @@ -174,6 +175,11 @@ static const VMStateDescription vmstate_aspeed_sdhci = { }, }; +static Property aspeed_sdhci_properties[] = { + DEFINE_PROP_UINT8("num-slots", AspeedSDHCIState, num_slots, 0), + DEFINE_PROP_END_OF_LIST(), +}; + static void aspeed_sdhci_class_init(ObjectClass *classp, void *data) { DeviceClass *dc = DEVICE_CLASS(classp); @@ -181,6 +187,7 @@ static void aspeed_sdhci_class_init(ObjectClass *classp, void *data) dc->realize = aspeed_sdhci_realize; dc->reset = aspeed_sdhci_reset; dc->vmsd = &vmstate_aspeed_sdhci; + dc->props = aspeed_sdhci_properties; } static TypeInfo aspeed_sdhci_info = { diff --git a/include/hw/sd/aspeed_sdhci.h b/include/hw/sd/aspeed_sdhci.h index dfdab4379021..dffbb46946b9 100644 --- a/include/hw/sd/aspeed_sdhci.h +++ b/include/hw/sd/aspeed_sdhci.h @@ -24,6 +24,7 @@ typedef struct AspeedSDHCIState { SysBusDevice parent; SDHCIState slots[ASPEED_SDHCI_NUM_SLOTS]; + uint8_t num_slots; MemoryRegion iomem; qemu_irq irq; From patchwork Tue Dec 10 00:52:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11281193 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2F080138C for ; Tue, 10 Dec 2019 00:53:48 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 05C832073D for ; Tue, 10 Dec 2019 00:53:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=aj.id.au header.i=@aj.id.au header.b="O67l5jMS"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="B4ZmFT+A" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 05C832073D Authentication-Results: mail.kernel.org; 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b=B4ZmFT+A h6pTMgQJGXBRbwvM6zN3HCl+xREwwAgXeU+pzNQxJ71zfumn4wEuf6NjRE4KjvUk ciaxH27yfuzEAI2hjSeFXQU3HmbkMGZWSicNVuy/savCzE9YbCD7m5+9yFC2C67u 0WOMXowkXIhAq68ZnkrM/JSwEcnyopRSXdqAcAFobmHdzyvqd+P0uHav6V9xDj0M CAdhuLiWwd1FNRhiTlmFJTlsfD8/wEuPKgm42saNNGH2rU27GgrgENOWmztvsW6b ENfdRuho0fs2JF60s/OjxvAfwsBohRV5w+ZkxiS1AmtXm4KrQRaYyGE9ovn1FDzT tYW08B3T+FNr/A== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedufedrudelvddgvddvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomheptehnughrvgifucflvghffhgvrhihuceorghnughrvgifsegr jhdrihgurdgruheqnecukfhppedvtddvrdekuddrudekrdeftdenucfrrghrrghmpehmrg hilhhfrhhomheprghnughrvgifsegrjhdrihgurdgruhenucevlhhushhtvghrufhiiigv pedu X-ME-Proxy: Received: from mistburn.au.ibm.com (bh02i525f01.au.ibm.com [202.81.18.30]) by mail.messagingengine.com (Postfix) with ESMTPA id 7283330600BD; Mon, 9 Dec 2019 19:51:28 -0500 (EST) From: Andrew Jeffery To: qemu-arm@nongnu.org Subject: [PATCH 2/2] hw/arm: ast2600: Wire up the eMMC controller Date: Tue, 10 Dec 2019 11:22:51 +1030 Message-Id: <5a93d2f9d375f92e9db6b1cf8687f86beaedcbb2.1575938234.git-series.andrew@aj.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.27 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org, clg@kaod.org, joel@jms.id.au Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Initialise another SDHCI model instance for the AST2600's eMMC controller and use the SDHCI's num_slots value introduced previously to determine whether we should create an SD card instance for the new slot. Signed-off-by: Andrew Jeffery --- hw/arm/aspeed.c | 13 +++++++++++++ hw/arm/aspeed_ast2600.c | 21 +++++++++++++++++++++ include/hw/arm/aspeed_soc.h | 2 ++ 3 files changed, 36 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 862549b1f3a9..0e08d62e9ff3 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -272,6 +272,19 @@ static void aspeed_board_init(MachineState *machine, object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); } + if (bmc->soc.emmc.num_slots) { + SDHCIState *emmc = &bmc->soc.emmc.slots[0]; + DriveInfo *dinfo = drive_get_next(IF_SD); + BlockBackend *blk; + DeviceState *card; + + blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; + card = qdev_create(qdev_get_child_bus(DEVICE(emmc), "sd-bus"), + TYPE_SD_CARD); + qdev_prop_set_drive(card, "drive", blk, &error_fatal); + object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); + } + arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo); } diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 931ee5aae183..723c8196c8a5 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -46,6 +46,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { [ASPEED_ADC] = 0x1E6E9000, [ASPEED_VIDEO] = 0x1E700000, [ASPEED_SDHCI] = 0x1E740000, + [ASPEED_EMMC] = 0x1E750000, [ASPEED_GPIO] = 0x1E780000, [ASPEED_GPIO_1_8V] = 0x1E780800, [ASPEED_RTC] = 0x1E781000, @@ -64,6 +65,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { #define ASPEED_SOC_AST2600_MAX_IRQ 128 +/* Shared Peripheral Interrupt values below are offset by -32 from datasheet */ static const int aspeed_soc_ast2600_irqmap[] = { [ASPEED_UART1] = 47, [ASPEED_UART2] = 48, @@ -77,6 +79,7 @@ static const int aspeed_soc_ast2600_irqmap[] = { [ASPEED_ADC] = 78, [ASPEED_XDMA] = 6, [ASPEED_SDHCI] = 43, + [ASPEED_EMMC] = 15, [ASPEED_GPIO] = 40, [ASPEED_GPIO_1_8V] = 11, [ASPEED_RTC] = 13, @@ -215,6 +218,14 @@ static void aspeed_soc_ast2600_init(Object *obj) sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i]), sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI); } + + sysbus_init_child_obj(obj, "emmc", OBJECT(&s->emmc), sizeof(s->emmc), + TYPE_ASPEED_SDHCI); + + object_property_set_int(OBJECT(&s->emmc), 1, "num-slots", &error_abort); + + sysbus_init_child_obj(obj, "emmc[*]", OBJECT(&s->emmc.slots[0]), + sizeof(s->emmc.slots[0]), TYPE_SYSBUS_SDHCI); } /* @@ -487,6 +498,16 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) sc->memmap[ASPEED_SDHCI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, aspeed_soc_get_irq(s, ASPEED_SDHCI)); + + /* eMMC */ + object_property_set_bool(OBJECT(&s->emmc), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->emmc), 0, sc->memmap[ASPEED_EMMC]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0, + aspeed_soc_get_irq(s, ASPEED_EMMC)); } static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 495c08be1b84..911443f4c071 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -56,6 +56,7 @@ typedef struct AspeedSoCState { AspeedGPIOState gpio; AspeedGPIOState gpio_1_8v; AspeedSDHCIState sdhci; + AspeedSDHCIState emmc; } AspeedSoCState; #define TYPE_ASPEED_SOC "aspeed-soc" @@ -125,6 +126,7 @@ enum { ASPEED_MII4, ASPEED_SDRAM, ASPEED_XDMA, + ASPEED_EMMC, }; #endif /* ASPEED_SOC_H */