From patchwork Wed Dec 11 05:24:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11284271 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 797B8139A for ; Wed, 11 Dec 2019 05:24:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 49688208C3 for ; Wed, 11 Dec 2019 05:24:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="B4wXYxLs"; dkim=pass (1024-bit key) header.d=amazonses.com header.i=@amazonses.com header.b="JfD6t9/H" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726208AbfLKFYZ (ORCPT ); Wed, 11 Dec 2019 00:24:25 -0500 Received: from a27-188.smtp-out.us-west-2.amazonses.com ([54.240.27.188]:38908 "EHLO a27-188.smtp-out.us-west-2.amazonses.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725973AbfLKFYZ (ORCPT ); Wed, 11 Dec 2019 00:24:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=zsmsymrwgfyinv5wlfyidntwsjeeldzt; d=codeaurora.org; t=1576041864; h=From:To:Cc:Subject:Date:Message-Id; bh=veLU7/lZerJDCVvtWTaA7PrEH1gc5h2qtJvMQiuxVLk=; b=B4wXYxLsLD3CJDYWlrQWGkDppDo1YePkz6f9ZJItnBpaQiAiYo6DxWlFQUtpJp1Z kD2TD+zwSRzoARJiWJ8bFGkWACc6Cq7h6ZPKDjUmjLQTI8KLx7LJ1ZHk24rOImQ0tCt 6gtDdUL+JimWKtGshT72rUnmwQS2Xu1DXezFY15A= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=gdwg2y3kokkkj5a55z2ilkup5wp5hhxx; d=amazonses.com; t=1576041864; h=From:To:Cc:Subject:Date:Message-Id:Feedback-ID; bh=veLU7/lZerJDCVvtWTaA7PrEH1gc5h2qtJvMQiuxVLk=; b=JfD6t9/H+zU5EFzOcLzkag+YkU9os6D6Bxl+Co1ReGRh1hL+Tkbf94vu0e+ZzpXu +c+LVcCVYust+5YGDrOQ52eGEvdeVINhJo2KCxuxT7xZ6q5QrQkkG5+hjIIgW+P7ceH jEqSSQUi+dV4Ybd0C0oieTtfCRsK8vfdoxuvaeME= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 2DDCFC433CB Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: linus.walleij@linaro.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, dianders@chromium.org, Rajendra Nayak Subject: [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add new qup functions for sc7180 Date: Wed, 11 Dec 2019 05:24:24 +0000 Message-ID: <0101016ef36a5d13-457e6678-2e83-494e-8494-1b0776d5b7e4-000000@us-west-2.amazonses.com> X-Mailer: git-send-email 2.7.4 X-SES-Outgoing: 2019.12.11-54.240.27.188 Feedback-ID: 1.us-west-2.CZuq2qbDmUIuT3qdvXlRHZZCpfZqZ4GtG9v3VKgRyF0=:AmazonSES Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add new qup functions for qup02/04/11 and qup13 wherein multiple functions (for i2c and uart) share the same pin. This allows users to identify which specific qup function for the instance one needs to use for the pin. Signed-off-by: Rajendra Nayak Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd --- Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt index b5767ee..6ffeac9 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt @@ -125,8 +125,9 @@ to specify in a pin configuration subnode: mi2s_1, mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag, PLL_BIST, pll_bypassnl, pll_reset, prng_rosc, qdss, qdss_cti, qlink_enable, qlink_request, qspi_clk, qspi_cs, - qspi_data, qup00, qup01, qup02, qup03, qup04, qup05, - qup10, qup11, qup12, qup13, qup14, qup15, sdc1_tb, + qspi_data, qup00, qup01, qup02_i2c, qup02_uart, qup03, + qup04_i2c, qup04_uart, qup05, qup10, qup11_i2c, qup11_uart, + qup12, qup13_i2c, qup13_uart, qup14, qup15, sdc1_tb, sdc2_tb, sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt, usb_phy, vfr_1, _V_GPIO, _V_PPS_IN, _V_PPS_OUT, From patchwork Wed Dec 11 05:24:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11284273 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A10BC109A for ; Wed, 11 Dec 2019 05:24:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 73D4E214AF for ; Wed, 11 Dec 2019 05:24:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="ddm7zJzq"; dkim=pass (1024-bit key) header.d=amazonses.com header.i=@amazonses.com header.b="JwlOT05c" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726777AbfLKFYi (ORCPT ); Wed, 11 Dec 2019 00:24:38 -0500 Received: from a27-185.smtp-out.us-west-2.amazonses.com ([54.240.27.185]:33458 "EHLO a27-185.smtp-out.us-west-2.amazonses.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725973AbfLKFYi (ORCPT ); Wed, 11 Dec 2019 00:24:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=zsmsymrwgfyinv5wlfyidntwsjeeldzt; d=codeaurora.org; t=1576041877; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; bh=iKfqfnGlqF3a6xjl+EmFOeS3F4HKZtyPO+p39iDyu+M=; b=ddm7zJzqS8+cdmvtHeXKXUI6FD1OVRB4cBvQxmEPlMNoqx3yMwhOhpNm5u86qU1A A5TUCVycbaD/qc/l/0e6dh2Its29r84pQvLukjgcz08uysXa8+V6S+ih1ZRj9/UeN+W i3eVXpKZX7BhEUXD7Oe8JhqGevmlbNIbODO8hKgc= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=gdwg2y3kokkkj5a55z2ilkup5wp5hhxx; d=amazonses.com; t=1576041877; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:Feedback-ID; bh=iKfqfnGlqF3a6xjl+EmFOeS3F4HKZtyPO+p39iDyu+M=; b=JwlOT05cCGb0IbzEBbNgrHfcDWVNlnZykSG5iRXRTouM6xVpiT7mF8xmL3nNdDcQ IfZpbUDCwwCjBpgdQfSxoSeQTdiBAqBT3kxlym7c76Toux6zXFKn/OBo7rLdfvIfgH2 P4HetQ8XVVaLfUZWRcNHBzC4nfwRsC9+L0ntOpoQ= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=ham autolearn_force=no version=3.4.0 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BA5D2C447A4 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: linus.walleij@linaro.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, dianders@chromium.org, Rajendra Nayak Subject: [PATCH v2 2/2] pinctrl: qcom: sc7180: Add new qup functions Date: Wed, 11 Dec 2019 05:24:37 +0000 Message-ID: <0101016ef36a8ecf-b0d2c2af-5861-4b5b-b70e-6d0d574d4310-000000@us-west-2.amazonses.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576041834-23084-1-git-send-email-rnayak@codeaurora.org> References: <1576041834-23084-1-git-send-email-rnayak@codeaurora.org> X-SES-Outgoing: 2019.12.11-54.240.27.185 Feedback-ID: 1.us-west-2.CZuq2qbDmUIuT3qdvXlRHZZCpfZqZ4GtG9v3VKgRyF0=:AmazonSES Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org on sc7180 we have cases where multiple functions from the same qup instance share the same pin. This is true for qup02/04/11 and qup13. Add new function names to distinguish which qup function to use. The device tree files for this platform haven't landed in mainline yet, so there aren't any users upstream who should break with this change in function names, however, anyone using the devicetree files that were posted on the lists and using these specific function names will need to update their changes. Reported-by: Stephen Boyd Signed-off-by: Rajendra Nayak --- drivers/pinctrl/qcom/pinctrl-sc7180.c | 60 +++++++++++++++++++++++------------ 1 file changed, 40 insertions(+), 20 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c index d6cfad7..6247d92 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc7180.c +++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c @@ -456,14 +456,18 @@ enum sc7180_functions { msm_mux_qspi_data, msm_mux_qup00, msm_mux_qup01, - msm_mux_qup02, + msm_mux_qup02_i2c, + msm_mux_qup02_uart, msm_mux_qup03, - msm_mux_qup04, + msm_mux_qup04_i2c, + msm_mux_qup04_uart, msm_mux_qup05, msm_mux_qup10, - msm_mux_qup11, + msm_mux_qup11_i2c, + msm_mux_qup11_uart, msm_mux_qup12, - msm_mux_qup13, + msm_mux_qup13_i2c, + msm_mux_qup13_uart, msm_mux_qup14, msm_mux_qup15, msm_mux_sdc1_tb, @@ -543,7 +547,10 @@ static const char * const sdc1_tb_groups[] = { static const char * const sdc2_tb_groups[] = { "gpio5", }; -static const char * const qup11_groups[] = { +static const char * const qup11_i2c_groups[] = { + "gpio6", "gpio7", +}; +static const char * const qup11_uart_groups[] = { "gpio6", "gpio7", }; static const char * const ddr_bist_groups[] = { @@ -593,7 +600,10 @@ static const char * const qdss_groups[] = { static const char * const pll_reset_groups[] = { "gpio14", }; -static const char * const qup02_groups[] = { +static const char * const qup02_i2c_groups[] = { + "gpio15", "gpio16", +}; +static const char * const qup02_uart_groups[] = { "gpio15", "gpio16", }; static const char * const cci_i2c_groups[] = { @@ -698,7 +708,10 @@ static const char * const wlan1_adc1_groups[] = { static const char * const atest_usb13_groups[] = { "gpio44", }; -static const char * const qup13_groups[] = { +static const char * const qup13_i2c_groups[] = { + "gpio46", "gpio47", +}; +static const char * const qup13_uart_groups[] = { "gpio46", "gpio47", }; static const char * const gcc_gp1_groups[] = { @@ -848,7 +861,10 @@ static const char * const usb_phy_groups[] = { static const char * const mss_lte_groups[] = { "gpio108", "gpio109", }; -static const char * const qup04_groups[] = { +static const char * const qup04_i2c_groups[] = { + "gpio115", "gpio116", +}; +static const char * const qup04_uart_groups[] = { "gpio115", "gpio116", }; @@ -929,14 +945,18 @@ static const struct msm_function sc7180_functions[] = { FUNCTION(qspi_data), FUNCTION(qup00), FUNCTION(qup01), - FUNCTION(qup02), + FUNCTION(qup02_i2c), + FUNCTION(qup02_uart), FUNCTION(qup03), - FUNCTION(qup04), + FUNCTION(qup04_i2c), + FUNCTION(qup04_uart), FUNCTION(qup05), FUNCTION(qup10), - FUNCTION(qup11), + FUNCTION(qup11_i2c), + FUNCTION(qup11_uart), FUNCTION(qup12), - FUNCTION(qup13), + FUNCTION(qup13_i2c), + FUNCTION(qup13_uart), FUNCTION(qup14), FUNCTION(qup15), FUNCTION(sdc1_tb), @@ -976,8 +996,8 @@ static const struct msm_pingroup sc7180_groups[] = { [3] = PINGROUP(3, SOUTH, qup01, sp_cmu, dbg_out, qdss_cti, _, _, _, _, _), [4] = PINGROUP(4, NORTH, sdc1_tb, _, qdss_cti, _, _, _, _, _, _), [5] = PINGROUP(5, NORTH, sdc2_tb, _, _, _, _, _, _, _, _), - [6] = PINGROUP(6, NORTH, qup11, qup11, _, _, _, _, _, _, _), - [7] = PINGROUP(7, NORTH, qup11, qup11, ddr_bist, _, _, _, _, _, _), + [6] = PINGROUP(6, NORTH, qup11_i2c, qup11_uart, _, _, _, _, _, _, _), + [7] = PINGROUP(7, NORTH, qup11_i2c, qup11_uart, ddr_bist, _, _, _, _, _, _), [8] = PINGROUP(8, NORTH, gp_pdm1, ddr_bist, _, phase_flag, qdss_cti, _, _, _, _), [9] = PINGROUP(9, NORTH, ddr_bist, _, phase_flag, qdss_cti, _, _, _, _, _), [10] = PINGROUP(10, NORTH, mdp_vsync, ddr_bist, _, _, _, _, _, _, _), @@ -985,8 +1005,8 @@ static const struct msm_pingroup sc7180_groups[] = { [12] = PINGROUP(12, SOUTH, mdp_vsync, m_voc, qup01, _, phase_flag, wlan2_adc0, atest_usb10, ddr_pxi3, _), [13] = PINGROUP(13, SOUTH, cam_mclk, pll_bypassnl, qdss, _, _, _, _, _, _), [14] = PINGROUP(14, SOUTH, cam_mclk, pll_reset, qdss, _, _, _, _, _, _), - [15] = PINGROUP(15, SOUTH, cam_mclk, qup02, qup02, qdss, _, _, _, _, _), - [16] = PINGROUP(16, SOUTH, cam_mclk, qup02, qup02, qdss, _, _, _, _, _), + [15] = PINGROUP(15, SOUTH, cam_mclk, qup02_i2c, qup02_uart, qdss, _, _, _, _, _), + [16] = PINGROUP(16, SOUTH, cam_mclk, qup02_i2c, qup02_uart, qdss, _, _, _, _, _), [17] = PINGROUP(17, SOUTH, cci_i2c, _, phase_flag, qdss, _, wlan1_adc0, atest_usb12, ddr_pxi1, atest_char), [18] = PINGROUP(18, SOUTH, cci_i2c, agera_pll, _, phase_flag, qdss, vsense_trigger, ddr_pxi0, atest_char3, _), [19] = PINGROUP(19, SOUTH, cci_i2c, _, phase_flag, qdss, atest_char2, _, _, _, _), @@ -1016,8 +1036,8 @@ static const struct msm_pingroup sc7180_groups[] = { [43] = PINGROUP(43, NORTH, qup12, _, _, _, _, _, _, _, _), [44] = PINGROUP(44, NORTH, qup12, _, phase_flag, qdss_cti, wlan1_adc1, atest_usb13, ddr_pxi1, _, _), [45] = PINGROUP(45, NORTH, qup12, qdss_cti, _, _, _, _, _, _, _), - [46] = PINGROUP(46, NORTH, qup13, qup13, _, _, _, _, _, _, _), - [47] = PINGROUP(47, NORTH, qup13, qup13, _, _, _, _, _, _, _), + [46] = PINGROUP(46, NORTH, qup13_i2c, qup13_uart, _, _, _, _, _, _, _), + [47] = PINGROUP(47, NORTH, qup13_i2c, qup13_uart, _, _, _, _, _, _, _), [48] = PINGROUP(48, NORTH, gcc_gp1, _, _, _, _, _, _, _, _), [49] = PINGROUP(49, WEST, mi2s_1, btfm_slimbus, _, _, _, _, _, _, _), [50] = PINGROUP(50, WEST, mi2s_1, btfm_slimbus, gp_pdm1, _, _, _, _, _, _), @@ -1085,8 +1105,8 @@ static const struct msm_pingroup sc7180_groups[] = { [112] = PINGROUP(112, NORTH, _, _, _, _, _, _, _, _, _), [113] = PINGROUP(113, NORTH, _, _, _, _, _, _, _, _, _), [114] = PINGROUP(114, NORTH, _, _, _, _, _, _, _, _, _), - [115] = PINGROUP(115, WEST, qup04, qup04, _, _, _, _, _, _, _), - [116] = PINGROUP(116, WEST, qup04, qup04, _, _, _, _, _, _, _), + [115] = PINGROUP(115, WEST, qup04_i2c, qup04_uart, _, _, _, _, _, _, _), + [116] = PINGROUP(116, WEST, qup04_i2c, qup04_uart, _, _, _, _, _, _, _), [117] = PINGROUP(117, WEST, dp_hot, _, _, _, _, _, _, _, _), [118] = PINGROUP(118, WEST, _, _, _, _, _, _, _, _, _), [119] = UFS_RESET(ufs_reset, 0x7f000),