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Tue, 10 Dec 2019 22:19:43 -0800 (PST) From: Hsin-Yi Wang To: dri-devel@lists.freedesktop.org Subject: [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding Date: Wed, 11 Dec 2019 14:19:08 +0800 Message-Id: <20191211061911.238393-2-hsinyi@chromium.org> X-Mailer: git-send-email 2.24.0.525.g8f36a354ae-goog In-Reply-To: <20191211061911.238393-1-hsinyi@chromium.org> References: <20191211061911.238393-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 11 Dec 2019 09:20:35 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Jernej Skrabec , Nicolas Boichat , Neil Armstrong , David Airlie , Jonas Karlman , linux-kernel@vger.kernel.org, Rob Herring , Laurent Pinchart , Matthias Brugger , Enric Balletbo i Serra , Russell King Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Nicolas Boichat Add support for analogix,anx7688 Signed-off-by: Nicolas Boichat Signed-off-by: Hsin-Yi Wang --- Change from RFC to v1: - txt to yaml --- .../bindings/display/bridge/anx7688.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/anx7688.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/anx7688.yaml b/Documentation/devicetree/bindings/display/bridge/anx7688.yaml new file mode 100644 index 000000000000..cf79f7cf8fdf --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/anx7688.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/anx7688.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analogix ANX7688 SlimPort (Single-Chip Transmitter for DP over USB-C) + +maintainers: + - Nicolas Boichat + +description: | + The ANX7688 is a single-chip mobile transmitter to support 4K 60 frames per + second (4096x2160p60) or FHD 120 frames per second (1920x1080p120) video + resolution from a smartphone or tablet with full function USB-C. + + This binding only describes the HDMI to DP display bridge. + +properties: + compatible: + const: analogix,anx7688 + + reg: + maxItems: 1 + description: I2C address of the device + + ports: + type: object + + properties: + port@0: + type: object + description: | + Video port for HDMI input + + port@1: + type: object + description: | + Video port for eDP output + + required: + - port@0 + +required: + - compatible + - reg + - ports + +examples: + - | + anx7688: anx7688@2c { + compatible = "analogix,anx7688"; + reg = <0x2c>; + + port { + anx7688_in: endpoint { + remote-endpoint = <&hdmi0_out>; + }; + }; + }; From patchwork Wed Dec 11 06:19:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 11284503 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2ADD213B6 for ; Wed, 11 Dec 2019 09:22:16 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 099912077B for ; Wed, 11 Dec 2019 09:22:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="mv4AwMap" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 099912077B Authentication-Results: mail.kernel.org; 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Tue, 10 Dec 2019 22:19:48 -0800 (PST) From: Hsin-Yi Wang To: dri-devel@lists.freedesktop.org Subject: [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support. Date: Wed, 11 Dec 2019 14:19:09 +0800 Message-Id: <20191211061911.238393-3-hsinyi@chromium.org> X-Mailer: git-send-email 2.24.0.525.g8f36a354ae-goog In-Reply-To: <20191211061911.238393-1-hsinyi@chromium.org> References: <20191211061911.238393-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 11 Dec 2019 09:20:35 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Jernej Skrabec , Nicolas Boichat , Neil Armstrong , David Airlie , Jonas Karlman , linux-kernel@vger.kernel.org, Rob Herring , Laurent Pinchart , Matthias Brugger , Enric Balletbo i Serra , Russell King Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Nicolas Boichat ANX7688 is a HDMI to DP converter (as well as USB-C port controller), that has an internal microcontroller. The only reason a Linux kernel driver is necessary is to reject resolutions that require more bandwidth than what is available on the DP side. DP bandwidth and lane count are reported by the bridge via 2 registers on I2C. Signed-off-by: Nicolas Boichat Signed-off-by: Hsin-Yi Wang Tested-by: Enric Balletbo i Serra --- drivers/gpu/drm/bridge/Kconfig | 9 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++ 3 files changed, 212 insertions(+) create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 34362976cd6f..1f3fc6bec842 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE menu "Display Interface Bridges" depends on DRM && DRM_BRIDGE +config DRM_ANALOGIX_ANX7688 + tristate "Analogix ANX7688 bridge" + select DRM_KMS_HELPER + select REGMAP_I2C + ---help--- + ANX7688 is a transmitter to support DisplayPort over USB-C for + smartphone and tablets. + This driver only supports the HDMI to DP component of the chip. + config DRM_ANALOGIX_ANX78XX tristate "Analogix ANX78XX bridge" select DRM_KMS_HELPER diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 4934fcf5a6f8..7a1e0ec032e6 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c new file mode 100644 index 000000000000..baaed48d6201 --- /dev/null +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * ANX7688 HDMI->DP bridge driver + * + * Copyright 2016 Google LLC + */ + +#include +#include +#include +#include + +/* Register addresses */ +#define VENDOR_ID_REG 0x00 +#define DEVICE_ID_REG 0x02 + +#define FW_VERSION_REG 0x80 + +#define DP_BANDWIDTH_REG 0x85 +#define DP_LANE_COUNT_REG 0x86 + +#define VENDOR_ID 0x1f29 +#define DEVICE_ID 0x7688 + +/* First supported firmware version (0.85) */ +#define MINIMUM_FW_VERSION 0x0085 + +struct anx7688 { + struct drm_bridge bridge; + struct i2c_client *client; + struct regmap *regmap; + + bool filter; +}; + +static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge) +{ + return container_of(bridge, struct anx7688, bridge); +} + +static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + struct anx7688 *anx7688 = bridge_to_anx7688(bridge); + u8 regs[2]; + u8 dpbw, lanecount; + int totalbw, requiredbw; + int ret; + + if (!anx7688->filter) + return true; + + /* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */ + ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2); + if (ret < 0) { + dev_err(&anx7688->client->dev, + "Failed to read bandwidth/lane count\n"); + return false; + } + dpbw = regs[0]; + lanecount = regs[1]; + + /* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */ + if (dpbw > 0x19 || lanecount > 2) { + dev_err(&anx7688->client->dev, + "Invalid bandwidth/lane count (%02x/%d)\n", + dpbw, lanecount); + return false; + } + + /* Compute available bandwidth (kHz) */ + totalbw = dpbw * lanecount * 270000 * 8 / 10; + + /* Required bandwidth (8 bpc, kHz) */ + requiredbw = mode->clock * 8 * 3; + + dev_dbg(&anx7688->client->dev, + "DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n", + totalbw, dpbw, lanecount, requiredbw); + + if (totalbw == 0) { + dev_warn(&anx7688->client->dev, + "Bandwidth/lane count are 0, not rejecting modes\n"); + return true; + } + + return totalbw >= requiredbw; +} + +static const struct drm_bridge_funcs anx7688_bridge_funcs = { + .mode_fixup = anx7688_bridge_mode_fixup, +}; + +static const struct regmap_config anx7688_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int anx7688_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct anx7688 *anx7688; + struct device *dev = &client->dev; + int ret; + u8 buffer[4]; + u16 vendor, device, fwversion; + + anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL); + if (!anx7688) + return -ENOMEM; + +#if IS_ENABLED(CONFIG_OF) + anx7688->bridge.of_node = client->dev.of_node; +#endif + + anx7688->client = client; + i2c_set_clientdata(client, anx7688); + + anx7688->regmap = + devm_regmap_init_i2c(client, &anx7688_regmap_config); + + /* Read both vendor and device id (4 bytes). */ + ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4); + if (ret) { + dev_err(dev, "Failed to read chip vendor/device id\n"); + return ret; + } + + vendor = (u16)buffer[1] << 8 | buffer[0]; + device = (u16)buffer[3] << 8 | buffer[2]; + if (vendor != VENDOR_ID || device != DEVICE_ID) { + dev_err(dev, "Invalid vendor/device id %04x/%04x\n", + vendor, device); + return -ENODEV; + } + + ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2); + if (ret) { + dev_err(&client->dev, "Failed to read firmware version\n"); + return ret; + } + + fwversion = (u16)buffer[0] << 8 | buffer[1]; + dev_info(dev, "ANX7688 firwmare version %02x.%02x\n", + buffer[0], buffer[1]); + + /* FW version >= 0.85 supports bandwidth/lane count registers */ + if (fwversion >= MINIMUM_FW_VERSION) { + anx7688->filter = true; + } else { + /* Warn, but not fail, for backwards compatibility. */ + dev_warn(dev, + "Old ANX7688 FW version (%02x.%02x), not filtering\n", + buffer[0], buffer[1]); + } + + anx7688->bridge.funcs = &anx7688_bridge_funcs; + drm_bridge_add(&anx7688->bridge); + + return 0; +} + +static int anx7688_i2c_remove(struct i2c_client *client) +{ + struct anx7688 *anx7688 = i2c_get_clientdata(client); + + drm_bridge_remove(&anx7688->bridge); + + return 0; +} + +static const struct i2c_device_id anx7688_id[] = { + { "anx7688", 0 }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(i2c, anx7688_id); + +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id anx7688_match_table[] = { + { .compatible = "analogix,anx7688", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, anx7688_match_table); +#endif + +static struct i2c_driver anx7688_driver = { + .driver = { + .name = "anx7688", + .of_match_table = of_match_ptr(anx7688_match_table), + }, + .probe = anx7688_i2c_probe, + .remove = anx7688_i2c_remove, + .id_table = anx7688_id, +}; + +module_i2c_driver(anx7688_driver); + +MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver"); +MODULE_AUTHOR("Nicolas Boichat "); +MODULE_LICENSE("GPL v2"); From patchwork Wed Dec 11 06:19:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 11284487 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7138114BD for ; Wed, 11 Dec 2019 09:21:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4FE7C2077B for ; Wed, 11 Dec 2019 09:21:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="F9nIloV3" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4FE7C2077B Authentication-Results: mail.kernel.org; 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Tue, 10 Dec 2019 22:19:52 -0800 (PST) From: Hsin-Yi Wang To: dri-devel@lists.freedesktop.org Subject: [PATCH RESEND 3/4] dt-bindings: drm/bridge: Add GPIO display mux binding Date: Wed, 11 Dec 2019 14:19:10 +0800 Message-Id: <20191211061911.238393-4-hsinyi@chromium.org> X-Mailer: git-send-email 2.24.0.525.g8f36a354ae-goog In-Reply-To: <20191211061911.238393-1-hsinyi@chromium.org> References: <20191211061911.238393-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 11 Dec 2019 09:20:35 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Jernej Skrabec , Nicolas Boichat , Neil Armstrong , David Airlie , Jonas Karlman , linux-kernel@vger.kernel.org, Rob Herring , Laurent Pinchart , Matthias Brugger , Enric Balletbo i Serra , Russell King Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Nicolas Boichat Add bindings for Generic GPIO mux driver. Signed-off-by: Nicolas Boichat Signed-off-by: Hsin-Yi Wang --- Change from RFC to v1: - txt to yaml --- .../bindings/display/bridge/gpio-mux.yaml | 89 +++++++++++++++++++ 1 file changed, 89 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/gpio-mux.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/gpio-mux.yaml b/Documentation/devicetree/bindings/display/bridge/gpio-mux.yaml new file mode 100644 index 000000000000..cef098749066 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/gpio-mux.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/gpio-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic display mux (1 input, 2 outputs) + +maintainers: + - Nicolas Boichat + +description: | + This bindings describes a simple display (e.g. HDMI) mux, that has 1 + input, and 2 outputs. The mux status is controlled by hardware, and + its status is read back using a GPIO. + +properties: + compatible: + const: gpio-display-mux + + detect-gpios: + maxItems: 1 + description: GPIO that indicates the active output + + ports: + type: object + + properties: + port@0: + type: object + description: | + Video port for input. + + port@1: + type: object + description: | + 2 video ports for output. + The reg value in the endpoints matches the GPIO status: when + GPIO is asserted, endpoint with reg value <1> is selected. + + required: + - port@0 + - port@1 + +required: + - compatible + - detect-gpios + - ports + +examples: + - | + hdmi_mux: hdmi_mux { + compatible = "gpio-display-mux"; + status = "okay"; + detect-gpios = <&pio 36 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_mux_pins>; + ddc-i2c-bus = <&hdmiddc0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { /* input */ + reg = <0>; + + hdmi_mux_in: endpoint { + remote-endpoint = <&hdmi0_out>; + }; + }; + + port@1 { /* output */ + reg = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + hdmi_mux_out_anx: endpoint@0 { + reg = <0>; + remote-endpoint = <&anx7688_in>; + }; + + hdmi_mux_out_hdmi: endpoint@1 { + reg = <1>; + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; From patchwork Wed Dec 11 06:19:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 11284483 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3CBFF13B6 for ; Wed, 11 Dec 2019 09:21:38 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1B6282077B for ; Wed, 11 Dec 2019 09:21:38 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Tue, 10 Dec 2019 22:20:00 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:b852:bd51:9305:4261]) by smtp.gmail.com with ESMTPSA id h5sm1225579pfk.30.2019.12.10.22.19.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2019 22:19:59 -0800 (PST) From: Hsin-Yi Wang To: dri-devel@lists.freedesktop.org Subject: [PATCH RESEND 4/4] drm: bridge: Generic GPIO mux driver Date: Wed, 11 Dec 2019 14:19:11 +0800 Message-Id: <20191211061911.238393-5-hsinyi@chromium.org> X-Mailer: git-send-email 2.24.0.525.g8f36a354ae-goog In-Reply-To: <20191211061911.238393-1-hsinyi@chromium.org> References: <20191211061911.238393-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 11 Dec 2019 09:20:35 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Jernej Skrabec , Nicolas Boichat , Neil Armstrong , David Airlie , Jonas Karlman , linux-kernel@vger.kernel.org, Rob Herring , Laurent Pinchart , Matthias Brugger , Enric Balletbo i Serra , Russell King Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Nicolas Boichat This driver supports single input, 2 output display mux (e.g. HDMI mux), that provide its status via a GPIO. Signed-off-by: Nicolas Boichat Signed-off-by: Hsin-Yi Wang Tested-by: Enric Balletbo i Serra --- drivers/gpu/drm/bridge/Kconfig | 10 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/generic-gpio-mux.c | 306 ++++++++++++++++++++++ 3 files changed, 317 insertions(+) create mode 100644 drivers/gpu/drm/bridge/generic-gpio-mux.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 1f3fc6bec842..4734f6993858 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -54,6 +54,16 @@ config DRM_DUMB_VGA_DAC Support for non-programmable RGB to VGA DAC bridges, such as ADI ADV7123, TI THS8134 and THS8135 or passive resistor ladder DACs. +config DRM_GENERIC_GPIO_MUX + tristate "Generic GPIO-controlled mux" + depends on OF + select DRM_KMS_HELPER + ---help--- + This bridge driver models a GPIO-controlled display mux with one + input, 2 outputs (e.g. an HDMI mux). The hardware decides which output + is active, reports it as a GPIO, and the driver redirects calls to the + appropriate downstream bridge (if any). + config DRM_LVDS_ENCODER tristate "Transparent parallel to LVDS encoder support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 7a1e0ec032e6..1c0c92667ac4 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o +obj-$(CONFIG_DRM_GENERIC_GPIO_MUX) += generic-gpio-mux.o obj-$(CONFIG_DRM_LVDS_ENCODER) += lvds-encoder.o obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v3-fw.o obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o diff --git a/drivers/gpu/drm/bridge/generic-gpio-mux.c b/drivers/gpu/drm/bridge/generic-gpio-mux.c new file mode 100644 index 000000000000..ba08321dcc17 --- /dev/null +++ b/drivers/gpu/drm/bridge/generic-gpio-mux.c @@ -0,0 +1,306 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Generic gpio mux bridge driver + * + * Copyright 2016 Google LLC + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct gpio_display_mux { + struct device *dev; + + struct gpio_desc *gpiod_detect; + int detect_irq; + + struct drm_bridge bridge; + + struct drm_bridge *next[2]; +}; + +static inline struct gpio_display_mux *bridge_to_gpio_display_mux( + struct drm_bridge *bridge) +{ + return container_of(bridge, struct gpio_display_mux, bridge); +} + +static irqreturn_t gpio_display_mux_det_threaded_handler(int unused, void *data) +{ + struct gpio_display_mux *gpio_display_mux = data; + int active = gpiod_get_value(gpio_display_mux->gpiod_detect); + + dev_dbg(gpio_display_mux->dev, "Interrupt %d!\n", active); + + if (gpio_display_mux->bridge.dev) + drm_kms_helper_hotplug_event(gpio_display_mux->bridge.dev); + + return IRQ_HANDLED; +} + +static int gpio_display_mux_attach(struct drm_bridge *bridge) +{ + struct gpio_display_mux *gpio_display_mux = + bridge_to_gpio_display_mux(bridge); + struct drm_bridge *next; + int i; + + for (i = 0; i < ARRAY_SIZE(gpio_display_mux->next); i++) { + next = gpio_display_mux->next[i]; + if (next) + next->encoder = bridge->encoder; + } + + return 0; +} + +static bool gpio_display_mux_mode_fixup(struct drm_bridge *bridge, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + struct gpio_display_mux *gpio_display_mux = + bridge_to_gpio_display_mux(bridge); + int active; + struct drm_bridge *next; + + active = gpiod_get_value(gpio_display_mux->gpiod_detect); + next = gpio_display_mux->next[active]; + + if (next && next->funcs->mode_fixup) + return next->funcs->mode_fixup(next, mode, adjusted_mode); + else + return true; +} + +static void gpio_display_mux_mode_set(struct drm_bridge *bridge, + struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + struct gpio_display_mux *gpio_display_mux = + bridge_to_gpio_display_mux(bridge); + int active; + struct drm_bridge *next; + + active = gpiod_get_value(gpio_display_mux->gpiod_detect); + next = gpio_display_mux->next[active]; + + if (next && next->funcs->mode_set) + next->funcs->mode_set(next, mode, adjusted_mode); +} + +/** + * Since this driver _reacts_ to mux changes, we need to make sure all + * downstream bridges are pre-enabled. + */ +static void gpio_display_mux_pre_enable(struct drm_bridge *bridge) +{ + struct gpio_display_mux *gpio_display_mux = + bridge_to_gpio_display_mux(bridge); + struct drm_bridge *next; + int i; + + for (i = 0; i < ARRAY_SIZE(gpio_display_mux->next); i++) { + next = gpio_display_mux->next[i]; + if (next && next->funcs->pre_enable) + next->funcs->pre_enable(next); + } +} + +static void gpio_display_mux_post_disable(struct drm_bridge *bridge) +{ + struct gpio_display_mux *gpio_display_mux = + bridge_to_gpio_display_mux(bridge); + struct drm_bridge *next; + int i; + + for (i = 0; i < ARRAY_SIZE(gpio_display_mux->next); i++) { + next = gpio_display_mux->next[i]; + if (next && next->funcs->post_disable) + next->funcs->post_disable(next); + } +} + +/** + * In an ideal mux driver, only the currently selected bridge should be enabled. + * For the sake of simplicity, we just just enable/disable all downstream + * bridges at the same time. + */ +static void gpio_display_mux_enable(struct drm_bridge *bridge) +{ + struct gpio_display_mux *gpio_display_mux = + bridge_to_gpio_display_mux(bridge); + struct drm_bridge *next; + int i; + + for (i = 0; i < ARRAY_SIZE(gpio_display_mux->next); i++) { + next = gpio_display_mux->next[i]; + if (next && next->funcs->enable) + next->funcs->enable(next); + } +} + +static void gpio_display_mux_disable(struct drm_bridge *bridge) +{ + struct gpio_display_mux *gpio_display_mux = + bridge_to_gpio_display_mux(bridge); + struct drm_bridge *next; + int i; + + for (i = 0; i < ARRAY_SIZE(gpio_display_mux->next); i++) { + next = gpio_display_mux->next[i]; + if (next && next->funcs->disable) + next->funcs->disable(next); + } +} + +static const struct drm_bridge_funcs gpio_display_mux_bridge_funcs = { + .attach = gpio_display_mux_attach, + .mode_fixup = gpio_display_mux_mode_fixup, + .disable = gpio_display_mux_disable, + .post_disable = gpio_display_mux_post_disable, + .mode_set = gpio_display_mux_mode_set, + .pre_enable = gpio_display_mux_pre_enable, + .enable = gpio_display_mux_enable, +}; + +static int gpio_display_mux_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct gpio_display_mux *gpio_display_mux; + struct device_node *port, *ep, *remote; + int ret; + u32 reg; + + gpio_display_mux = devm_kzalloc(dev, sizeof(*gpio_display_mux), + GFP_KERNEL); + if (!gpio_display_mux) + return -ENOMEM; + + platform_set_drvdata(pdev, gpio_display_mux); + gpio_display_mux->dev = &pdev->dev; + + gpio_display_mux->bridge.of_node = dev->of_node; + + gpio_display_mux->gpiod_detect = + devm_gpiod_get(dev, "detect", GPIOD_IN); + if (IS_ERR(gpio_display_mux->gpiod_detect)) + return PTR_ERR(gpio_display_mux->gpiod_detect); + + gpio_display_mux->detect_irq = + gpiod_to_irq(gpio_display_mux->gpiod_detect); + if (gpio_display_mux->detect_irq < 0) { + dev_err(dev, "Failed to get output irq %d\n", + gpio_display_mux->detect_irq); + return -ENODEV; + } + + port = of_graph_get_port_by_id(dev->of_node, 1); + if (!port) { + dev_err(dev, "Missing output port node\n"); + return -EINVAL; + } + + for_each_child_of_node(port, ep) { + if (!ep->name || (of_node_cmp(ep->name, "endpoint") != 0)) { + of_node_put(ep); + continue; + } + + if (of_property_read_u32(ep, "reg", ®) < 0 || + reg >= ARRAY_SIZE(gpio_display_mux->next)) { + dev_err(dev, + "Missing/invalid reg property for endpoint %s\n", + ep->full_name); + of_node_put(ep); + of_node_put(port); + return -EINVAL; + } + + remote = of_graph_get_remote_port_parent(ep); + if (!remote) { + dev_err(dev, + "Missing connector/bridge node for endpoint %s\n", + ep->full_name); + of_node_put(ep); + of_node_put(port); + return -EINVAL; + } + of_node_put(ep); + + if (of_device_is_compatible(remote, "hdmi-connector")) { + of_node_put(remote); + continue; + } + + gpio_display_mux->next[reg] = of_drm_find_bridge(remote); + if (!gpio_display_mux->next[reg]) { + dev_err(dev, "Waiting for external bridge %s\n", + remote->name); + of_node_put(remote); + of_node_put(port); + return -EPROBE_DEFER; + } + + of_node_put(remote); + } + of_node_put(port); + + gpio_display_mux->bridge.funcs = &gpio_display_mux_bridge_funcs; + drm_bridge_add(&gpio_display_mux->bridge); + + ret = devm_request_threaded_irq(dev, gpio_display_mux->detect_irq, + NULL, + gpio_display_mux_det_threaded_handler, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | + IRQF_ONESHOT, + "gpio-display-mux-det", gpio_display_mux); + if (ret) { + dev_err(dev, "Failed to request MUX_DET threaded irq\n"); + goto err_bridge_remove; + } + + return 0; + +err_bridge_remove: + drm_bridge_remove(&gpio_display_mux->bridge); + + return ret; +} + +static int gpio_display_mux_remove(struct platform_device *pdev) +{ + struct gpio_display_mux *gpio_display_mux = platform_get_drvdata(pdev); + + drm_bridge_remove(&gpio_display_mux->bridge); + + return 0; +} + +static const struct of_device_id gpio_display_mux_match[] = { + { .compatible = "gpio-display-mux", }, + {}, +}; + +struct platform_driver gpio_display_mux_driver = { + .probe = gpio_display_mux_probe, + .remove = gpio_display_mux_remove, + .driver = { + .name = "gpio-display-mux", + .of_match_table = gpio_display_mux_match, + }, +}; + +module_platform_driver(gpio_display_mux_driver); + +MODULE_DESCRIPTION("GPIO-controlled display mux"); +MODULE_AUTHOR("Nicolas Boichat "); +MODULE_LICENSE("GPL v2");