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[2001:470:27:1fa::2]) by smtp.gmail.com with ESMTPSA id x12sm3771705ljd.92.2019.12.12.15.15.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Dec 2019 15:15:49 -0800 (PST) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH] target/xtensa: fix ps.ring use in MPU configs Date: Thu, 12 Dec 2019 15:15:37 -0800 Message-Id: <20191212231537.2766-1-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::242 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Allow ps.ring modification by wsr.ps/xsr.ps and use ps.ring value in xtensa_get_[c]ring on configurations with MPU. Signed-off-by: Max Filippov --- target/xtensa/cpu.h | 10 +++++++--- target/xtensa/translate.c | 3 ++- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index b363ffcf1066..75e65df59704 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -645,7 +645,9 @@ static inline int xtensa_get_cintlevel(const CPUXtensaState *env) static inline int xtensa_get_ring(const CPUXtensaState *env) { - if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) { + if (xtensa_option_bits_enabled(env->config, + XTENSA_OPTION_BIT(XTENSA_OPTION_MMU) | + XTENSA_OPTION_BIT(XTENSA_OPTION_MPU))) { return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; } else { return 0; @@ -654,8 +656,10 @@ static inline int xtensa_get_ring(const CPUXtensaState *env) static inline int xtensa_get_cring(const CPUXtensaState *env) { - if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) && - (env->sregs[PS] & PS_EXCM) == 0) { + if (xtensa_option_bits_enabled(env->config, + XTENSA_OPTION_BIT(XTENSA_OPTION_MMU) | + XTENSA_OPTION_BIT(XTENSA_OPTION_MPU)) && + (env->sregs[PS] & PS_EXCM) == 0) { return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; } else { return 0; diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 4a14fdb3f1db..159bbd404885 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -2713,7 +2713,8 @@ static void translate_wsr_ps(DisasContext *dc, const OpcodeArg arg[], uint32_t mask = PS_WOE | PS_CALLINC | PS_OWB | PS_UM | PS_EXCM | PS_INTLEVEL; - if (option_enabled(dc, XTENSA_OPTION_MMU)) { + if (option_enabled(dc, XTENSA_OPTION_MMU) || + option_enabled(dc, XTENSA_OPTION_MPU)) { mask |= PS_RING; } tcg_gen_andi_i32(cpu_SR[par[0]], arg[0].in, mask);