From patchwork Mon Dec 23 22:40:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11308801 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1AE19109A for ; Mon, 23 Dec 2019 22:38:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 03173206B7 for ; Mon, 23 Dec 2019 22:38:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 03173206B7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A14B89E2A; Mon, 23 Dec 2019 22:38:27 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 561A189E2A for ; Mon, 23 Dec 2019 22:38:26 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Dec 2019 14:38:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,349,1571727600"; d="scan'208";a="219628405" Received: from labuser-z97x-ud5h.jf.intel.com ([10.54.75.49]) by orsmga003.jf.intel.com with ESMTP; 23 Dec 2019 14:38:25 -0800 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Mon, 23 Dec 2019 14:40:04 -0800 Message-Id: <20191223224006.5081-1-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20191221020109.27871-1-manasi.d.navare@intel.com> References: <20191221020109.27871-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In case of tiled displays, all the tiles are linke dto each other for transcoder port sync. So in intel_atomic_check() we need to make sure that we add all the tiles to the modeset and if one of the tiles needs a full modeset then mark all other tiles for a full modeset. We also need to force modeset for all synced crtcs after fastset check. v5: * Rebase v4: * Fix logic for modeset_synced_crtcs (Ville) v3: * Add tile checks only for Gen >11 v2: * Change crtc_state scope, remove tile_grp_id (Ville) * Use intel_connector_needs_modeset() (Ville) * Add modeset_synced_crtcs (Ville) * Make sure synced crtcs are forced full modeset after fastset check (Ville) Suggested-by: Ville Syrjälä Cc: Ville Syrjälä Cc: José Roberto de Souza Cc: Matt Roper Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/5 Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_display.c | 123 +++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 94fc4b5bacc0..45a699bac34a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -14304,6 +14304,118 @@ static bool intel_cpu_transcoder_needs_modeset(struct intel_atomic_state *state, return false; } +static void +intel_modeset_synced_crtcs(struct intel_atomic_state *state, + u8 transcoders) +{ + struct intel_crtc_state *new_crtc_state; + struct intel_crtc *crtc; + int i; + + for_each_new_intel_crtc_in_state(state, crtc, + new_crtc_state, i) { + if (transcoders & BIT(new_crtc_state->cpu_transcoder)) { + new_crtc_state->uapi.mode_changed = true; + new_crtc_state->update_pipe = false; + } + } +} + +static void +intel_atomic_check_synced_crtcs(struct intel_atomic_state *state) +{ + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_crtc_state *new_crtc_state; + struct intel_crtc *crtc; + int i; + + if (INTEL_GEN(dev_priv) < 11) + return; + + for_each_new_intel_crtc_in_state(state, crtc, + new_crtc_state, i) { + if (is_trans_port_sync_master(new_crtc_state) && + needs_modeset(new_crtc_state)) { + intel_modeset_synced_crtcs(state, + new_crtc_state->sync_mode_slaves_mask); + } else if (is_trans_port_sync_slave(new_crtc_state) && + needs_modeset(new_crtc_state)) { + intel_modeset_synced_crtcs(state, + BIT(new_crtc_state->master_transcoder)); + } + } +} + +static int +intel_modeset_all_tiles(struct intel_atomic_state *state, int tile_grp_id) +{ + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct drm_connector *connector; + struct drm_connector_list_iter conn_iter; + int ret = 0; + + drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); + drm_for_each_connector_iter(connector, &conn_iter) { + struct drm_connector_state *conn_state; + struct drm_crtc_state *crtc_state; + + if (!connector->has_tile || + connector->tile_group->id != tile_grp_id) + continue; + conn_state = drm_atomic_get_connector_state(&state->base, + connector); + if (IS_ERR(conn_state)) { + ret = PTR_ERR(conn_state); + break; + } + + if (!conn_state->crtc) + continue; + + crtc_state = drm_atomic_get_crtc_state(&state->base, + conn_state->crtc); + if (IS_ERR(crtc_state)) { + ret = PTR_ERR(conn_state); + break; + } + crtc_state->mode_changed = true; + ret = drm_atomic_add_affected_connectors(&state->base, + conn_state->crtc); + if (ret) + break; + } + drm_connector_list_iter_end(&conn_iter); + + return ret; +} + +static int +intel_atomic_check_tiled_conns(struct intel_atomic_state *state) +{ + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct drm_connector *connector; + struct drm_connector_state *old_conn_state, *new_conn_state; + int i, ret; + + if (INTEL_GEN(dev_priv) < 11) + return 0; + + /* Is tiled, mark all other tiled CRTCs as needing a modeset */ + for_each_oldnew_connector_in_state(&state->base, connector, + old_conn_state, new_conn_state, i) { + if (!connector->has_tile) + continue; + if (!intel_connector_needs_modeset(state, connector)) + continue; + + ret = intel_modeset_all_tiles(state, connector->tile_group->id); + if (ret) + return ret; + } + + return 0; +} + /** * intel_atomic_check - validate state object * @dev: drm device @@ -14331,6 +14443,10 @@ static int intel_atomic_check(struct drm_device *dev, if (ret) goto fail; + ret = intel_atomic_check_tiled_conns(state); + if (ret) + goto fail; + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { if (!needs_modeset(new_crtc_state)) { @@ -14378,6 +14494,13 @@ static int intel_atomic_check(struct drm_device *dev, } } + /* + * In case of port synced crtcs, if one of the synced crtcs + * needs a full modeset, all other synced crtcs should be + * forced a full modeset. + */ + intel_atomic_check_synced_crtcs(state); + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { if (needs_modeset(new_crtc_state)) {