From patchwork Mon Dec 30 09:23:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Faiz Abbas X-Patchwork-Id: 11312783 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 66A7B930 for ; Mon, 30 Dec 2019 09:22:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 39A26207E0 for ; Mon, 30 Dec 2019 09:22:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="HD174iY7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727302AbfL3JWg (ORCPT ); Mon, 30 Dec 2019 04:22:36 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:42192 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727162AbfL3JWg (ORCPT ); Mon, 30 Dec 2019 04:22:36 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBU9MTaE003658; Mon, 30 Dec 2019 03:22:29 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577697749; bh=OJA99jZBbljYKu/eIbyE5SJxvJXIQvpqRdw8rl7bW6M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=HD174iY7G0vpuvI91CRG7pjKaNXMAvNZPYvSld6eMFuVv+pPIatYRh2UhQU0pj+EM trJ4y3dnPrpINaKCzO6YEEdHEIRaUCMlO4YD+a7U8NcLfXHpVCSA1CBZsL9E8sFH0G x5Whv3aqPci1p+rC0OgWQMap401VWV4lLdcD0AoA= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBU9MTdD130939 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 30 Dec 2019 03:22:29 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Mon, 30 Dec 2019 03:22:28 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Mon, 30 Dec 2019 03:22:28 -0600 Received: from a0230074-OptiPlex-7010.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBU9MOJj109856; Mon, 30 Dec 2019 03:22:27 -0600 From: Faiz Abbas To: , CC: , , , Subject: [PATCH 1/3] mmc: sdhci: Add Quirk to reset data lines after tuning Date: Mon, 30 Dec 2019 14:53:41 +0530 Message-ID: <20191230092343.30692-2-faiz_abbas@ti.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20191230092343.30692-1-faiz_abbas@ti.com> References: <20191230092343.30692-1-faiz_abbas@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Some arasan controllers have data leftover in the buffer after tuning procedure is complete which interferes with future data commands. Add a quirk to reset the data after tuning is finished. Signed-off-by: Faiz Abbas --- drivers/mmc/host/sdhci.c | 3 +++ drivers/mmc/host/sdhci.h | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 1b1c26da3fe0..e4b478efb560 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -2316,6 +2316,9 @@ EXPORT_SYMBOL_GPL(sdhci_start_tuning); void sdhci_end_tuning(struct sdhci_host *host) { + if (host->quirks2 & SDHCI_QUIRK2_RESET_DATA_POST_TUNING) + sdhci_reset(host, SDHCI_RESET_DATA); + sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index fe83ece6965b..28826124f7c3 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -484,6 +484,10 @@ struct sdhci_host { * block count. */ #define SDHCI_QUIRK2_USE_32BIT_BLK_CNT (1<<18) +/* + * Controller needs to reset data lines once tuning is complete + */ +#define SDHCI_QUIRK2_RESET_DATA_POST_TUNING (1<<19) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ From patchwork Mon Dec 30 09:23:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Faiz Abbas X-Patchwork-Id: 11312787 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 04F2C139A for ; Mon, 30 Dec 2019 09:22:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D79E221D7E for ; Mon, 30 Dec 2019 09:22:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="pLk1dlUv" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727162AbfL3JWo (ORCPT ); Mon, 30 Dec 2019 04:22:44 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:34338 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727381AbfL3JWn (ORCPT ); Mon, 30 Dec 2019 04:22:43 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBU9MVil009136; Mon, 30 Dec 2019 03:22:31 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577697751; bh=vquaZE1RyQys3/eRiQEhCGNqhMYSsDJjQNeyhnEnwfE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pLk1dlUvjUDFkASxRJQ2vNWWyEV8srezhvVWVUa3u2oPvMOyBeGEw4eBpvff0KV/0 HcA4EzezYYCUx4llulYo2F36bSiE6R+SlCOH1FRzhi5yWUEE1L7YpmzWU/uKbUNKKo WNvkK/ZVBytU55yPbds9qqKt0h07QBVlmNxUIsX8= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBU9MVgY089744 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 30 Dec 2019 03:22:31 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Mon, 30 Dec 2019 03:22:30 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Mon, 30 Dec 2019 03:22:30 -0600 Received: from a0230074-OptiPlex-7010.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBU9MOJk109856; Mon, 30 Dec 2019 03:22:29 -0600 From: Faiz Abbas To: , CC: , , , Subject: [PATCH 2/3] mmc: sdhci_am654: Enable Quirk to reset data after tuning Date: Mon, 30 Dec 2019 14:53:42 +0530 Message-ID: <20191230092343.30692-3-faiz_abbas@ti.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20191230092343.30692-1-faiz_abbas@ti.com> References: <20191230092343.30692-1-faiz_abbas@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Enable SDHCI_QUIRK2_RESET_DATA_POST_TUNING for all controller variants. Signed-off-by: Faiz Abbas --- drivers/mmc/host/sdhci_am654.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index b8e897e31e2e..1ac1caa2bd0c 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -255,7 +255,8 @@ static const struct sdhci_pltfm_data sdhci_am654_pdata = { .ops = &sdhci_am654_ops, .quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT | SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | + SDHCI_QUIRK2_RESET_DATA_POST_TUNING, }; static const struct sdhci_am654_driver_data sdhci_am654_drvdata = { @@ -292,7 +293,8 @@ static const struct sdhci_pltfm_data sdhci_j721e_8bit_pdata = { .ops = &sdhci_j721e_8bit_ops, .quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT | SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | + SDHCI_QUIRK2_RESET_DATA_POST_TUNING, }; static const struct sdhci_am654_driver_data sdhci_j721e_8bit_drvdata = { @@ -316,7 +318,8 @@ static const struct sdhci_pltfm_data sdhci_j721e_4bit_pdata = { .ops = &sdhci_j721e_4bit_ops, .quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT | SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | + SDHCI_QUIRK2_RESET_DATA_POST_TUNING, }; static const struct sdhci_am654_driver_data sdhci_j721e_4bit_drvdata = { From patchwork Mon Dec 30 09:23:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Faiz Abbas X-Patchwork-Id: 11312789 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 82FDD139A for ; Mon, 30 Dec 2019 09:22:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6189A20CC7 for ; Mon, 30 Dec 2019 09:22:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="uMKCP9Dy" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727355AbfL3JWj (ORCPT ); Mon, 30 Dec 2019 04:22:39 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:40454 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727352AbfL3JWj (ORCPT ); Mon, 30 Dec 2019 04:22:39 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBU9MXUB106994; Mon, 30 Dec 2019 03:22:33 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577697753; bh=+WrmWkextCd+cYVbBa5fxCxHjWM2NsKQQzbXjWS0YsY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=uMKCP9DysNsFQcrFJw+TdzkKZHx6CrxJZHBPoL137zx+kr3MRwgFdjJZKa5JFCp6D PdB1ZwHdMiT5twoUarBA1RuAryZubMPlaZLdkZSWLsWhGs2TYqx3V/1i35/qkdomRr TBHJC6LP1YsZOq5q3ZpDKtbMc8d4yqAFJ5ZbHn1M= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBU9MX8u104159; Mon, 30 Dec 2019 03:22:33 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Mon, 30 Dec 2019 03:22:33 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Mon, 30 Dec 2019 03:22:33 -0600 Received: from a0230074-OptiPlex-7010.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBU9MOJl109856; Mon, 30 Dec 2019 03:22:31 -0600 From: Faiz Abbas To: , CC: , , , Subject: [RFT PATCH 3/3] mmc: sdhci-of-arasan: Fix Command Queuing enable handling Date: Mon, 30 Dec 2019 14:53:43 +0530 Message-ID: <20191230092343.30692-4-faiz_abbas@ti.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20191230092343.30692-1-faiz_abbas@ti.com> References: <20191230092343.30692-1-faiz_abbas@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org There is a need to dump data from the buffer before enabling command queuing because of leftover data from tuning. Reset the data lines to fix this at the source. Signed-off-by: Faiz Abbas Tested-by: Shawn Lin --- drivers/mmc/host/sdhci-of-arasan.c | 21 ++++----------------- 1 file changed, 4 insertions(+), 17 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index e49b44b4d82e..1495ae72b902 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -376,22 +376,8 @@ static void sdhci_arasan_dumpregs(struct mmc_host *mmc) sdhci_dumpregs(mmc_priv(mmc)); } -static void sdhci_arasan_cqe_enable(struct mmc_host *mmc) -{ - struct sdhci_host *host = mmc_priv(mmc); - u32 reg; - - reg = sdhci_readl(host, SDHCI_PRESENT_STATE); - while (reg & SDHCI_DATA_AVAILABLE) { - sdhci_readl(host, SDHCI_BUFFER); - reg = sdhci_readl(host, SDHCI_PRESENT_STATE); - } - - sdhci_cqe_enable(mmc); -} - static const struct cqhci_host_ops sdhci_arasan_cqhci_ops = { - .enable = sdhci_arasan_cqe_enable, + .enable = sdhci_cqe_enable, .disable = sdhci_cqe_disable, .dumpregs = sdhci_arasan_dumpregs, }; @@ -410,8 +396,9 @@ static const struct sdhci_ops sdhci_arasan_cqe_ops = { static const struct sdhci_pltfm_data sdhci_arasan_cqe_pdata = { .ops = &sdhci_arasan_cqe_ops, .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | + SDHCI_QUIRK2_RESET_DATA_POST_TUNING | + SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, }; static struct sdhci_arasan_of_data sdhci_arasan_rk3399_data = {