From patchwork Thu Jan 2 13:38:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11315811 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 217AF14E3 for ; Thu, 2 Jan 2020 14:04:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EF50321734 for ; Thu, 2 Jan 2020 14:04:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728426AbgABOEu (ORCPT ); Thu, 2 Jan 2020 09:04:50 -0500 Received: from michel.telenet-ops.be ([195.130.137.88]:58542 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728412AbgABOEo (ORCPT ); Thu, 2 Jan 2020 09:04:44 -0500 Received: from ramsan ([84.195.182.253]) by michel.telenet-ops.be with bizsmtp id lS4g2100G5USYZQ06S4g6K; Thu, 02 Jan 2020 15:04:41 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1in15c-0006GP-LS; Thu, 02 Jan 2020 15:04:40 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1in0gG-0007eL-CB; Thu, 02 Jan 2020 14:38:28 +0100 From: Geert Uytterhoeven To: Mark Brown Cc: Chris Brandt , =?utf-8?q?Jan_Kundr=C3=A1t?= , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 1/6] spi: Add generic support for unused native cs with cs-gpios Date: Thu, 2 Jan 2020 14:38:17 +0100 Message-Id: <20200102133822.29346-2-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102133822.29346-1-geert+renesas@glider.be> References: <20200102133822.29346-1-geert+renesas@glider.be> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Some SPI master controllers always drive a native chip select when performing a transfer. Hence when using both native and GPIO chip selects, at least one native chip select must be left unused, to be driven when performing transfers with slave devices using GPIO chip selects. Currently, to find an unused native chip select, SPI controller drivers need to parse and process cs-gpios theirselves. This is not only duplicated in each driver that needs it, but also duplicates part of the work done later at SPI controller registration time. Note that this cannot be done after spi_register_controller() returns, as at that time, slave devices may have been probed already. Hence add generic support to the SPI subsystem for finding an unused native chip select. Optionally, this unused native chip select, and all other in-use native chip selects, can be validated against the maximum number of native chip selects available on the controller hardware. Signed-off-by: Geert Uytterhoeven --- Perhaps the validation is considered overkill ("DT is assumed to be correct")? drivers/spi/spi.c | 17 +++++++++++++++++ include/linux/spi/spi.h | 8 ++++++++ 2 files changed, 25 insertions(+) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index dc453896327106a0..38b4c78df506c060 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -2458,6 +2458,8 @@ static int spi_get_gpio_descs(struct spi_controller *ctlr) int nb, i; struct gpio_desc **cs; struct device *dev = &ctlr->dev; + unsigned long native_cs_mask = 0; + unsigned int num_cs_gpios = 0; nb = gpiod_count(dev, "cs"); ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect); @@ -2499,7 +2501,22 @@ static int spi_get_gpio_descs(struct spi_controller *ctlr) if (!gpioname) return -ENOMEM; gpiod_set_consumer_name(cs[i], gpioname); + num_cs_gpios++; + continue; + } + + if (ctlr->max_native_cs && i >= ctlr->max_native_cs) { + dev_err(dev, "Invalid native chip select %d\n", i); + return -EINVAL; } + native_cs_mask |= BIT(i); + } + + ctlr->unused_native_cs = ffz(native_cs_mask); + if (num_cs_gpios && ctlr->max_native_cs && + ctlr->unused_native_cs >= ctlr->max_native_cs) { + dev_err(dev, "No unused native chip select available\n"); + return -EINVAL; } return 0; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 3a67a7e45633cf9c..6d16ba01ff5a2e20 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -423,6 +423,12 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv) * GPIO descriptors rather than using global GPIO numbers grabbed by the * driver. This will fill in @cs_gpiods and @cs_gpios should not be used, * and SPI devices will have the cs_gpiod assigned rather than cs_gpio. + * @unused_native_cs: When cs_gpiods is used, spi_register_controller() will + * fill in this field with the first unused native CS, to be used by SPI + * controller drivers that need to drive a native CS when using GPIO CS. + * @max_native_cs: When cs_gpiods is used, and this field is filled in, + * spi_register_controller() will validate all native CS (including the + * unused native CS) against this value. * @statistics: statistics for the spi_controller * @dma_tx: DMA transmit channel * @dma_rx: DMA receive channel @@ -624,6 +630,8 @@ struct spi_controller { int *cs_gpios; struct gpio_desc **cs_gpiods; bool use_gpio_descriptors; + u8 unused_native_cs; + u8 max_native_cs; /* statistics */ struct spi_statistics statistics; From patchwork Thu Jan 2 13:38:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11315813 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 35121138C for ; Thu, 2 Jan 2020 14:04:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1CD39215A4 for ; Thu, 2 Jan 2020 14:04:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728486AbgABOEo (ORCPT ); Thu, 2 Jan 2020 09:04:44 -0500 Received: from andre.telenet-ops.be ([195.130.132.53]:35652 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728405AbgABOEn (ORCPT ); Thu, 2 Jan 2020 09:04:43 -0500 Received: from ramsan ([84.195.182.253]) by andre.telenet-ops.be with bizsmtp id lS4g210095USYZQ01S4gT1; Thu, 02 Jan 2020 15:04:41 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1in15c-0006GP-Jk; Thu, 02 Jan 2020 15:04:40 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1in0gG-0007eN-DR; Thu, 02 Jan 2020 14:38:28 +0100 From: Geert Uytterhoeven To: Mark Brown Cc: Chris Brandt , =?utf-8?q?Jan_Kundr=C3=A1t?= , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 2/6] spi: sh-msiof: Convert to generic unused native cs handling. Date: Thu, 2 Jan 2020 14:38:18 +0100 Message-Id: <20200102133822.29346-3-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102133822.29346-1-geert+renesas@glider.be> References: <20200102133822.29346-1-geert+renesas@glider.be> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Currently the MSIOF SPI driver uses custom code to handle the unused native chip select with GPIO chip selects. Convert the driver to use the new generic handling in the SPI core. Signed-off-by: Geert Uytterhoeven --- drivers/spi/spi-sh-msiof.c | 53 +++----------------------------------- 1 file changed, 3 insertions(+), 50 deletions(-) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 8f134735291f14c3..b3732dc231cb4bf3 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -14,8 +14,6 @@ #include #include #include -#include -#include #include #include #include @@ -55,7 +53,6 @@ struct sh_msiof_spi_priv { void *rx_dma_page; dma_addr_t tx_dma_addr; dma_addr_t rx_dma_addr; - unsigned short unused_ss; bool native_cs_inited; bool native_cs_high; bool slave_aborted; @@ -587,7 +584,7 @@ static int sh_msiof_prepare_message(struct spi_controller *ctlr, /* Configure pins before asserting CS */ if (spi->cs_gpiod) { - ss = p->unused_ss; + ss = ctlr->unused_native_cs; cs_high = p->native_cs_high; } else { ss = spi->chip_select; @@ -1124,46 +1121,6 @@ static struct sh_msiof_spi_info *sh_msiof_spi_parse_dt(struct device *dev) } #endif -static int sh_msiof_get_cs_gpios(struct sh_msiof_spi_priv *p) -{ - struct device *dev = &p->pdev->dev; - unsigned int used_ss_mask = 0; - unsigned int cs_gpios = 0; - unsigned int num_cs, i; - int ret; - - ret = gpiod_count(dev, "cs"); - if (ret <= 0) - return 0; - - num_cs = max_t(unsigned int, ret, p->ctlr->num_chipselect); - for (i = 0; i < num_cs; i++) { - struct gpio_desc *gpiod; - - gpiod = devm_gpiod_get_index(dev, "cs", i, GPIOD_ASIS); - if (!IS_ERR(gpiod)) { - devm_gpiod_put(dev, gpiod); - cs_gpios++; - continue; - } - - if (PTR_ERR(gpiod) != -ENOENT) - return PTR_ERR(gpiod); - - if (i >= MAX_SS) { - dev_err(dev, "Invalid native chip select %d\n", i); - return -EINVAL; - } - used_ss_mask |= BIT(i); - } - p->unused_ss = ffz(used_ss_mask); - if (cs_gpios && p->unused_ss >= MAX_SS) { - dev_err(dev, "No unused native chip select available\n"); - return -EINVAL; - } - return 0; -} - static struct dma_chan *sh_msiof_request_dma_chan(struct device *dev, enum dma_transfer_direction dir, unsigned int id, dma_addr_t port_addr) { @@ -1373,17 +1330,12 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) if (p->info->rx_fifo_override) p->rx_fifo_size = p->info->rx_fifo_override; - /* Setup GPIO chip selects */ - ctlr->num_chipselect = p->info->num_chipselect; - ret = sh_msiof_get_cs_gpios(p); - if (ret) - goto err1; - /* init controller code */ ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; ctlr->mode_bits |= SPI_LSB_FIRST | SPI_3WIRE; ctlr->flags = chipdata->ctlr_flags; ctlr->bus_num = pdev->id; + ctlr->num_chipselect = p->info->num_chipselect; ctlr->dev.of_node = pdev->dev.of_node; ctlr->setup = sh_msiof_spi_setup; ctlr->prepare_message = sh_msiof_prepare_message; @@ -1392,6 +1344,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) ctlr->auto_runtime_pm = true; ctlr->transfer_one = sh_msiof_transfer_one; ctlr->use_gpio_descriptors = true; + ctlr->max_native_cs = MAX_SS; ret = sh_msiof_request_dma(p); if (ret < 0) From patchwork Thu Jan 2 13:38:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11315819 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 80E7C1395 for ; Thu, 2 Jan 2020 14:05:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 68FD721734 for ; Thu, 2 Jan 2020 14:05:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728517AbgABOEv (ORCPT ); Thu, 2 Jan 2020 09:04:51 -0500 Received: from baptiste.telenet-ops.be ([195.130.132.51]:41590 "EHLO baptiste.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728370AbgABOEn (ORCPT ); Thu, 2 Jan 2020 09:04:43 -0500 Received: from ramsan ([84.195.182.253]) by baptiste.telenet-ops.be with bizsmtp id lS4g210095USYZQ01S4gFL; Thu, 02 Jan 2020 15:04:40 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1in15c-0006GP-Au; Thu, 02 Jan 2020 15:04:40 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1in0gG-0007eR-Et; Thu, 02 Jan 2020 14:38:28 +0100 From: Geert Uytterhoeven To: Mark Brown Cc: Chris Brandt , =?utf-8?q?Jan_Kundr=C3=A1t?= , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 3/6] spi: rspi: Use dev_warn_once() instead of open-coding Date: Thu, 2 Jan 2020 14:38:19 +0100 Message-Id: <20200102133822.29346-4-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102133822.29346-1-geert+renesas@glider.be> References: <20200102133822.29346-1-geert+renesas@glider.be> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Use the helper introduced by commit e135303bd5bebcd2 ("device: Add dev__once variants") instead of open-coding the same operation. Signed-off-by: Geert Uytterhoeven --- drivers/spi/spi-rspi.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 74a12f4dee849125..e54a25f848ea38c7 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -620,9 +620,8 @@ static int rspi_dma_transfer(struct rspi_data *rspi, struct sg_table *tx, dmaengine_terminate_all(rspi->ctlr->dma_rx); no_dma_rx: if (ret == -EAGAIN) { - pr_warn_once("%s %s: DMA not available, falling back to PIO\n", - dev_driver_string(&rspi->ctlr->dev), - dev_name(&rspi->ctlr->dev)); + dev_warn_once(&rspi->ctlr->dev, + "DMA not available, falling back to PIO\n"); } return ret; } From patchwork Thu Jan 2 13:38:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11315815 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C01C0138C for ; Thu, 2 Jan 2020 14:04:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A84A921734 for ; Thu, 2 Jan 2020 14:04:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728514AbgABOEv (ORCPT ); Thu, 2 Jan 2020 09:04:51 -0500 Received: from albert.telenet-ops.be ([195.130.137.90]:60180 "EHLO albert.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728425AbgABOEn (ORCPT ); Thu, 2 Jan 2020 09:04:43 -0500 Received: from ramsan ([84.195.182.253]) by albert.telenet-ops.be with bizsmtp id lS4g210095USYZQ06S4guB; Thu, 02 Jan 2020 15:04:41 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1in15c-0006GP-Hk; Thu, 02 Jan 2020 15:04:40 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1in0gG-0007eU-GX; Thu, 02 Jan 2020 14:38:28 +0100 From: Geert Uytterhoeven To: Mark Brown Cc: Chris Brandt , =?utf-8?q?Jan_Kundr=C3=A1t?= , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 4/6] spi: rspi: Remove set_config_register() macro Date: Thu, 2 Jan 2020 14:38:20 +0100 Message-Id: <20200102133822.29346-5-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102133822.29346-1-geert+renesas@glider.be> References: <20200102133822.29346-1-geert+renesas@glider.be> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The set_config_register() macro is used in a single place. Make the code easier to read by just removing it. Signed-off-by: Geert Uytterhoeven --- drivers/spi/spi-rspi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index e54a25f848ea38c7..9eabef3d6cc478ff 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -426,8 +426,6 @@ static int qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len) return n; } -#define set_config_register(spi, n) spi->ops->set_config_register(spi, n) - static void rspi_enable_irq(const struct rspi_data *rspi, u8 enable) { rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | enable, RSPI_SPCR); @@ -940,7 +938,7 @@ static int rspi_prepare_message(struct spi_controller *ctlr, if (spi->mode & SPI_LOOP) rspi->sppcr |= SPPCR_SPLP; - set_config_register(rspi, 8); + rspi->ops->set_config_register(rspi, 8); if (msg->spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD)) { From patchwork Thu Jan 2 13:38:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11315817 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 95D4B1395 for ; Thu, 2 Jan 2020 14:04:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7E47721734 for ; Thu, 2 Jan 2020 14:04:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728520AbgABOEw (ORCPT ); Thu, 2 Jan 2020 09:04:52 -0500 Received: from xavier.telenet-ops.be ([195.130.132.52]:59766 "EHLO xavier.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728420AbgABOEn (ORCPT ); Thu, 2 Jan 2020 09:04:43 -0500 Received: from ramsan ([84.195.182.253]) by xavier.telenet-ops.be with bizsmtp id lS4g2100N5USYZQ01S4gmy; Thu, 02 Jan 2020 15:04:41 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1in15c-0006GP-GR; Thu, 02 Jan 2020 15:04:40 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1in0gG-0007eX-I8; Thu, 02 Jan 2020 14:38:28 +0100 From: Geert Uytterhoeven To: Mark Brown Cc: Chris Brandt , =?utf-8?q?Jan_Kundr=C3=A1t?= , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 5/6] spi: rspi: Add support for multiple native chip selects Date: Thu, 2 Jan 2020 14:38:21 +0100 Message-Id: <20200102133822.29346-6-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102133822.29346-1-geert+renesas@glider.be> References: <20200102133822.29346-1-geert+renesas@glider.be> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org RSPI variants on some SuperH or R-Mobile SoCs support multiple native chip selects. Add support for this by configuring the SSL Assert Signal Setting. Signed-off-by: Geert Uytterhoeven --- drivers/spi/spi-rspi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 9eabef3d6cc478ff..2f5a856a93192702 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -159,7 +159,7 @@ #define SPCMD_SPIMOD_DUAL SPCMD_SPIMOD0 #define SPCMD_SPIMOD_QUAD SPCMD_SPIMOD1 #define SPCMD_SPRW 0x0010 /* SPI Read/Write Access (Dual/Quad) */ -#define SPCMD_SSLA_MASK 0x0030 /* SSL Assert Signal Setting (RSPI) */ +#define SPCMD_SSLA(i) ((i) << 4) /* SSL Assert Signal Setting */ #define SPCMD_BRDV_MASK 0x000c /* Bit Rate Division Setting */ #define SPCMD_CPOL 0x0002 /* Clock Polarity Setting */ #define SPCMD_CPHA 0x0001 /* Clock Phase Setting */ @@ -933,6 +933,9 @@ static int rspi_prepare_message(struct spi_controller *ctlr, if (spi->mode & SPI_CPHA) rspi->spcmd |= SPCMD_CPHA; + /* Configure slave signal to assert */ + rspi->spcmd |= SPCMD_SSLA(spi->chip_select); + /* CMOS output mode and MOSI signal from previous transfer */ rspi->sppcr = 0; if (spi->mode & SPI_LOOP) From patchwork Thu Jan 2 13:38:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11315807 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D7EE1138C for ; Thu, 2 Jan 2020 14:04:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B3A6A21734 for ; Thu, 2 Jan 2020 14:04:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728393AbgABOEn (ORCPT ); Thu, 2 Jan 2020 09:04:43 -0500 Received: from michel.telenet-ops.be ([195.130.137.88]:58538 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728429AbgABOEn (ORCPT ); Thu, 2 Jan 2020 09:04:43 -0500 Received: from ramsan ([84.195.182.253]) by michel.telenet-ops.be with bizsmtp id lS4g210085USYZQ06S4g6J; Thu, 02 Jan 2020 15:04:41 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1in15c-0006GP-Dv; Thu, 02 Jan 2020 15:04:40 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1in0gG-0007ea-JH; Thu, 02 Jan 2020 14:38:28 +0100 From: Geert Uytterhoeven To: Mark Brown Cc: Chris Brandt , =?utf-8?q?Jan_Kundr=C3=A1t?= , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 6/6] spi: rspi: Add support for GPIO chip selects Date: Thu, 2 Jan 2020 14:38:22 +0100 Message-Id: <20200102133822.29346-7-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102133822.29346-1-geert+renesas@glider.be> References: <20200102133822.29346-1-geert+renesas@glider.be> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add support for GPIO chip selects using GPIO descriptors. As the RSPI controller always drives a native chip select when performing a transfer, at least one native chip select must be left unused. Signed-off-by: Geert Uytterhoeven --- drivers/spi/spi-rspi.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 2f5a856a93192702..85575d45901cee1b 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -242,6 +242,7 @@ struct spi_ops { u16 mode_bits; u16 flags; u16 fifo_size; + u8 num_hw_ss; }; /* @@ -934,7 +935,8 @@ static int rspi_prepare_message(struct spi_controller *ctlr, rspi->spcmd |= SPCMD_CPHA; /* Configure slave signal to assert */ - rspi->spcmd |= SPCMD_SSLA(spi->chip_select); + rspi->spcmd |= SPCMD_SSLA(spi->cs_gpiod ? rspi->ctlr->unused_native_cs + : spi->chip_select); /* CMOS output mode and MOSI signal from previous transfer */ rspi->sppcr = 0; @@ -1123,6 +1125,7 @@ static const struct spi_ops rspi_ops = { .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP, .flags = SPI_CONTROLLER_MUST_TX, .fifo_size = 8, + .num_hw_ss = 2, }; static const struct spi_ops rspi_rz_ops = { @@ -1131,6 +1134,7 @@ static const struct spi_ops rspi_rz_ops = { .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP, .flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX, .fifo_size = 8, /* 8 for TX, 32 for RX */ + .num_hw_ss = 1, }; static const struct spi_ops qspi_ops = { @@ -1141,6 +1145,7 @@ static const struct spi_ops qspi_ops = { SPI_RX_DUAL | SPI_RX_QUAD, .flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX, .fifo_size = 32, + .num_hw_ss = 1, }; #ifdef CONFIG_OF @@ -1256,6 +1261,8 @@ static int rspi_probe(struct platform_device *pdev) ctlr->mode_bits = ops->mode_bits; ctlr->flags = ops->flags; ctlr->dev.of_node = pdev->dev.of_node; + ctlr->use_gpio_descriptors = true; + ctlr->max_native_cs = rspi->ops->num_hw_ss; ret = platform_get_irq_byname_optional(pdev, "rx"); if (ret < 0) {