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Mon, 6 Jan 2020 20:47:37 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 01/15] phy/rockchip: inno-hdmi: use correct vco_div_5 macro on rk3328 Thread-Topic: [PATCH 01/15] phy/rockchip: inno-hdmi: use correct vco_div_5 macro on rk3328 Thread-Index: AQHVxNKIFXnraCQbrkqwiVZY6H3oBw== Date: Mon, 6 Jan 2020 20:47:38 +0000 Message-ID: References: In-Reply-To: Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6P195CA0080.EURP195.PROD.OUTLOOK.COM (2603:10a6:209:86::21) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:6F6DD20A0899AA729E98995BB36C89DE524FC4527F2FC37850CC72F0910B7041; UpperCasedChecksum:24501F4B5DB11B04EC99F511E91E7A4B56EF762341DC9417E6D0AA5F2789EBD1; SizeAsReceived:8201; Count:51 x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-tmn: [QWM3uovSw7zSNZ/TgRg8ckuZ0nZtU6XZ] x-microsoft-original-message-id: <20200106204723.5889-1-jonas@kwiboo.se> x-ms-publictraffictype: Email x-incomingheadercount: 51 x-eopattributedmessage: 0 x-ms-office365-filtering-correlation-id: 9be13562-dda8-48c5-da52-08d792e9aa8e x-ms-traffictypediagnostic: VE1EUR02HT216: x-microsoft-antispam: BCL:0; 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Fix this by using correct vco_div_5 macro for RK3328. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Jonas Karlman --- drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c index 9ca20c947283..b0ac1d3ee390 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -790,8 +790,8 @@ static int inno_hdmi_phy_rk3328_clk_set_rate(struct clk_hw *hw, RK3328_PRE_PLL_POWER_DOWN); /* Configure pre-pll */ - inno_update_bits(inno, 0xa0, RK3228_PCLK_VCO_DIV_5_MASK, - RK3228_PCLK_VCO_DIV_5(cfg->vco_div_5_en)); + inno_update_bits(inno, 0xa0, RK3328_PCLK_VCO_DIV_5_MASK, + RK3328_PCLK_VCO_DIV_5(cfg->vco_div_5_en)); inno_write(inno, 0xa1, RK3328_PRE_PLL_PRE_DIV(cfg->prediv)); val = RK3328_SPREAD_SPECTRUM_MOD_DISABLE; From patchwork Mon Jan 6 20:47:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 11320077 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 55E231395 for ; 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Mon, 6 Jan 2020 20:47:41 +0000 Received: from HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b]) by HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b%5]) with mapi id 15.20.2602.015; Mon, 6 Jan 2020 20:47:41 +0000 Received: from bionic.localdomain (98.128.173.80) by AM6P195CA0080.EURP195.PROD.OUTLOOK.COM (2603:10a6:209:86::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2602.10 via Frontend Transport; Mon, 6 Jan 2020 20:47:40 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 02/15] phy/rockchip: inno-hdmi: round fractal pixclock in rk3328 recalc_rate Thread-Topic: [PATCH 02/15] phy/rockchip: inno-hdmi: round fractal pixclock in rk3328 recalc_rate Thread-Index: AQHVxNKJGsLSKAwUL0mZqpV7XUgnkw== Date: Mon, 6 Jan 2020 20:47:40 +0000 Message-ID: References: <20200106204723.5889-1-jonas@kwiboo.se> In-Reply-To: <20200106204723.5889-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6P195CA0080.EURP195.PROD.OUTLOOK.COM (2603:10a6:209:86::21) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:7D05201E926B7A807AED86CE7DA3E177E4B1ED108D4B7F117BE4957957770AAA; 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This can prevent proper power_on because a tmdsclock for the new rate is not found in the pre pll config table. Fix this by saving and returning a rounded pixel rate that exist in the pre pll config table. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Zheng Yang Signed-off-by: Jonas Karlman --- drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c index b0ac1d3ee390..093d2334e8cd 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -745,10 +745,12 @@ unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct clk_hw *hw, do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2)); } - inno->pixclock = vco; - dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock); + inno->pixclock = DIV_ROUND_CLOSEST((unsigned long)vco, 1000) * 1000; - return vco; + dev_dbg(inno->dev, "%s rate %lu vco %llu\n", + __func__, inno->pixclock, vco); + + return inno->pixclock; } static long inno_hdmi_phy_rk3328_clk_round_rate(struct clk_hw *hw, From patchwork Mon Jan 6 20:47:42 2020 Content-Type: text/plain; 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Mon, 6 Jan 2020 20:47:41 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 03/15] phy/rockchip: inno-hdmi: remove unused no_c from rk3328 recalc_rate Thread-Topic: [PATCH 03/15] phy/rockchip: inno-hdmi: remove unused no_c from rk3328 recalc_rate Thread-Index: AQHVxNKKPaafaEKAxk+Qt3cWlEUCdA== Date: Mon, 6 Jan 2020 20:47:42 +0000 Message-ID: References: <20200106204723.5889-1-jonas@kwiboo.se> In-Reply-To: <20200106204723.5889-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6P195CA0080.EURP195.PROD.OUTLOOK.COM (2603:10a6:209:86::21) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:A218D2239743A09E352A77C47FA8137872204F3074F74A405052448B2DAE4EAB; UpperCasedChecksum:1629669DD3F21DD25A1283082DA12964E31AD203F31BF55A408A7AC769C735A2; SizeAsReceived:8209; Count:51 x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-tmn: [FybFPbdRa16xhGY/og59RUzVipxdMJEJ] x-microsoft-original-message-id: <20200106204723.5889-3-jonas@kwiboo.se> x-ms-publictraffictype: Email x-incomingheadercount: 51 x-eopattributedmessage: 0 x-ms-office365-filtering-correlation-id: aa6adf75-9242-4137-bec7-08d792e9ac9d x-ms-traffictypediagnostic: VE1EUR02HT150: x-microsoft-antispam: BCL:0; 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Signed-off-by: Jonas Karlman --- drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c index 093d2334e8cd..06db69c8373e 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -714,7 +714,7 @@ unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct clk_hw *hw, { struct inno_hdmi_phy *inno = to_inno_hdmi_phy(hw); unsigned long frac; - u8 nd, no_a, no_b, no_c, no_d; + u8 nd, no_a, no_b, no_d; u64 vco; u16 nf; @@ -737,9 +737,6 @@ unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct clk_hw *hw, no_b = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_B_MASK; no_b >>= RK3328_PRE_PLL_PCLK_DIV_B_SHIFT; no_b += 2; - no_c = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_C_MASK; - no_c >>= RK3328_PRE_PLL_PCLK_DIV_C_SHIFT; - no_c = 1 << no_c; no_d = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_D_MASK; do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2)); From patchwork Mon Jan 6 20:47:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 11320093 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E3FA51395 for ; Mon, 6 Jan 2020 20:48:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A301221744 for ; Mon, 6 Jan 2020 20:48:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="enIB+FPd" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A301221744 Authentication-Results: mail.kernel.org; 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Mon, 6 Jan 2020 20:47:43 +0000 Received: from HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b]) by HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b%5]) with mapi id 15.20.2602.015; Mon, 6 Jan 2020 20:47:43 +0000 Received: from bionic.localdomain (98.128.173.80) by AM6P195CA0080.EURP195.PROD.OUTLOOK.COM (2603:10a6:209:86::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2602.10 via Frontend Transport; Mon, 6 Jan 2020 20:47:42 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 04/15] phy/rockchip: inno-hdmi: do not power on rk3328 post pll on reg write Thread-Topic: [PATCH 04/15] phy/rockchip: inno-hdmi: do not power on rk3328 post pll on reg write Thread-Index: AQHVxNKKLxyL4Q0vOE22PNhI5tid5A== Date: Mon, 6 Jan 2020 20:47:43 +0000 Message-ID: References: <20200106204723.5889-1-jonas@kwiboo.se> In-Reply-To: <20200106204723.5889-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6P195CA0080.EURP195.PROD.OUTLOOK.COM (2603:10a6:209:86::21) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:8C19569506F8BD7642EB2068ACC681F4CCFF9E0FBB922D8AF839168E0728C830; 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When POST_PLL_REFCLK_SEL_TMDS is configured the power down bit is not taken into consideration. Fix this by keeping the power down bit until configuration is complete. Also reorder the reg write order for consistency. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Jonas Karlman --- drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c index 06db69c8373e..3a59a6da0440 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -1020,9 +1020,10 @@ inno_hdmi_phy_rk3328_power_on(struct inno_hdmi_phy *inno, inno_write(inno, 0xac, RK3328_POST_PLL_FB_DIV_7_0(cfg->fbdiv)); if (cfg->postdiv == 1) { - inno_write(inno, 0xaa, RK3328_POST_PLL_REFCLK_SEL_TMDS); inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) | RK3328_POST_PLL_PRE_DIV(cfg->prediv)); + inno_write(inno, 0xaa, RK3328_POST_PLL_REFCLK_SEL_TMDS | + RK3328_POST_PLL_POWER_DOWN); } else { v = (cfg->postdiv / 2) - 1; v &= RK3328_POST_PLL_POST_DIV_MASK; @@ -1030,7 +1031,8 @@ inno_hdmi_phy_rk3328_power_on(struct inno_hdmi_phy *inno, inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) | RK3328_POST_PLL_PRE_DIV(cfg->prediv)); inno_write(inno, 0xaa, RK3328_POST_PLL_POST_DIV_ENABLE | - RK3328_POST_PLL_REFCLK_SEL_TMDS); + RK3328_POST_PLL_REFCLK_SEL_TMDS | + RK3328_POST_PLL_POWER_DOWN); } for (v = 0; v < 14; v++) From patchwork Mon Jan 6 20:48:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 11320097 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B4B261395 for ; Mon, 6 Jan 2020 20:49:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 91B692146E for ; Mon, 6 Jan 2020 20:49:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="WuLUL4T/" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 91B692146E Authentication-Results: mail.kernel.org; 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Mon, 6 Jan 2020 20:48:24 +0000 Received: from HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b]) by HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b%5]) with mapi id 15.20.2602.015; Mon, 6 Jan 2020 20:48:24 +0000 Received: from bionic.localdomain (98.128.173.80) by BEXP281CA0004.DEUP281.PROD.OUTLOOK.COM (2603:10a6:b10::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2602.12 via Frontend Transport; Mon, 6 Jan 2020 20:48:23 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 05/15] phy/rockchip: inno-hdmi: force set_rate on power_on Thread-Topic: [PATCH 05/15] phy/rockchip: inno-hdmi: force set_rate on power_on Thread-Index: AQHVxNKjXzxE07MhTUax7MAlwfFB7w== Date: Mon, 6 Jan 2020 20:48:24 +0000 Message-ID: References: In-Reply-To: Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BEXP281CA0004.DEUP281.PROD.OUTLOOK.COM (2603:10a6:b10::14) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:29B1B18902028F4A73CE2E7749F23753B2CF0ED26EB1BD74EE109D3728EE1E95; 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When the hdmiphy clock is configured with the same pixel clock rate using clk_set_rate() the clock framework do not signal the hdmi phy driver to set_rate when switching between 8-bit and Deep Color. This result in pre/post pll not being re-configured when switching between regular 8-bit and Deep Color video formats. Fix this by calling set_rate in power_on to force pre pll re-configuration. Signed-off-by: Huicong Xu Signed-off-by: Jonas Karlman --- drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c index 3a59a6da0440..3719309ad0d0 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -245,6 +245,7 @@ struct inno_hdmi_phy { struct clk_hw hw; struct clk *phyclk; unsigned long pixclock; + unsigned long tmdsclock; }; struct pre_pll_config { @@ -485,6 +486,8 @@ static int inno_hdmi_phy_power_on(struct phy *phy) dev_dbg(inno->dev, "Inno HDMI PHY Power On\n"); + inno->plat_data->clk_ops->set_rate(&inno->hw, inno->pixclock, 24000000); + ret = clk_prepare_enable(inno->phyclk); if (ret) return ret; @@ -509,6 +512,8 @@ static int inno_hdmi_phy_power_off(struct phy *phy) clk_disable_unprepare(inno->phyclk); + inno->tmdsclock = 0; + dev_dbg(inno->dev, "Inno HDMI PHY Power Off\n"); return 0; @@ -628,6 +633,9 @@ static int inno_hdmi_phy_rk3228_clk_set_rate(struct clk_hw *hw, dev_dbg(inno->dev, "%s rate %lu tmdsclk %lu\n", __func__, rate, tmdsclock); + if (inno->pixclock == rate && inno->tmdsclock == tmdsclock) + return 0; + cfg = inno_hdmi_phy_get_pre_pll_cfg(inno, rate); if (IS_ERR(cfg)) return PTR_ERR(cfg); @@ -670,6 +678,7 @@ static int inno_hdmi_phy_rk3228_clk_set_rate(struct clk_hw *hw, } inno->pixclock = rate; + inno->tmdsclock = tmdsclock; return 0; } @@ -781,6 +790,9 @@ static int inno_hdmi_phy_rk3328_clk_set_rate(struct clk_hw *hw, dev_dbg(inno->dev, "%s rate %lu tmdsclk %lu\n", __func__, rate, tmdsclock); + if (inno->pixclock == rate && inno->tmdsclock == tmdsclock) + return 0; + cfg = inno_hdmi_phy_get_pre_pll_cfg(inno, rate); if (IS_ERR(cfg)) return PTR_ERR(cfg); @@ -820,6 +832,7 @@ static int inno_hdmi_phy_rk3328_clk_set_rate(struct clk_hw *hw, } inno->pixclock = rate; + inno->tmdsclock = tmdsclock; return 0; } From patchwork Mon Jan 6 20:48:25 2020 Content-Type: text/plain; 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Mon, 6 Jan 2020 20:48:24 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 06/15] drm/rockchip: vop: limit resolution width to 3840 Thread-Topic: [PATCH 06/15] drm/rockchip: vop: limit resolution width to 3840 Thread-Index: AQHVxNKkwe23wXzA60yXF+y5CyRgVg== Date: Mon, 6 Jan 2020 20:48:25 +0000 Message-ID: References: <20200106204812.5944-1-jonas@kwiboo.se> In-Reply-To: <20200106204812.5944-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BEXP281CA0004.DEUP281.PROD.OUTLOOK.COM (2603:10a6:b10::14) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:15B96F3D54902A85D3878E2BE3FCE0CF15F9BF7CFD3C14DFD77878E3A1B7693A; UpperCasedChecksum:0E394DAED4A4CB10C0E225483B0D20F45B66EC475A8C6C794130379A063EE418; SizeAsReceived:8127; Count:51 x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-tmn: [CPq4U8hH96g/DHwsOcZ/civnrMCdwfXV] x-microsoft-original-message-id: <20200106204812.5944-2-jonas@kwiboo.se> x-ms-publictraffictype: Email x-incomingheadercount: 51 x-eopattributedmessage: 0 x-ms-office365-filtering-correlation-id: 12084a39-96a1-4ef9-a87a-08d792e9c647 x-ms-traffictypediagnostic: VE1EUR02HT176: x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: m9455D6ZUFOKswWQkACY7t1heILE5uPHfTbYYE9Rc5TZkmLUMO7U/daxwHPE0q5Alr0S4HeqgTWZ2p+Gcm2lDQIrGcj1uYSkwUtxa/zyDo/HMEapwxt/PnBGaA9fAwzkaLydudh7uTD4TbmLHIky8NLoET2OA2UKZxtDtyZh7bnROmEFitl0RRTXfx4TMS5z x-ms-exchange-transport-forked: True MIME-Version: 1.0 X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-CrossTenant-Network-Message-Id: 12084a39-96a1-4ef9-a87a-08d792e9c647 X-MS-Exchange-CrossTenant-rms-persistedconsumerorg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Jan 2020 20:48:25.1852 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Internet X-MS-Exchange-CrossTenant-id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1EUR02HT176 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200106_124828_946677_D5695DEB X-CRM114-Status: GOOD ( 13.00 ) X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.92.69.63 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Jonas Karlman , David Airlie , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Kishon Vijay Abraham I , "linux-rockchip@lists.infradead.org" , Rob Herring , Daniel Vetter , "linux-arm-kernel@lists.infradead.org" , Zheng Yang Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org Using a destination width that is more then 3840 pixels is not supported in scl_vop_cal_scl_fac(). Work around this limitation by filtering all modes with a width above 3840 pixels. Signed-off-by: Jonas Karlman --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index d04b3492bdac..f181897cbfad 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1036,6 +1036,15 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) spin_unlock_irqrestore(&vop->irq_lock, flags); } +enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, + const struct drm_display_mode *mode) +{ + if (mode->hdisplay > 3840) + return MODE_BAD_HVALUE; + + return MODE_OK; +} + static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) @@ -1377,6 +1386,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc, } static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { + .mode_valid = vop_crtc_mode_valid, .mode_fixup = vop_crtc_mode_fixup, .atomic_check = vop_crtc_atomic_check, .atomic_begin = vop_crtc_atomic_begin, From patchwork Mon Jan 6 20:48:26 2020 Content-Type: text/plain; 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Mon, 6 Jan 2020 20:48:25 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 07/15] drm/rockchip: dw-hdmi: allow high tmds bit rates Thread-Topic: [PATCH 07/15] drm/rockchip: dw-hdmi: allow high tmds bit rates Thread-Index: AQHVxNKkeAgLW4fg0km1/R3lpurfaA== Date: Mon, 6 Jan 2020 20:48:26 +0000 Message-ID: References: <20200106204812.5944-1-jonas@kwiboo.se> In-Reply-To: <20200106204812.5944-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BEXP281CA0004.DEUP281.PROD.OUTLOOK.COM (2603:10a6:b10::14) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:FB902BBF3D2881926EE816FD8F36B41BB7B4B3D3C372D2E3186D2AAC316EF4B3; UpperCasedChecksum:8225127E07E57F9F417102B355F26304ACF9103D9125A3696E54680E84951F4F; SizeAsReceived:8151; Count:51 x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-tmn: [vVoqW0qdInTAr9onLaiti0enbf81W7Sz] x-microsoft-original-message-id: <20200106204812.5944-3-jonas@kwiboo.se> x-ms-publictraffictype: Email x-incomingheadercount: 51 x-eopattributedmessage: 0 x-ms-office365-filtering-correlation-id: cb547982-72c6-4a2b-5c13-08d792e9c6ec x-ms-traffictypediagnostic: VE1EUR02HT104: x-microsoft-antispam: BCL:0; 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Signed-off-by: Jonas Karlman --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 7f56d8c3491d..fae38b323a0c 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -318,6 +318,8 @@ static int dw_hdmi_rockchip_genphy_init(struct dw_hdmi *dw_hdmi, void *data, { struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; + dw_hdmi_set_high_tmds_clock_ratio(dw_hdmi); + return phy_power_on(hdmi->phy); } From patchwork Mon Jan 6 20:48:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 11320113 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F0CC8921 for ; Mon, 6 Jan 2020 20:49:50 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CE7902146E for ; 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Mon, 6 Jan 2020 20:48:28 +0000 Received: from HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b]) by HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b%5]) with mapi id 15.20.2602.015; Mon, 6 Jan 2020 20:48:28 +0000 Received: from bionic.localdomain (98.128.173.80) by BEXP281CA0004.DEUP281.PROD.OUTLOOK.COM (2603:10a6:b10::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2602.12 via Frontend Transport; Mon, 6 Jan 2020 20:48:27 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 08/15] drm/rockchip: dw-hdmi: require valid vpll clock rate on rk3228/rk3328 Thread-Topic: [PATCH 08/15] drm/rockchip: dw-hdmi: require valid vpll clock rate on rk3228/rk3328 Thread-Index: AQHVxNKmR0W4jadvKEivva24BcWyzA== Date: Mon, 6 Jan 2020 20:48:28 +0000 Message-ID: References: <20200106204812.5944-1-jonas@kwiboo.se> In-Reply-To: <20200106204812.5944-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BEXP281CA0004.DEUP281.PROD.OUTLOOK.COM (2603:10a6:b10::14) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:A19395B89A6FDC5BAC83C828B43BC340A6BED94B82C857ED840F0AA645130AAF; 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Lets validate the mode clock rate against the pre pll config and filter out any mode with a clock rate returning error from clk_round_rate(). Signed-off-by: Jonas Karlman --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index fae38b323a0c..45fcdce3f27f 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -245,6 +245,22 @@ static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder) { } +static enum drm_mode_status +dw_hdmi_rockchip_encoder_mode_valid(struct drm_encoder *encoder, + const struct drm_display_mode *mode) +{ + struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); + long rate; + + if (hdmi->vpll_clk) { + rate = clk_round_rate(hdmi->vpll_clk, mode->clock * 1000); + if (rate < 0) + return MODE_CLOCK_RANGE; + } + + return MODE_OK; +} + static bool dw_hdmi_rockchip_encoder_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode, @@ -306,6 +322,7 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder, } static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = { + .mode_valid = dw_hdmi_rockchip_encoder_mode_valid, .mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup, .mode_set = dw_hdmi_rockchip_encoder_mode_set, .enable = dw_hdmi_rockchip_encoder_enable, From patchwork Mon Jan 6 20:49:24 2020 Content-Type: text/plain; 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Mon, 6 Jan 2020 20:49:23 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 09/15] clk: rockchip: set parent rate for DCLK_VOP clock on rk3228 Thread-Topic: [PATCH 09/15] clk: rockchip: set parent rate for DCLK_VOP clock on rk3228 Thread-Index: AQHVxNLHacXNFUslzEyifyZGfuh7tQ== Date: Mon, 6 Jan 2020 20:49:24 +0000 Message-ID: References: In-Reply-To: Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6PR0202CA0044.eurprd02.prod.outlook.com (2603:10a6:20b:3a::21) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:110011F3A9C1BD70C5B00E947A81EB950704B06B1734E20D180BF5E3DE20A457; UpperCasedChecksum:E7FDDD854CAA2E5B39E1C757530F6FCFD776B364C699F4D7CF1E8AF0616E6AA1; SizeAsReceived:8216; Count:51 x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-tmn: [eyFyHUd+p/8/xYO8zF6YKsprj1iScnge] x-microsoft-original-message-id: <20200106204914.6001-1-jonas@kwiboo.se> x-ms-publictraffictype: Email x-incomingheadercount: 51 x-eopattributedmessage: 0 x-ms-office365-filtering-correlation-id: 031b4704-6e52-4219-56a5-08d792e9e973 x-ms-traffictypediagnostic: VE1EUR03HT161: x-microsoft-antispam: BCL:0; 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Mon, 6 Jan 2020 20:49:24 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 10/15] arm64: dts: rockchip: increase vop clock rate on rk3328 Thread-Topic: [PATCH 10/15] arm64: dts: rockchip: increase vop clock rate on rk3328 Thread-Index: AQHVxNLI2YBBKIutH0iqNWK3NiuMSg== Date: Mon, 6 Jan 2020 20:49:25 +0000 Message-ID: References: <20200106204914.6001-1-jonas@kwiboo.se> In-Reply-To: <20200106204914.6001-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6PR0202CA0044.eurprd02.prod.outlook.com (2603:10a6:20b:3a::21) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:F6A0113E209C19C1AC0E3B9BA6059377FE0A1BA6DAFCCC1FC9E6DFF6D5DD8E42; UpperCasedChecksum:40E4EED46AB85A325DD5358FDB91228939631B74F028AC975E6B3F15FBF5E7B5; SizeAsReceived:8189; Count:51 x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-tmn: [KYN4liLaYG1opX/u099oZRxdPkq4XUs+] x-microsoft-original-message-id: <20200106204914.6001-2-jonas@kwiboo.se> x-ms-publictraffictype: Email x-incomingheadercount: 51 x-eopattributedmessage: 0 x-ms-office365-filtering-correlation-id: 5bd42f31-0839-4153-9c2b-08d792e9ea2e x-ms-traffictypediagnostic: VE1EUR03HT174: x-microsoft-antispam: BCL:0; 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Signed-off-by: Jonas Karlman --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 91306ebed4da..ee4b6170a9e6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -786,8 +786,8 @@ <0>, <24000000>, <24000000>, <24000000>, <15000000>, <15000000>, - <100000000>, <100000000>, - <100000000>, <100000000>, + <300000000>, <100000000>, + <400000000>, <100000000>, <50000000>, <100000000>, <100000000>, <100000000>, <50000000>, <50000000>, From patchwork Mon Jan 6 20:49:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 11320135 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0D02B14B4 for ; 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Mon, 6 Jan 2020 20:49:28 +0000 Received: from HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b]) by HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b%5]) with mapi id 15.20.2602.015; Mon, 6 Jan 2020 20:49:28 +0000 Received: from bionic.localdomain (98.128.173.80) by AM6PR0202CA0044.eurprd02.prod.outlook.com (2603:10a6:20b:3a::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2602.12 via Frontend Transport; Mon, 6 Jan 2020 20:49:26 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 11/15] arm64: dts: rockchip: add vpll clock to hdmi node on rk3328 Thread-Topic: [PATCH 11/15] arm64: dts: rockchip: add vpll clock to hdmi node on rk3328 Thread-Index: AQHVxNLIPXNzMpgWYEWcgimerV+R7w== Date: Mon, 6 Jan 2020 20:49:27 +0000 Message-ID: References: <20200106204914.6001-1-jonas@kwiboo.se> In-Reply-To: <20200106204914.6001-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6PR0202CA0044.eurprd02.prod.outlook.com (2603:10a6:20b:3a::21) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:15B49EAFB42C065ED6E3AB32E3E856C0A8DD973539FB6F293B42ADFE30C0DDDC; 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Signed-off-by: Jonas Karlman --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index ee4b6170a9e6..987c04abb387 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -703,9 +703,11 @@ ; clocks = <&cru PCLK_HDMI>, <&cru SCLK_HDMI_SFC>, + <&hdmiphy>, <&cru SCLK_RTC32K>; clock-names = "iahb", "isfr", + "vpll", "cec"; phys = <&hdmiphy>; phy-names = "hdmi"; From patchwork Mon Jan 6 20:49:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 11320137 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A143C921 for ; Mon, 6 Jan 2020 20:51:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 583B22072C for ; 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Mon, 6 Jan 2020 20:49:29 +0000 Received: from HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b]) by HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b%5]) with mapi id 15.20.2602.015; Mon, 6 Jan 2020 20:49:29 +0000 Received: from bionic.localdomain (98.128.173.80) by AM6PR0202CA0044.eurprd02.prod.outlook.com (2603:10a6:20b:3a::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2602.12 via Frontend Transport; Mon, 6 Jan 2020 20:49:27 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 12/15] ARM: dts: rockchip: add vpll clock to hdmi node on rk3228 Thread-Topic: [PATCH 12/15] ARM: dts: rockchip: add vpll clock to hdmi node on rk3228 Thread-Index: AQHVxNLKqcAXKFIB4kWzhI86odn8Gw== Date: Mon, 6 Jan 2020 20:49:28 +0000 Message-ID: References: <20200106204914.6001-1-jonas@kwiboo.se> In-Reply-To: <20200106204914.6001-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6PR0202CA0044.eurprd02.prod.outlook.com (2603:10a6:20b:3a::21) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:744B46965BCEC379E2768CE590DA8F2BD04A59661322E3C38B4DDC1953E2F1FA; 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Signed-off-by: Jonas Karlman --- arch/arm/boot/dts/rk322x.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 340ed6ccb08f..16ad240d5f7f 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -639,8 +639,8 @@ interrupts = ; assigned-clocks = <&cru SCLK_HDMI_PHY>; assigned-clock-parents = <&hdmi_phy>; - clocks = <&cru SCLK_HDMI_HDCP>, <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_CEC>; - clock-names = "isfr", "iahb", "cec"; + clocks = <&cru SCLK_HDMI_HDCP>, <&cru PCLK_HDMI_CTRL>, <&hdmi_phy>, <&cru SCLK_HDMI_CEC>; + clock-names = "isfr", "iahb", "vpll", "cec"; pinctrl-names = "default"; pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>; resets = <&cru SRST_HDMI_P>; From patchwork Mon Jan 6 20:50:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 11320143 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1ABA8921 for ; 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Mon, 6 Jan 2020 20:50:00 +0000 Received: from HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b]) by HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b%5]) with mapi id 15.20.2602.015; Mon, 6 Jan 2020 20:50:00 +0000 Received: from bionic.localdomain (98.128.173.80) by AM6PR02CA0026.eurprd02.prod.outlook.com (2603:10a6:20b:6e::39) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2602.12 via Frontend Transport; Mon, 6 Jan 2020 20:49:59 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 13/15] drm/rockchip: dw-hdmi: limit tmds to 340mhz on rk3228/rk3328 Thread-Topic: [PATCH 13/15] drm/rockchip: dw-hdmi: limit tmds to 340mhz on rk3228/rk3328 Thread-Index: AQHVxNLcCglm8AAmg0a0X6vD7F1/yA== Date: Mon, 6 Jan 2020 20:50:00 +0000 Message-ID: References: In-Reply-To: Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6PR02CA0026.eurprd02.prod.outlook.com (2603:10a6:20b:6e::39) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:AB8C425C86532D77E6649070CEE523E8B6C0720331FFAA8FDBC9BE057AA1C4F3; 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Limit the pixel clock rate to 340MHz to provide a stable signal. Also limit the pixel clock to the display reported max tmds clock. Signed-off-by: Jonas Karlman --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 22 +++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 45fcdce3f27f..66c14df4a680 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -237,6 +237,24 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, return (valid) ? MODE_OK : MODE_BAD; } +static enum drm_mode_status +dw_hdmi_rk3228_mode_valid(struct drm_connector *connector, + const struct drm_display_mode *mode) +{ + struct drm_display_info *info = &connector->display_info; + int max_tmds_clock = max(info->max_tmds_clock, 165000); + int clock = mode->clock; + + if (connector->ycbcr_420_allowed && drm_mode_is_420(info, mode) && + (info->color_formats & DRM_COLOR_FORMAT_YCRCB420)) + clock /= 2; + + if (clock > max_tmds_clock || clock > 340000) + return MODE_CLOCK_HIGH; + + return MODE_OK; +} + static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = { .destroy = drm_encoder_cleanup, }; @@ -424,7 +442,7 @@ static struct rockchip_hdmi_chip_data rk3228_chip_data = { }; static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = { - .mode_valid = dw_hdmi_rockchip_mode_valid, + .mode_valid = dw_hdmi_rk3228_mode_valid, .mpll_cfg = rockchip_mpll_cfg, .cur_ctr = rockchip_cur_ctr, .phy_config = rockchip_phy_config, @@ -461,7 +479,7 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = { }; static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = { - .mode_valid = dw_hdmi_rockchip_mode_valid, + .mode_valid = dw_hdmi_rk3228_mode_valid, .mpll_cfg = rockchip_mpll_cfg, .cur_ctr = rockchip_cur_ctr, .phy_config = rockchip_phy_config, From patchwork Mon Jan 6 20:50:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 11320145 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 58F3F921 for ; Mon, 6 Jan 2020 20:52:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 35AC02072C for ; Mon, 6 Jan 2020 20:52:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="iR7UjmJ0" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 35AC02072C Authentication-Results: mail.kernel.org; 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Mon, 6 Jan 2020 20:50:01 +0000 Received: from HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b]) by HE1PR06MB4011.eurprd06.prod.outlook.com ([fe80::b957:6908:9f62:c28b%5]) with mapi id 15.20.2602.015; Mon, 6 Jan 2020 20:50:01 +0000 Received: from bionic.localdomain (98.128.173.80) by AM6PR02CA0026.eurprd02.prod.outlook.com (2603:10a6:20b:6e::39) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2602.12 via Frontend Transport; Mon, 6 Jan 2020 20:50:00 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 14/15] drm/rockchip: dw-hdmi: remove unused plat_data on rk3228/rk3328 Thread-Topic: [PATCH 14/15] drm/rockchip: dw-hdmi: remove unused plat_data on rk3228/rk3328 Thread-Index: AQHVxNLdI/v5kV7XtE2WFpYckKZiBQ== Date: Mon, 6 Jan 2020 20:50:01 +0000 Message-ID: References: <20200106204951.6060-1-jonas@kwiboo.se> In-Reply-To: <20200106204951.6060-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6PR02CA0026.eurprd02.prod.outlook.com (2603:10a6:20b:6e::39) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:B80BE38B91D81950F8B1DD84771B58E12A0CBC4A3A7D42376EE097957CE4E0C0; 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Signed-off-by: Jonas Karlman --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 66c14df4a680..a813299e97a2 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -443,9 +443,6 @@ static struct rockchip_hdmi_chip_data rk3228_chip_data = { static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = { .mode_valid = dw_hdmi_rk3228_mode_valid, - .mpll_cfg = rockchip_mpll_cfg, - .cur_ctr = rockchip_cur_ctr, - .phy_config = rockchip_phy_config, .phy_data = &rk3228_chip_data, .phy_ops = &rk3228_hdmi_phy_ops, .phy_name = "inno_dw_hdmi_phy2", @@ -480,9 +477,6 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = { static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = { .mode_valid = dw_hdmi_rk3228_mode_valid, - .mpll_cfg = rockchip_mpll_cfg, - .cur_ctr = rockchip_cur_ctr, - .phy_config = rockchip_phy_config, .phy_data = &rk3328_chip_data, .phy_ops = &rk3328_hdmi_phy_ops, .phy_name = "inno_dw_hdmi_phy2", From patchwork Mon Jan 6 20:50:02 2020 Content-Type: text/plain; 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Mon, 6 Jan 2020 20:50:01 +0000 From: Jonas Karlman To: Heiko Stuebner , Sandy Huang Subject: [PATCH 15/15] phy/rockchip: inno-hdmi: Support more pre-pll configuration Thread-Topic: [PATCH 15/15] phy/rockchip: inno-hdmi: Support more pre-pll configuration Thread-Index: AQHVxNLeb9bmNBh5w0iliQOavTNhAg== Date: Mon, 6 Jan 2020 20:50:02 +0000 Message-ID: References: <20200106204951.6060-1-jonas@kwiboo.se> In-Reply-To: <20200106204951.6060-1-jonas@kwiboo.se> Accept-Language: sv-SE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6PR02CA0026.eurprd02.prod.outlook.com (2603:10a6:20b:6e::39) To HE1PR06MB4011.eurprd06.prod.outlook.com (2603:10a6:7:9c::32) x-incomingtopheadermarker: OriginalChecksum:6EDC33D1958C96123F65A2177CF009137D3C9B7876641AD7AF808D72AEA5A4D2; UpperCasedChecksum:52F85FFF0539CB37C2B48EB4C776416EB630F8BCE560206D222E6E49B389AE6E; SizeAsReceived:8238; Count:51 x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-tmn: [+PrFFl+3onmP2d8JW05MrrI8Nfl1TC5s] x-microsoft-original-message-id: <20200106204951.6060-3-jonas@kwiboo.se> x-ms-publictraffictype: Email x-incomingheadercount: 51 x-eopattributedmessage: 0 x-ms-office365-filtering-correlation-id: 6ead8de7-c625-440a-1abc-08d792ea0048 x-ms-traffictypediagnostic: VE1EUR03HT148: x-microsoft-antispam: BCL:0; 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For some freq which can't be got by only using integer freq div, frac freq div is needed, Such as 88.75Mhz 10-bit. But The actual freq is different from the target freq, We must try to narrow the gap between them. RK322X only support integer freq div. The VCO of pre-PLL must be more than 2Ghz, otherwise PLL may be unlocked. Signed-off-by: Algea Cao Signed-off-by: Jonas Karlman Acked-by: Heiko Stuebner --- drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 74 ++++++++++++------- 1 file changed, 49 insertions(+), 25 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c index 3719309ad0d0..bb8bdf5e3301 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -291,32 +291,56 @@ struct inno_hdmi_phy_drv_data { const struct phy_config *phy_cfg_table; }; +/* + * If only using integer freq div can't get frequency we want, frac + * freq div is needed. For example, pclk 88.75 Mhz and tmdsclk + * 110.9375 Mhz must use frac div 0xF00000. The actual frequency is different + * from the target frequency. Such as the tmds clock 110.9375 Mhz, + * the actual tmds clock we get is 110.93719 Mhz. It is important + * to note that RK322X platforms do not support frac div. + */ static const struct pre_pll_config pre_pll_cfg_table[] = { - { 27000000, 27000000, 1, 90, 3, 2, 2, 10, 3, 3, 4, 0, 0}, - { 27000000, 33750000, 1, 90, 1, 3, 3, 10, 3, 3, 4, 0, 0}, - { 40000000, 40000000, 1, 80, 2, 2, 2, 12, 2, 2, 2, 0, 0}, - { 59341000, 59341000, 1, 98, 3, 1, 2, 1, 3, 3, 4, 0, 0xE6AE6B}, - { 59400000, 59400000, 1, 99, 3, 1, 1, 1, 3, 3, 4, 0, 0}, - { 59341000, 74176250, 1, 98, 0, 3, 3, 1, 3, 3, 4, 0, 0xE6AE6B}, - { 59400000, 74250000, 1, 99, 1, 2, 2, 1, 3, 3, 4, 0, 0}, - { 74176000, 74176000, 1, 98, 1, 2, 2, 1, 2, 3, 4, 0, 0xE6AE6B}, - { 74250000, 74250000, 1, 99, 1, 2, 2, 1, 2, 3, 4, 0, 0}, - { 74176000, 92720000, 4, 494, 1, 2, 2, 1, 3, 3, 4, 0, 0x816817}, - { 74250000, 92812500, 4, 495, 1, 2, 2, 1, 3, 3, 4, 0, 0}, - {148352000, 148352000, 1, 98, 1, 1, 1, 1, 2, 2, 2, 0, 0xE6AE6B}, - {148500000, 148500000, 1, 99, 1, 1, 1, 1, 2, 2, 2, 0, 0}, - {148352000, 185440000, 4, 494, 0, 2, 2, 1, 3, 2, 2, 0, 0x816817}, - {148500000, 185625000, 4, 495, 0, 2, 2, 1, 3, 2, 2, 0, 0}, - {296703000, 296703000, 1, 98, 0, 1, 1, 1, 0, 2, 2, 0, 0xE6AE6B}, - {297000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 2, 0, 0}, - {296703000, 370878750, 4, 494, 1, 2, 0, 1, 3, 1, 1, 0, 0x816817}, - {297000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 0, 0}, - {593407000, 296703500, 1, 98, 0, 1, 1, 1, 0, 2, 1, 0, 0xE6AE6B}, - {594000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 1, 0, 0}, - {593407000, 370879375, 4, 494, 1, 2, 0, 1, 3, 1, 1, 1, 0x816817}, - {594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0}, - {593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B}, - {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0}, + { 27000000, 27000000, 1, 90, 3, 2, 2, 10, 3, 3, 4, 0, 0}, + { 27000000, 33750000, 1, 90, 1, 3, 3, 10, 3, 3, 4, 0, 0}, + { 40000000, 40000000, 1, 80, 2, 2, 2, 12, 2, 2, 2, 0, 0}, + { 40000000, 50000000, 1, 100, 2, 2, 2, 1, 0, 0, 15, 0, 0}, + { 59341000, 59341000, 1, 98, 3, 1, 2, 1, 3, 3, 4, 0, 0xE6AE6B}, + { 59400000, 59400000, 1, 99, 3, 1, 1, 1, 3, 3, 4, 0, 0}, + { 59341000, 74176250, 1, 98, 0, 3, 3, 1, 3, 3, 4, 0, 0xE6AE6B}, + { 59400000, 74250000, 1, 99, 1, 2, 2, 1, 3, 3, 4, 0, 0}, + { 65000000, 65000000, 1, 130, 2, 2, 2, 1, 0, 0, 12, 0, 0}, + { 65000000, 81250000, 3, 325, 0, 3, 3, 1, 0, 0, 10, 0, 0}, + { 71000000, 71000000, 3, 284, 0, 3, 3, 1, 0, 0, 8, 0, 0}, + { 71000000, 88750000, 3, 355, 0, 3, 3, 1, 0, 0, 10, 0, 0}, + { 74176000, 74176000, 1, 98, 1, 2, 2, 1, 2, 3, 4, 0, 0xE6AE6B}, + { 74250000, 74250000, 1, 99, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + { 74176000, 92720000, 4, 494, 1, 2, 2, 1, 3, 3, 4, 0, 0x816817}, + { 74250000, 92812500, 4, 495, 1, 2, 2, 1, 3, 3, 4, 0, 0}, + { 83500000, 83500000, 2, 167, 2, 1, 1, 1, 0, 0, 6, 0, 0}, + { 83500000, 104375000, 1, 104, 2, 1, 1, 1, 1, 0, 5, 0, 0x600000}, + { 85750000, 85750000, 3, 343, 0, 3, 3, 1, 0, 0, 8, 0, 0}, + { 88750000, 88750000, 3, 355, 0, 3, 3, 1, 0, 0, 8, 0, 0}, + { 88750000, 110937500, 1, 110, 2, 1, 1, 1, 1, 0, 5, 0, 0xF00000}, + {108000000, 108000000, 1, 90, 3, 0, 0, 1, 0, 0, 5, 0, 0}, + {108000000, 135000000, 1, 90, 0, 2, 2, 1, 0, 0, 5, 0, 0}, + {119000000, 119000000, 1, 119, 2, 1, 1, 1, 0, 0, 6, 0, 0}, + {119000000, 148750000, 1, 99, 0, 2, 2, 1, 0, 0, 5, 0, 0x2AAAAA}, + {148352000, 148352000, 1, 98, 1, 1, 1, 1, 2, 2, 2, 0, 0xE6AE6B}, + {148500000, 148500000, 1, 99, 1, 1, 1, 1, 2, 2, 2, 0, 0}, + {148352000, 185440000, 4, 494, 0, 2, 2, 1, 3, 2, 2, 0, 0x816817}, + {148500000, 185625000, 4, 495, 0, 2, 2, 1, 3, 2, 2, 0, 0}, + {162000000, 162000000, 1, 108, 0, 2, 2, 1, 0, 0, 4, 0, 0}, + {162000000, 202500000, 1, 135, 0, 2, 2, 1, 0, 0, 5, 0, 0}, + {296703000, 296703000, 1, 98, 0, 1, 1, 1, 0, 2, 2, 0, 0xE6AE6B}, + {297000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + {296703000, 370878750, 4, 494, 1, 2, 0, 1, 3, 1, 1, 0, 0x816817}, + {297000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 0, 0}, + {593407000, 296703500, 1, 98, 0, 1, 1, 1, 0, 2, 1, 0, 0xE6AE6B}, + {594000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 1, 0, 0}, + {593407000, 370879375, 4, 494, 1, 2, 0, 1, 3, 1, 1, 1, 0x816817}, + {594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0}, + {593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B}, + {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0}, { /* sentinel */ } };