From patchwork Wed Jan 8 05:23:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Boichat X-Patchwork-Id: 11322805 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 793D1138D for ; Wed, 8 Jan 2020 05:24:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5770A2075B for ; Wed, 8 Jan 2020 05:24:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="ncdGwmPr" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5770A2075B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 47EF16E16B; Wed, 8 Jan 2020 05:24:00 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) by gabe.freedesktop.org (Postfix) with ESMTPS id 922D06E16B for ; Wed, 8 Jan 2020 05:23:58 +0000 (UTC) Received: by mail-pl1-x644.google.com with SMTP id ay11so612869plb.0 for ; Tue, 07 Jan 2020 21:23:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DM0aqT7mORcDNurEQApqfEBtkQorM/LzpTMTVlrl9aM=; b=ncdGwmPrHI55/SBDBh0DPZoQrK3Lo1SJ9dJj2j29oKPgH8ThCHSPN8yJdVWZ+MwCoh AQH8qdCIHUUUgK3eD0s2gZ7Scd8kIBUxEuPYi/tYu6vCjPnwJEUy+Ic4IhNL/dhbVFoJ n9tJAzlRy9Zb0V7jWB54FlbdHEoNXslhoaz2A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DM0aqT7mORcDNurEQApqfEBtkQorM/LzpTMTVlrl9aM=; b=WVvehDTpapVNzwRyLk+vO6sMTZ/8fuXWJb8dNwRGbQ0NLkh143OJltXYmorrjE53Pz NGUzNx3/bQIhM09RUaLR73lELDjrTCqKNxbjuNsVIBAGcjPrex4soeiZgE6N6inbSd7/ QD0Mjknnz/8UAAcsk/KDV8hMjLBEVU3W/zDE6QBP338ttG5jkHF0p/K75Y6cO/D3Hm41 uZJk/H/8llbW6bMsrhlmRXG+vZ5I4L6okcvBaSGrejvrmEn1XU13Q7TOuAS0ma0GHRo/ M+59vx/1M62ltUA5+Ar8JQ5/XRJ3qKJz+jvnaX2g/dhaVT+fVr2v5hS4XHEAN7QTtOqw VIvA== X-Gm-Message-State: APjAAAUKFgiZQQd656ilA5lDSD1FBOrDVW4X00lXWrYPbQg77/teW1x/ YtnHhi7C0OjpkFnfVjMBIuFhiA== X-Google-Smtp-Source: APXvYqx6Kh3IRlEF2mYf7QKx3EM0H7n0giv6QuZmqNIaB7ToM5za17Tr8aM8sd8jKkiVpN89SHLohQ== X-Received: by 2002:a17:902:6bca:: with SMTP id m10mr3635095plt.212.1578461038146; Tue, 07 Jan 2020 21:23:58 -0800 (PST) Received: from drinkcat2.tpe.corp.google.com ([2401:fa00:1:b:d8b7:33af:adcb:b648]) by smtp.gmail.com with ESMTPSA id n24sm387505pff.12.2020.01.07.21.23.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 21:23:57 -0800 (PST) From: Nicolas Boichat To: Rob Herring Subject: [PATCH v2 1/7] dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183 Date: Wed, 8 Jan 2020 13:23:31 +0800 Message-Id: <20200108052337.65916-2-drinkcat@chromium.org> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog In-Reply-To: <20200108052337.65916-1-drinkcat@chromium.org> References: <20200108052337.65916-1-drinkcat@chromium.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Tomeu Vizoso , David Airlie , linux-kernel@vger.kernel.org, Liam Girdwood , dri-devel@lists.freedesktop.org, Steven Price , Mark Brown , linux-mediatek@lists.infradead.org, Alyssa Rosenzweig , hsinyi@chromium.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Define a compatible string for the Mali Bifrost GPU found in Mediatek's MT8183 SoCs. Signed-off-by: Nicolas Boichat --- .../bindings/gpu/arm,mali-bifrost.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index 4ea6a8789699709..9e095608d2d98f0 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -17,6 +17,7 @@ properties: items: - enum: - amlogic,meson-g12a-mali + - mediatek,mt8183-mali - realtek,rtd1619-mali - rockchip,px30-mali - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable @@ -62,6 +63,23 @@ allOf: minItems: 2 required: - resets + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-mali + then: + properties: + sram-supply: true + power-domains: + description: + List of phandle and PM domain specifier as documented in + Documentation/devicetree/bindings/power/power_domain.txt + minItems: 3 + maxItems: 3 + required: + - sram-supply + - power-domains examples: - | From patchwork Wed Jan 8 05:23:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Boichat X-Patchwork-Id: 11322807 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E2C68138D for ; Wed, 8 Jan 2020 05:24:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C11662075B for ; Wed, 8 Jan 2020 05:24:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="NkVCUiKN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C11662075B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D4EFD6E16D; Wed, 8 Jan 2020 05:24:02 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9805B6E16D for ; Wed, 8 Jan 2020 05:24:01 +0000 (UTC) Received: by mail-pf1-x441.google.com with SMTP id n9so995624pff.13 for ; Tue, 07 Jan 2020 21:24:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lllmZMa5R6OSarsk8DAetZxTWweyF2murgh0XlHq6j4=; b=NkVCUiKNiOJ9C+pbhXp0aEB19RPqRC6wDm+6NS8Rr/QZs/IAYhTqfvM5dahItDjNi2 w99fCIjhyz4QnH/H+A5Tkx79ELP7lzPKVSYKJ2AU6rLW3U7TWhWa7Q85F56l0LaPbz78 JJ7+bjD2dnlIc3L6d2ILkOPzx292Vi6xrOtKo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lllmZMa5R6OSarsk8DAetZxTWweyF2murgh0XlHq6j4=; b=c/ztGWplV3j3hJis5jUdrDciWXLylZwmLSpiMFxIl6yqL+5NiHtfelumz/8ZQ8e6xX 8os8xSKE9yeftJwpCoEIXXlEaWDCp5ohMAHNcnH2epdNsnUXVs+ky+V6EaNYRQEm43VB vyhh/iYy/2cA2l5to1SFcpl4FnB7y8IKHWThr/eXI089U722ZfkSxMyyGihRxSm0twaL okClQx2Hw9d7VG+D3GkTcyCMOJkA+YwY+gpa9h0LwglGWxatwUGeUxpDcB/nXdUv0zL7 SAkmnXxwPiPUIIcJ/LaoHTEPkESirI/+ZcWqcwtzz710tId8E/kIHHhXzw1OT9uAJwJy RMtQ== X-Gm-Message-State: APjAAAWFQFdVYt2MSS11Rndnt32XZAxaGDPrL1BkOgfZnR/aci3ww4ZR hQdfExN2X6d3CQecQnIOTgymKQ== X-Google-Smtp-Source: APXvYqy9kdjs/Um2IyO+H3n2Uvl2wwJ0A9aXcxstBbPu8pAseFU4tXf5tBo4X2iXZIDhrkk0EScOYA== X-Received: by 2002:a63:d041:: with SMTP id s1mr3417134pgi.363.1578461041186; Tue, 07 Jan 2020 21:24:01 -0800 (PST) Received: from drinkcat2.tpe.corp.google.com ([2401:fa00:1:b:d8b7:33af:adcb:b648]) by smtp.gmail.com with ESMTPSA id n24sm387505pff.12.2020.01.07.21.23.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 21:24:00 -0800 (PST) From: Nicolas Boichat To: Rob Herring Subject: [PATCH v2 2/7] arm64: dts: mt8183: Add node for the Mali GPU Date: Wed, 8 Jan 2020 13:23:32 +0800 Message-Id: <20200108052337.65916-3-drinkcat@chromium.org> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog In-Reply-To: <20200108052337.65916-1-drinkcat@chromium.org> References: <20200108052337.65916-1-drinkcat@chromium.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Tomeu Vizoso , David Airlie , linux-kernel@vger.kernel.org, Liam Girdwood , dri-devel@lists.freedesktop.org, Steven Price , Mark Brown , linux-mediatek@lists.infradead.org, Alyssa Rosenzweig , hsinyi@chromium.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add a basic GPU node for mt8183. Signed-off-by: Nicolas Boichat --- Upstreaming what matches existing bindings from our Chromium OS tree: https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.19/arch/arm64/boot/dts/mediatek/mt8183.dtsi#1348 The evb part of this change depends on this patch to add PMIC dtsi: https://patchwork.kernel.org/patch/10928161/ The binding we use with out-of-tree Mali drivers includes more clocks, this is used for devfreq: the out-of-tree driver switches clk_mux to clk_sub_parent (26Mhz), adjusts clk_main_parent, then switches clk_mux back to clk_main_parent: (see https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.19/drivers/gpu/arm/midgard/platform/mediatek/mali_kbase_runtime_pm.c#423) clocks = <&topckgen CLK_TOP_MFGPLL_CK>, <&topckgen CLK_TOP_MUX_MFG>, <&clk26m>, <&mfgcfg CLK_MFG_BG3D>; clock-names = "clk_main_parent", "clk_mux", "clk_sub_parent", "subsys_mfg_cg"; v2: - Use sram instead of mali_sram as SRAM supply name. - Rename mali@ to gpu@. arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 7 ++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 104 ++++++++++++++++++++ 2 files changed, 111 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts index 1fb195c683c3d01..7d609e0cd9b4975 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "mt8183.dtsi" +#include "mt6358.dtsi" / { model = "MediaTek MT8183 evaluation board"; @@ -30,6 +31,12 @@ &auxadc { status = "okay"; }; +&gpu { + supply-names = "mali", "sram"; + mali-supply = <&mt6358_vgpu_reg>; + sram-supply = <&mt6358_vsram_gpu_reg>; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c_pins_0>; diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 1ade9153e5c265b..4da3f1ed1c15bf3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -597,6 +597,110 @@ mfgcfg: syscon@13000000 { #clock-cells = <1>; }; + gpu: gpu@13040000 { + compatible = "mediatek,mt8183-mali", "arm,mali-bifrost"; + reg = <0 0x13040000 0 0x4000>; + interrupts = + , + , + ; + interrupt-names = "job", "mmu", "gpu"; + + clocks = <&topckgen CLK_TOP_MFGPLL_CK>; + + power-domains = + <&scpsys MT8183_POWER_DOMAIN_MFG_CORE0>, + <&scpsys MT8183_POWER_DOMAIN_MFG_CORE1>, + <&scpsys MT8183_POWER_DOMAIN_MFG_2D>; + + operating-points-v2 = <&gpu_opp_table>; + }; + + gpu_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <625000>, <850000>; + }; + + opp-320000000 { + opp-hz = /bits/ 64 <320000000>; + opp-microvolt = <631250>, <850000>; + }; + + opp-340000000 { + opp-hz = /bits/ 64 <340000000>; + opp-microvolt = <637500>, <850000>; + }; + + opp-360000000 { + opp-hz = /bits/ 64 <360000000>; + opp-microvolt = <643750>, <850000>; + }; + + opp-380000000 { + opp-hz = /bits/ 64 <380000000>; + opp-microvolt = <650000>, <850000>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <656250>, <850000>; + }; + + opp-420000000 { + opp-hz = /bits/ 64 <420000000>; + opp-microvolt = <662500>, <850000>; + }; + + opp-460000000 { + opp-hz = /bits/ 64 <460000000>; + opp-microvolt = <675000>, <850000>; + }; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <687500>, <850000>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + opp-microvolt = <700000>, <850000>; + }; + + opp-580000000 { + opp-hz = /bits/ 64 <580000000>; + opp-microvolt = <712500>, <850000>; + }; + + opp-620000000 { + opp-hz = /bits/ 64 <620000000>; + opp-microvolt = <725000>, <850000>; + }; + + opp-653000000 { + opp-hz = /bits/ 64 <653000000>; + opp-microvolt = <743750>, <850000>; + }; + + opp-698000000 { + opp-hz = /bits/ 64 <698000000>; + opp-microvolt = <768750>, <868750>; + }; + + opp-743000000 { + opp-hz = /bits/ 64 <743000000>; + opp-microvolt = <793750>, <893750>; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <825000>, <925000>; + }; + }; + mmsys: syscon@14000000 { compatible = "mediatek,mt8183-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; From patchwork Wed Jan 8 05:23:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Boichat X-Patchwork-Id: 11322809 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 15972138D for ; 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Tue, 07 Jan 2020 21:24:04 -0800 (PST) Received: from drinkcat2.tpe.corp.google.com ([2401:fa00:1:b:d8b7:33af:adcb:b648]) by smtp.gmail.com with ESMTPSA id n24sm387505pff.12.2020.01.07.21.24.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 21:24:03 -0800 (PST) From: Nicolas Boichat To: Rob Herring Subject: [PATCH v2 3/7] drm/panfrost: Improve error reporting in panfrost_gpu_power_on Date: Wed, 8 Jan 2020 13:23:33 +0800 Message-Id: <20200108052337.65916-4-drinkcat@chromium.org> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog In-Reply-To: <20200108052337.65916-1-drinkcat@chromium.org> References: <20200108052337.65916-1-drinkcat@chromium.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Tomeu Vizoso , David Airlie , linux-kernel@vger.kernel.org, Liam Girdwood , dri-devel@lists.freedesktop.org, Steven Price , Mark Brown , linux-mediatek@lists.infradead.org, Alyssa Rosenzweig , hsinyi@chromium.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" It is useful to know which component cannot be powered on. Signed-off-by: Nicolas Boichat Reviewed-by: Steven Price --- Was useful when trying to probe bifrost GPU, to understand what issue we are facing. --- drivers/gpu/drm/panfrost/panfrost_gpu.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c index 8822ec13a0d619f..ba02bbfcf28c011 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -308,21 +308,26 @@ void panfrost_gpu_power_on(struct panfrost_device *pfdev) gpu_write(pfdev, L2_PWRON_LO, pfdev->features.l2_present); ret = readl_relaxed_poll_timeout(pfdev->iomem + L2_READY_LO, val, val == pfdev->features.l2_present, 100, 1000); + if (ret) + dev_err(pfdev->dev, "error powering up gpu L2"); gpu_write(pfdev, STACK_PWRON_LO, pfdev->features.stack_present); - ret |= readl_relaxed_poll_timeout(pfdev->iomem + STACK_READY_LO, + ret = readl_relaxed_poll_timeout(pfdev->iomem + STACK_READY_LO, val, val == pfdev->features.stack_present, 100, 1000); + if (ret) + dev_err(pfdev->dev, "error powering up gpu stack"); gpu_write(pfdev, SHADER_PWRON_LO, pfdev->features.shader_present); - ret |= readl_relaxed_poll_timeout(pfdev->iomem + SHADER_READY_LO, + ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_READY_LO, val, val == pfdev->features.shader_present, 100, 1000); + if (ret) + dev_err(pfdev->dev, "error powering up gpu shader"); gpu_write(pfdev, TILER_PWRON_LO, pfdev->features.tiler_present); - ret |= readl_relaxed_poll_timeout(pfdev->iomem + TILER_READY_LO, + ret = readl_relaxed_poll_timeout(pfdev->iomem + TILER_READY_LO, val, val == pfdev->features.tiler_present, 100, 1000); - if (ret) - dev_err(pfdev->dev, "error powering up gpu"); + dev_err(pfdev->dev, "error powering up gpu tiler"); } void panfrost_gpu_power_off(struct panfrost_device *pfdev) From patchwork Wed Jan 8 05:23:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Boichat X-Patchwork-Id: 11322811 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 73F451398 for ; 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Tue, 07 Jan 2020 21:24:07 -0800 (PST) Received: from drinkcat2.tpe.corp.google.com ([2401:fa00:1:b:d8b7:33af:adcb:b648]) by smtp.gmail.com with ESMTPSA id n24sm387505pff.12.2020.01.07.21.24.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 21:24:06 -0800 (PST) From: Nicolas Boichat To: Rob Herring Subject: [PATCH v2 4/7] drm/panfrost: Add support for a second regulator for the GPU Date: Wed, 8 Jan 2020 13:23:34 +0800 Message-Id: <20200108052337.65916-5-drinkcat@chromium.org> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog In-Reply-To: <20200108052337.65916-1-drinkcat@chromium.org> References: <20200108052337.65916-1-drinkcat@chromium.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Tomeu Vizoso , David Airlie , linux-kernel@vger.kernel.org, Liam Girdwood , dri-devel@lists.freedesktop.org, Steven Price , Mark Brown , linux-mediatek@lists.infradead.org, Alyssa Rosenzweig , hsinyi@chromium.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Some GPUs, namely, the bifrost/g72 part on MT8183, have a second regulator for their SRAM, let's add support for that. Signed-off-by: Nicolas Boichat --- drivers/gpu/drm/panfrost/panfrost_device.c | 21 +++++++++++++++++++++ drivers/gpu/drm/panfrost/panfrost_device.h | 1 + 2 files changed, 22 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c index 238fb6d54df4732..a0b0a6fef8b4e63 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -102,12 +102,33 @@ static int panfrost_regulator_init(struct panfrost_device *pfdev) return ret; } + pfdev->regulator_sram = devm_regulator_get_optional(pfdev->dev, "sram"); + if (IS_ERR(pfdev->regulator_sram)) { + ret = PTR_ERR(pfdev->regulator_sram); + dev_err(pfdev->dev, "failed to get SRAM regulator: %d\n", ret); + goto err; + } + + if (pfdev->regulator_sram) { + ret = regulator_enable(pfdev->regulator_sram); + if (ret < 0) { + dev_err(pfdev->dev, + "failed to enable SRAM regulator: %d\n", ret); + goto err; + } + } + return 0; + +err: + regulator_disable(pfdev->regulator); + return ret; } static void panfrost_regulator_fini(struct panfrost_device *pfdev) { regulator_disable(pfdev->regulator); + regulator_disable(pfdev->regulator_sram); } int panfrost_device_init(struct panfrost_device *pfdev) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h index 06713811b92cdf7..a124334d69e7e93 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -60,6 +60,7 @@ struct panfrost_device { struct clk *clock; struct clk *bus_clock; struct regulator *regulator; + struct regulator *regulator_sram; struct reset_control *rstc; struct panfrost_features features; From patchwork Wed Jan 8 05:23:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Boichat X-Patchwork-Id: 11322813 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 692D21398 for ; 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Tue, 07 Jan 2020 21:24:09 -0800 (PST) Received: from drinkcat2.tpe.corp.google.com ([2401:fa00:1:b:d8b7:33af:adcb:b648]) by smtp.gmail.com with ESMTPSA id n24sm387505pff.12.2020.01.07.21.24.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 21:24:09 -0800 (PST) From: Nicolas Boichat To: Rob Herring Subject: [PATCH v2 5/7] drm/panfrost: Add support for multiple power domain support Date: Wed, 8 Jan 2020 13:23:35 +0800 Message-Id: <20200108052337.65916-6-drinkcat@chromium.org> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog In-Reply-To: <20200108052337.65916-1-drinkcat@chromium.org> References: <20200108052337.65916-1-drinkcat@chromium.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Tomeu Vizoso , David Airlie , linux-kernel@vger.kernel.org, Liam Girdwood , dri-devel@lists.freedesktop.org, Steven Price , Mark Brown , linux-mediatek@lists.infradead.org, Alyssa Rosenzweig , hsinyi@chromium.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" When there is a single power domain per device, the core will ensure the power domains are all switched on. However, when there are multiple ones, as in MT8183 Bifrost GPU, we need to handle them in driver code. Signed-off-by: Nicolas Boichat --- The downstream driver we use on chromeos-4.19 currently uses 2 additional devices in device tree to accomodate for this [1], but I believe this solution is cleaner. [1] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/heads/chromeos-4.19/drivers/gpu/arm/midgard/platform/mediatek/mali_kbase_runtime_pm.c#31 drivers/gpu/drm/panfrost/panfrost_device.c | 87 ++++++++++++++++++++-- drivers/gpu/drm/panfrost/panfrost_device.h | 4 + 2 files changed, 83 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c index a0b0a6fef8b4e63..c6e9e059de94a4d 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -5,6 +5,7 @@ #include #include #include +#include #include #include "panfrost_device.h" @@ -131,6 +132,67 @@ static void panfrost_regulator_fini(struct panfrost_device *pfdev) regulator_disable(pfdev->regulator_sram); } +static void panfrost_pm_domain_fini(struct panfrost_device *pfdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) { + if (!pfdev->pm_domain_devs[i]) + break; + + if (pfdev->pm_domain_links[i]) + device_link_del(pfdev->pm_domain_links[i]); + + dev_pm_domain_detach(pfdev->pm_domain_devs[i], true); + } +} + +static int panfrost_pm_domain_init(struct panfrost_device *pfdev) +{ + int err; + int i, num_domains; + + num_domains = of_count_phandle_with_args(pfdev->dev->of_node, + "power-domains", + "#power-domain-cells"); + /* Single domains are handled by the core. */ + if (num_domains < 2) + return 0; + + if (num_domains > ARRAY_SIZE(pfdev->pm_domain_devs)) { + dev_err(pfdev->dev, "Too many pm-domains: %d\n", num_domains); + return -EINVAL; + } + + for (i = 0; i < num_domains; i++) { + pfdev->pm_domain_devs[i] = + dev_pm_domain_attach_by_id(pfdev->dev, i); + if (IS_ERR(pfdev->pm_domain_devs[i])) { + err = PTR_ERR(pfdev->pm_domain_devs[i]); + pfdev->pm_domain_devs[i] = NULL; + dev_err(pfdev->dev, + "failed to get pm-domain %d: %d\n", i, err); + goto err; + } + + pfdev->pm_domain_links[i] = device_link_add(pfdev->dev, + pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME | + DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE); + if (!pfdev->pm_domain_links[i]) { + dev_err(pfdev->pm_domain_devs[i], + "adding device link failed!\n"); + err = -ENODEV; + goto err; + } + } + + return 0; + +err: + panfrost_pm_domain_fini(pfdev); + return err; +} + int panfrost_device_init(struct panfrost_device *pfdev) { int err; @@ -161,37 +223,45 @@ int panfrost_device_init(struct panfrost_device *pfdev) goto err_out1; } + err = panfrost_pm_domain_init(pfdev); + if (err) { + dev_err(pfdev->dev, "pm_domain init failed %d\n", err); + goto err_out2; + } + res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0); pfdev->iomem = devm_ioremap_resource(pfdev->dev, res); if (IS_ERR(pfdev->iomem)) { dev_err(pfdev->dev, "failed to ioremap iomem\n"); err = PTR_ERR(pfdev->iomem); - goto err_out2; + goto err_out3; } err = panfrost_gpu_init(pfdev); if (err) - goto err_out2; + goto err_out3; err = panfrost_mmu_init(pfdev); if (err) - goto err_out3; + goto err_out4; err = panfrost_job_init(pfdev); if (err) - goto err_out4; + goto err_out5; err = panfrost_perfcnt_init(pfdev); if (err) - goto err_out5; + goto err_out6; return 0; -err_out5: +err_out6: panfrost_job_fini(pfdev); -err_out4: +err_out5: panfrost_mmu_fini(pfdev); -err_out3: +err_out4: panfrost_gpu_fini(pfdev); +err_out3: + panfrost_pm_domain_fini(pfdev); err_out2: panfrost_reset_fini(pfdev); err_out1: @@ -208,6 +278,7 @@ void panfrost_device_fini(struct panfrost_device *pfdev) panfrost_mmu_fini(pfdev); panfrost_gpu_fini(pfdev); panfrost_reset_fini(pfdev); + panfrost_pm_domain_fini(pfdev); panfrost_regulator_fini(pfdev); panfrost_clk_fini(pfdev); } diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h index a124334d69e7e93..92d471676fc7823 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -19,6 +19,7 @@ struct panfrost_job; struct panfrost_perfcnt; #define NUM_JOB_SLOTS 3 +#define MAX_PM_DOMAINS 3 struct panfrost_features { u16 id; @@ -62,6 +63,9 @@ struct panfrost_device { struct regulator *regulator; struct regulator *regulator_sram; struct reset_control *rstc; + /* pm_domains for devices with more than one. */ + struct device *pm_domain_devs[MAX_PM_DOMAINS]; + struct device_link *pm_domain_links[MAX_PM_DOMAINS]; struct panfrost_features features; From patchwork Wed Jan 8 05:23:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Boichat X-Patchwork-Id: 11322817 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8AE7813A0 for ; Wed, 8 Jan 2020 05:24:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 69B8020720 for ; Wed, 8 Jan 2020 05:24:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="QLx9yX4o" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 69B8020720 Authentication-Results: mail.kernel.org; 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Tue, 07 Jan 2020 21:24:12 -0800 (PST) From: Nicolas Boichat To: Rob Herring Subject: [PATCH v2 6/7, RFC] drm/panfrost: Add bifrost compatible string Date: Wed, 8 Jan 2020 13:23:36 +0800 Message-Id: <20200108052337.65916-7-drinkcat@chromium.org> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog In-Reply-To: <20200108052337.65916-1-drinkcat@chromium.org> References: <20200108052337.65916-1-drinkcat@chromium.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Tomeu Vizoso , David Airlie , linux-kernel@vger.kernel.org, Liam Girdwood , dri-devel@lists.freedesktop.org, Steven Price , Mark Brown , linux-mediatek@lists.infradead.org, Alyssa Rosenzweig , hsinyi@chromium.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" For testing only, the driver doesn't really work yet, AFAICT. Signed-off-by: Nicolas Boichat Reviewed-by: Steven Price --- drivers/gpu/drm/panfrost/panfrost_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 48e3c4165247cea..f3a4d77266ba961 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -591,6 +591,7 @@ static const struct of_device_id dt_match[] = { { .compatible = "arm,mali-t830" }, { .compatible = "arm,mali-t860" }, { .compatible = "arm,mali-t880" }, + { .compatible = "arm,mali-bifrost" }, {} }; MODULE_DEVICE_TABLE(of, dt_match); From patchwork Wed Jan 8 05:23:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Boichat X-Patchwork-Id: 11322821 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9DB881398 for ; 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Tue, 07 Jan 2020 21:24:15 -0800 (PST) Received: from drinkcat2.tpe.corp.google.com ([2401:fa00:1:b:d8b7:33af:adcb:b648]) by smtp.gmail.com with ESMTPSA id n24sm387505pff.12.2020.01.07.21.24.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 21:24:15 -0800 (PST) From: Nicolas Boichat To: Rob Herring Subject: [PATCH v2 7/7, RFC]: drm/panfrost: devfreq: Add support for 2 regulators Date: Wed, 8 Jan 2020 13:23:37 +0800 Message-Id: <20200108052337.65916-8-drinkcat@chromium.org> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog In-Reply-To: <20200108052337.65916-1-drinkcat@chromium.org> References: <20200108052337.65916-1-drinkcat@chromium.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Tomeu Vizoso , David Airlie , linux-kernel@vger.kernel.org, Liam Girdwood , dri-devel@lists.freedesktop.org, Steven Price , Mark Brown , linux-mediatek@lists.infradead.org, Alyssa Rosenzweig , hsinyi@chromium.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Bifrost GPU on MT8183 uses 2 regulators (core and SRAM) for devfreq, and provides OPP table with 2 sets of voltages. TODO: This is incomplete as we'll need add support for setting a pair of voltages as well. Signed-off-by: Nicolas Boichat --- drivers/gpu/drm/panfrost/panfrost_devfreq.c | 18 ++++++++++++++++++ drivers/gpu/drm/panfrost/panfrost_device.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c index 413987038fbfccb..5eb0effded7eb09 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -79,6 +79,22 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) struct devfreq *devfreq; struct thermal_cooling_device *cooling; + /* If we have 2 regulator, we need an OPP table with 2 voltages. */ + if (pfdev->regulator_sram) { + const char * const reg_names[] = { "mali", "sram" }; + + pfdev->devfreq.dev_opp_table = + dev_pm_opp_set_regulators(dev, + reg_names, ARRAY_SIZE(reg_names)); + if (IS_ERR(pfdev->devfreq.dev_opp_table)) { + ret = PTR_ERR(pfdev->devfreq.dev_opp_table); + pfdev->devfreq.dev_opp_table = NULL; + dev_err(dev, + "Failed to init devfreq opp table: %d\n", ret); + return ret; + } + } + ret = dev_pm_opp_of_add_table(dev); if (ret == -ENODEV) /* Optional, continue without devfreq */ return 0; @@ -119,6 +135,8 @@ void panfrost_devfreq_fini(struct panfrost_device *pfdev) if (pfdev->devfreq.cooling) devfreq_cooling_unregister(pfdev->devfreq.cooling); dev_pm_opp_of_remove_table(&pfdev->pdev->dev); + if (pfdev->devfreq.dev_opp_table) + dev_pm_opp_put_regulators(pfdev->devfreq.dev_opp_table); } void panfrost_devfreq_resume(struct panfrost_device *pfdev) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h index 92d471676fc7823..581da3fe5df8b17 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -91,10 +91,12 @@ struct panfrost_device { struct { struct devfreq *devfreq; struct thermal_cooling_device *cooling; + struct opp_table *dev_opp_table; ktime_t busy_time; ktime_t idle_time; ktime_t time_last_update; atomic_t busy_count; + struct panfrost_devfreq_slot slot[NUM_JOB_SLOTS]; } devfreq; };