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Tue, 25 Sep 2018 16:51:44 +0000 From: Dong Aisheng To: linux-arm-kernel@lists.infradead.org Cc: dongas86@gmail.com, kernel@pengutronix.de, shawnguo@kernel.org, fabio.estevam@nxp.com, linux-imx@nxp.com, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-pm@vger.kernel.org, Dong Aisheng Subject: [PATCH V2 1/2] firmware: imx: add pm svc headfile Date: Wed, 26 Sep 2018 00:36:30 +0800 Message-Id: <1537893391-31084-2-git-send-email-aisheng.dong@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1537893391-31084-1-git-send-email-aisheng.dong@nxp.com> References: <1537893391-31084-1-git-send-email-aisheng.dong@nxp.com> MIME-Version: 1.0 X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: HK0PR03CA0047.apcprd03.prod.outlook.com (2603:1096:203:2f::35) To DB7PR04MB4219.eurprd04.prod.outlook.com (2603:10a6:5:27::16) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1daf24e1-b7b5-4eaa-887f-08d623072f7c X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534165)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB7PR04MB4219; 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Cc: Shawn Guo Cc: Sascha Hauer Signed-off-by: Dong Aisheng --- v6->v7: new introduced --- include/soc/imx/scu/sci.h | 1 + include/soc/imx/scu/svc/pm.h | 85 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 86 insertions(+) create mode 100644 include/soc/imx/scu/svc/pm.h diff --git a/include/soc/imx/scu/sci.h b/include/soc/imx/scu/sci.h index 4a60d70..b600f7e 100644 --- a/include/soc/imx/scu/sci.h +++ b/include/soc/imx/scu/sci.h @@ -14,4 +14,5 @@ #include #include +#include #endif /* _SC_SCI_H */ diff --git a/include/soc/imx/scu/svc/pm.h b/include/soc/imx/scu/svc/pm.h new file mode 100644 index 0000000..f247fce --- /dev/null +++ b/include/soc/imx/scu/svc/pm.h @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017~2018 NXP + * + * Header file containing the public API for the System Controller (SC) + * Power Management (PM) function. This includes functions for power state + * control, clock control, reset control, and wake-up event control. + * + * PM_SVC (SVC) Power Management Service + * + * Module for the Power Management (PM) service. + */ + +#ifndef _SC_PM_API_H +#define _SC_PM_API_H + +#include + +/* + * This type is used to indicate RPC PM function calls. + */ +enum pm_func_e { + PM_FUNC_UNKNOWN = 0, + PM_FUNC_SET_SYS_POWER_MODE = 19, + PM_FUNC_SET_PARTITION_POWER_MODE = 1, + PM_FUNC_GET_SYS_POWER_MODE = 2, + PM_FUNC_SET_RESOURCE_POWER_MODE = 3, + PM_FUNC_GET_RESOURCE_POWER_MODE = 4, + PM_FUNC_REQ_LOW_POWER_MODE = 16, + PM_FUNC_SET_CPU_RESUME_ADDR = 17, + PM_FUNC_REQ_SYS_IF_POWER_MODE = 18, + PM_FUNC_SET_CLOCK_RATE = 5, + PM_FUNC_GET_CLOCK_RATE = 6, + PM_FUNC_CLOCK_ENABLE = 7, + PM_FUNC_SET_CLOCK_PARENT = 14, + PM_FUNC_GET_CLOCK_PARENT = 15, + PM_FUNC_RESET = 13, + PM_FUNC_RESET_REASON = 10, + PM_FUNC_BOOT = 8, + PM_FUNC_REBOOT = 9, + PM_FUNC_REBOOT_PARTITION = 12, + PM_FUNC_CPU_START = 11, +}; + +/* + * Defines for ALL parameters + */ +#define SC_PM_CLK_ALL UINT8_MAX /* All clocks */ + +/* + * Defines for SC PM Power Mode + */ +#define SC_PM_PW_MODE_OFF 0 /* Power off */ +#define SC_PM_PW_MODE_STBY 1 /* Power in standby */ +#define SC_PM_PW_MODE_LP 2 /* Power in low-power */ +#define SC_PM_PW_MODE_ON 3 /* Power on */ + +/* + * Defines for SC PM CLK + */ +#define SC_PM_CLK_SLV_BUS 0 /* Slave bus clock */ +#define SC_PM_CLK_MST_BUS 1 /* Master bus clock */ +#define SC_PM_CLK_PER 2 /* Peripheral clock */ +#define SC_PM_CLK_PHY 3 /* Phy clock */ +#define SC_PM_CLK_MISC 4 /* Misc clock */ +#define SC_PM_CLK_MISC0 0 /* Misc 0 clock */ +#define SC_PM_CLK_MISC1 1 /* Misc 1 clock */ +#define SC_PM_CLK_MISC2 2 /* Misc 2 clock */ +#define SC_PM_CLK_MISC3 3 /* Misc 3 clock */ +#define SC_PM_CLK_MISC4 4 /* Misc 4 clock */ +#define SC_PM_CLK_CPU 2 /* CPU clock */ +#define SC_PM_CLK_PLL 4 /* PLL */ +#define SC_PM_CLK_BYPASS 4 /* Bypass clock */ + +/* + * Defines for SC PM CLK Parent + */ +#define SC_PM_PARENT_XTAL 0 /* Parent is XTAL. */ +#define SC_PM_PARENT_PLL0 1 /* Parent is PLL0 */ +#define SC_PM_PARENT_PLL1 2 /* Parent is PLL1 or PLL0/2 */ +#define SC_PM_PARENT_PLL2 3 /* Parent in PLL2 or PLL0/4 */ +#define SC_PM_PARENT_BYPS 4 /* Parent is a bypass clock. */ + +#endif /* _SC_PM_API_H */ From patchwork Tue Sep 25 16:36:31 2018 Content-Type: text/plain; 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Tue, 25 Sep 2018 16:51:49 +0000 From: Dong Aisheng To: linux-arm-kernel@lists.infradead.org Cc: dongas86@gmail.com, kernel@pengutronix.de, shawnguo@kernel.org, fabio.estevam@nxp.com, linux-imx@nxp.com, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-pm@vger.kernel.org, Dong Aisheng Subject: [PATCH V2 2/2] firmware: imx: add SCU power domain driver Date: Wed, 26 Sep 2018 00:36:31 +0800 Message-Id: <1537893391-31084-3-git-send-email-aisheng.dong@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1537893391-31084-1-git-send-email-aisheng.dong@nxp.com> References: <1537893391-31084-1-git-send-email-aisheng.dong@nxp.com> MIME-Version: 1.0 X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: HK0PR03CA0047.apcprd03.prod.outlook.com (2603:1096:203:2f::35) To DB7PR04MB4219.eurprd04.prod.outlook.com (2603:10a6:5:27::16) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5a8a050e-9877-4833-40ac-08d62307325d X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534165)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB7PR04MB4219; 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Communication between the host processor running an OS and the system controller happens through a SCU protocol. This patch adds SCU protocol based power domains drivers. Cc: Shawn Guo Cc: Sascha Hauer Cc: Fabio Estevam Cc: "Rafael J. Wysocki" Cc: Kevin Hilman Cc: linux-pm@vger.kernel.org Reviewed-by: Ulf Hansson Signed-off-by: Dong Aisheng --- ChangeLog: v1->v2: * move into drivers/firmware/imx * Implement sc_pm_set_resource_power_mode() API in the driver instead of call it via SCU API according to Sascha's suggestion --- drivers/firmware/imx/Kconfig | 6 ++ drivers/firmware/imx/Makefile | 3 +- drivers/firmware/imx/scu-pd.c | 175 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 183 insertions(+), 1 deletion(-) create mode 100644 drivers/firmware/imx/scu-pd.c diff --git a/drivers/firmware/imx/Kconfig b/drivers/firmware/imx/Kconfig index b170c28..6a7a7c2 100644 --- a/drivers/firmware/imx/Kconfig +++ b/drivers/firmware/imx/Kconfig @@ -9,3 +9,9 @@ config IMX_SCU This driver manages the IPC interface between host CPU and the SCU firmware running on M4. + +config IMX_SCU_PD + bool "IMX SCU Power Domain driver" + depends on IMX_SCU + help + The System Controller Firmware (SCFW) based power domain driver. diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile index 0ac04df..1b2e15b 100644 --- a/drivers/firmware/imx/Makefile +++ b/drivers/firmware/imx/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o +obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o +obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c new file mode 100644 index 0000000..d6d5771 --- /dev/null +++ b/drivers/firmware/imx/scu-pd.c @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017~2018 NXP + * Dong Aisheng + * + * Implementation of the SCU based Power Domains + */ + +#define pr_fmt(fmt) "scu_pd: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +struct imx_sc_pm_domain { + struct generic_pm_domain pd; + sc_rsrc_t rsrc_id; +}; + +static struct sc_ipc *pm_ipc_handle; + +/* SCU Power Mode Protocol definition */ +struct imx_sc_msg_req_set_resource_power_mode { + struct sc_rpc_msg hdr; + u16 resource; + u8 mode; +} __packed; + +static int imx_sc_pd_power(struct generic_pm_domain *domain, bool power_on) +{ + struct imx_sc_msg_req_set_resource_power_mode msg; + struct sc_rpc_msg *hdr = &msg.hdr; + struct imx_sc_pm_domain *pd; + sc_err_t sci_err; + int ret; + + pd = container_of(domain, struct imx_sc_pm_domain, pd); + + hdr->ver = SC_RPC_VERSION; + hdr->svc = (uint8_t)SC_RPC_SVC_PM; + hdr->func = (uint8_t)PM_FUNC_SET_RESOURCE_POWER_MODE; + hdr->size = 2; + + msg.resource = pd->rsrc_id; + msg.mode = power_on ? SC_PM_PW_MODE_ON : SC_PM_PW_MODE_LP; + + ret = imx_scu_call_rpc(pm_ipc_handle, &msg, true); + if (ret) + return ret; + + sci_err = (sc_err_t)hdr->func; + if (sci_err) { + pr_err("failed to power %s resource %d ret %d\n", + power_on ? "up" : "off", pd->rsrc_id, sci_err); + return -EPERM; + } + + return 0; +} + +static int imx_sc_pd_power_on(struct generic_pm_domain *domain) +{ + return imx_sc_pd_power(domain, true); +} + +static int imx_sc_pd_power_off(struct generic_pm_domain *domain) +{ + return imx_sc_pd_power(domain, false); +} + +static struct generic_pm_domain *imx_sc_pm_add_one_domain( + struct device_node *np, + struct generic_pm_domain *genpd_parent) +{ + struct imx_sc_pm_domain *imx_sc_pd; + sc_rsrc_t rsrc_id; + int ret; + + imx_sc_pd = kzalloc(sizeof(*imx_sc_pd), GFP_KERNEL); + if (!imx_sc_pd) + return ERR_PTR(-ENOMEM); + + if (!of_property_read_u32(np, "reg", &rsrc_id)) { + if (rsrc_id > SC_R_LAST) { + pr_warn("%pOF: invalid rsrc id %d found", np, rsrc_id); + ret = -EINVAL; + goto err; + } + imx_sc_pd->rsrc_id = rsrc_id; + } else { + imx_sc_pd->rsrc_id = SC_R_LAST; + } + + if (imx_sc_pd->rsrc_id != SC_R_LAST) { + imx_sc_pd->pd.power_off = imx_sc_pd_power_off; + imx_sc_pd->pd.power_on = imx_sc_pd_power_on; + } + + imx_sc_pd->pd.name = np->name; + + ret = pm_genpd_init(&imx_sc_pd->pd, NULL, true); + if (ret < 0) + goto err; + + if (genpd_parent) { + ret = pm_genpd_add_subdomain(genpd_parent, &imx_sc_pd->pd); + if (ret) + goto err; + } + + ret = of_genpd_add_provider_simple(np, &imx_sc_pd->pd); + if (!ret) + return &imx_sc_pd->pd; + + pm_genpd_remove_subdomain(genpd_parent, &imx_sc_pd->pd); + +err: + pr_warn("failed to add PM domain %pOF: %d\n", np, ret); + kfree(imx_sc_pd); + return ERR_PTR(ret); +} + +static void imx_sc_pm_add_pm_domains(struct device_node *parent, + struct generic_pm_domain *genpd_parent) +{ + struct generic_pm_domain *pd; + struct device_node *np; + + for_each_child_of_node(parent, np) { + pd = imx_sc_pm_add_one_domain(np, genpd_parent); + if (!IS_ERR(pd)) + imx_sc_pm_add_pm_domains(np, pd); + } +} + +static int imx_sc_pd_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + int ret; + + ret = imx_scu_get_handle(&pm_ipc_handle); + if (ret) + return ret; + + imx_sc_pm_add_pm_domains(np, NULL); + + return 0; +} + +static const struct of_device_id imx_sc_pd_match[] = { + { .compatible = "fsl,scu-pd", }, + { /* sentinel */ } +}; + +static struct platform_driver imx_sc_pd_driver = { + .driver = { + .name = "imx-scu-pd", + .of_match_table = imx_sc_pd_match, + }, + .probe = imx_sc_pd_probe, +}; +builtin_platform_driver(imx_sc_pd_driver); + +MODULE_AUTHOR("Dong Aisheng "); +MODULE_DESCRIPTION("IMX SCU Power Domain driver"); +MODULE_LICENSE("GPL v2");