From patchwork Tue Jan 21 22:56:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 11344747 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 40CF91398 for ; Tue, 21 Jan 2020 23:42:46 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C367B217F4 for ; Tue, 21 Jan 2020 23:42:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="dmwiOCQ6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C367B217F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:34112 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iu3AS-0003MG-5g for patchwork-qemu-devel@patchwork.kernel.org; Tue, 21 Jan 2020 18:42:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58833) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iu39H-0001dq-8d for qemu-devel@nongnu.org; Tue, 21 Jan 2020 18:41:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iu39F-0004qz-TZ for qemu-devel@nongnu.org; Tue, 21 Jan 2020 18:41:31 -0500 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]:37206) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iu39F-0004oV-LH for qemu-devel@nongnu.org; Tue, 21 Jan 2020 18:41:29 -0500 Received: by mail-pg1-x534.google.com with SMTP id q127so2390863pga.4 for ; Tue, 21 Jan 2020 15:41:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=subject:date:message-id:mime-version:content-transfer-encoding:cc :from:to:in-reply-to:references; bh=zNvv3+MlZ3Fav7KlqKl3zpomZ1Z/uG7eGTPl6IdDto8=; b=dmwiOCQ62e8BvwK1Jq6te9pTXiNhaiy/hl1NCvMsj1lpvgVnaF3b25bVSkY5s+I5ol vV8tDCHxTikDL8aPGAjtHCVExCE7e9xM/E+qP8K5l5FOxVva8lol+ugziqfJ+ljcSE6o iOxHa/4kp+BPqVkjHQ0pnD0/rAl65U7H/klQIZyXCyftdBvD5NT2rj0ggJ9cpB/oWJJa nBxyFGwgLK2K+4kefyGyw8YuceSDnl8ftyl/9wf8kfFJMLC3du1kTN5A0efdcOnq/YWv TZ+29VlDHTL/dTn8Eotxz/Q6RBbJ5nfwPLsxSPx+b3kLXWRphOUl4Wp+4E0+FglQ3hlz 628A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:mime-version :content-transfer-encoding:cc:from:to:in-reply-to:references; bh=zNvv3+MlZ3Fav7KlqKl3zpomZ1Z/uG7eGTPl6IdDto8=; b=GGiRSWREAbkbxsUChMSewlpwiR2KZ+zBRRlRk3WavNZPL/S6oZI0acjVv86K1eoZu5 vLnum8ad7ZNcltnHHAOMcLoMdCUcaQ+wTKitlsrHxKbsKnXa0hYMoAfAGmwFZJhgVuaS dtIgkszgjIAepUXyNd210llT6ZWGAE5f0Nn6vpLFDyfC5U1DW7HZW4qh5+7ArssEF5yU FKS06IOo1Fw9/U7hrgvBpgf8Fu9P0Q8RyyzhBv3to6pf9X4y3hd6XKkp5so7KoxezHne xeIWF5cce8HP+XuXbnw9UVwAwXp7lWxxD+YRu7+BCtfxBqzYyqfIBksgrbiMOOWl/zFh iZbg== X-Gm-Message-State: APjAAAUiM6Hl21FfkyQRxCNC/GZh9C4vDc5ObZXx0QAq+i2NsdPOMRzX TMOLn+kggj87Nn+RtzUhThE3EP/YQAY= X-Google-Smtp-Source: APXvYqz5ouoNx0M14zjlB899VEb0XMfoiZrs6JA2EYVdSk5PriCygAT0uZAWW5BlqefFmmqJaJTOtg== X-Received: by 2002:a62:e509:: with SMTP id n9mr6672365pff.159.1579650084493; Tue, 21 Jan 2020 15:41:24 -0800 (PST) Received: from localhost ([2620:0:1000:2514:7f69:cd98:a2a2:a03d]) by smtp.gmail.com with ESMTPSA id a195sm45123929pfa.120.2020.01.21.15.41.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2020 15:41:24 -0800 (PST) Subject: [PULL 1/5] riscv/sifive_u: fix a memory leak in soc_realize() Date: Tue, 21 Jan 2020 14:56:58 -0800 Message-Id: <20200121225703.148465-2-palmerdabbelt@google.com> X-Mailer: git-send-email 2.25.0.341.g760bfbb309-goog MIME-Version: 1.0 Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, Pan Nengyuan , Euler Robot , ilippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Palmer Dabbelt From: Palmer Dabbelt To: Peter Maydell In-Reply-To: <20200121225703.148465-1-palmerdabbelt@google.com> References: <20200121225703.148465-1-palmerdabbelt@google.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::534 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Pan Nengyuan Fix a minor memory leak in riscv_sifive_u_soc_realize() Reported-by: Euler Robot Signed-off-by: Pan Nengyuan Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_u.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 0140e95732..0e12b3ccef 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -542,6 +542,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) SIFIVE_U_PLIC_CONTEXT_BASE, SIFIVE_U_PLIC_CONTEXT_STRIDE, memmap[SIFIVE_U_PLIC].size); + g_free(plic_hart_config); sifive_uart_create(system_memory, memmap[SIFIVE_U_UART0].base, serial_hd(0), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART0_IRQ)); sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base, From patchwork Tue Jan 21 22:56:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 11344753 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9A5D31398 for ; Tue, 21 Jan 2020 23:42:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6EFAE217F4 for ; Tue, 21 Jan 2020 23:42:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="fhK0Xmzn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6EFAE217F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; 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Tue, 21 Jan 2020 15:41:25 -0800 (PST) Received: from localhost ([2620:0:1000:2514:7f69:cd98:a2a2:a03d]) by smtp.gmail.com with ESMTPSA id b19sm43513137pfo.56.2020.01.21.15.41.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2020 15:41:25 -0800 (PST) Subject: [PULL 2/5] riscv: Set xPIE to 1 after xRET Date: Tue, 21 Jan 2020 14:56:59 -0800 Message-Id: <20200121225703.148465-3-palmerdabbelt@google.com> X-Mailer: git-send-email 2.25.0.341.g760bfbb309-goog MIME-Version: 1.0 Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, Yiting Wang , Bin Meng , Alistair Francis , Palmer Dabbelt From: Palmer Dabbelt To: Peter Maydell In-Reply-To: <20200121225703.148465-1-palmerdabbelt@google.com> References: <20200121225703.148465-1-palmerdabbelt@google.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Yiting Wang When executing an xRET instruction, supposing xPP holds the value y, xIE is set to xPIE; the privilege mode is changed to y; xPIE is set to 1. But QEMU sets xPIE to 0 incorrectly. Signed-off-by: Yiting Wang Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Alistair Francis Signed-off-by: Palmer Dabbelt --- target/riscv/op_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 331cc36232..e87c9115bc 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -93,7 +93,7 @@ target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb) env->priv_ver >= PRIV_VERSION_1_10_0 ? MSTATUS_SIE : MSTATUS_UIE << prev_priv, get_field(mstatus, MSTATUS_SPIE)); - mstatus = set_field(mstatus, MSTATUS_SPIE, 0); + mstatus = set_field(mstatus, MSTATUS_SPIE, 1); mstatus = set_field(mstatus, MSTATUS_SPP, PRV_U); riscv_cpu_set_mode(env, prev_priv); env->mstatus = mstatus; @@ -118,7 +118,7 @@ target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb) env->priv_ver >= PRIV_VERSION_1_10_0 ? MSTATUS_MIE : MSTATUS_UIE << prev_priv, get_field(mstatus, MSTATUS_MPIE)); - mstatus = set_field(mstatus, MSTATUS_MPIE, 0); + mstatus = set_field(mstatus, MSTATUS_MPIE, 1); mstatus = set_field(mstatus, MSTATUS_MPP, PRV_U); riscv_cpu_set_mode(env, prev_priv); env->mstatus = mstatus; From patchwork Tue Jan 21 22:57:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 11344777 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DB8056C1 for ; Tue, 21 Jan 2020 23:44:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B1FEC24656 for ; Tue, 21 Jan 2020 23:44:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="KBhPjM/L" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B1FEC24656 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:34142 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iu3Ca-0006Zi-EX for patchwork-qemu-devel@patchwork.kernel.org; Tue, 21 Jan 2020 18:44:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58886) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iu39J-0001f3-3e for qemu-devel@nongnu.org; Tue, 21 Jan 2020 18:41:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iu39H-0004rt-7L for qemu-devel@nongnu.org; Tue, 21 Jan 2020 18:41:32 -0500 Received: from mail-pj1-x1042.google.com ([2607:f8b0:4864:20::1042]:38334) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iu39F-0004pi-Mh for qemu-devel@nongnu.org; Tue, 21 Jan 2020 18:41:30 -0500 Received: by mail-pj1-x1042.google.com with SMTP id l35so2418776pje.3 for ; Tue, 21 Jan 2020 15:41:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=subject:date:message-id:mime-version:content-transfer-encoding:cc :from:to:in-reply-to:references; bh=UcbAsElOHsZ2fudjqh0fovhZKSCABUkGsAOTf1+yuLM=; b=KBhPjM/L6CReskcfc+Pldb+g2v31FCSgZk060EoYc+7tS+zUUn5qWSfO+Olrelu3/l 321yNSPWRi4jm2/GNd1/rfLLPJszDIhgejtk4k3M2di9us9/9OiRUo/8DLVpwc2OS2+n Mk3bZIVSWli0x1gVPxFyVMfXhnQk5l4Fk0cddgjsWcZxLG/K+DYz1kiS/V4HTJG6QACJ ceWBwkD8upOMqlEQZJz1SeSBPRQ37pMnOMOQH1CFeOCWtOUN78Wnov0yXX2Wit5x6DPi USRFOQBeqIr5i+/hf+JxfZzFp5xwvqk+so2ZKiR714/eo/KR+Cwh4JzdLc5L0lO33GKG lppA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:mime-version :content-transfer-encoding:cc:from:to:in-reply-to:references; bh=UcbAsElOHsZ2fudjqh0fovhZKSCABUkGsAOTf1+yuLM=; b=Z892+cx6kiun6d7us1nry29fKN94/i3ybv8yNtrTlLotWP3w9m01Q+wWPxRwtgeceK xJgMZ1+yuh45hhhrATOnAi5zTomuBCwWaFq6jAKi/E7DZovzjVRBb9FDLq89uyl56lMQ fFL2qcKhaLX/LgN2C6B9FjSwpIc4uyiJOkWdIhAdzq068YOjOP/YVC8KArM8BA1ZvKCQ zQM7tEvhc5SzDDtDhu9ROove85X7DrkHuKaduFZa1wCJIGL+CXJVFN2HkjrDVYB6qVfM XMPgIXwYY2KcwXQe7GcQP8YtPTcDhFFf3EGUHFP3vlSpY0MtMOXCySa+ZVe+7NlRrVen L0mg== X-Gm-Message-State: APjAAAWsQTpNEqDh5YhNJ0hUk416i46bxzqw+hcMlL3vFaPqLp0jmO9Z kF6IpZlzMtn8ezSSB29BHHGhSP3igqY= X-Google-Smtp-Source: APXvYqwOUrQFTqzU94rWmMk7cbz6wahj/b9tmTxm5sncjQk1WPLfB7H4Xh//vRUC/9cUFF420oq7CQ== X-Received: by 2002:a17:902:34a:: with SMTP id 68mr7665022pld.250.1579650086876; Tue, 21 Jan 2020 15:41:26 -0800 (PST) Received: from localhost ([2620:0:1000:2514:7f69:cd98:a2a2:a03d]) by smtp.gmail.com with ESMTPSA id x21sm44075185pfn.164.2020.01.21.15.41.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2020 15:41:26 -0800 (PST) Subject: [PULL 3/5] target/riscv: Fix tb->flags FS status Date: Tue, 21 Jan 2020 14:57:00 -0800 Message-Id: <20200121225703.148465-4-palmerdabbelt@google.com> X-Mailer: git-send-email 2.25.0.341.g760bfbb309-goog MIME-Version: 1.0 Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, ShihPo Hung , Richard Henderson , Palmer Dabbelt From: Palmer Dabbelt To: Peter Maydell In-Reply-To: <20200121225703.148465-1-palmerdabbelt@google.com> References: <20200121225703.148465-1-palmerdabbelt@google.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1042 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: ShihPo Hung It was found that running libquantum on riscv-linux qemu produced an incorrect result. After investigation, FP registers are not saved during context switch due to incorrect mstatus.FS. In current implementation tb->flags merges all non-disabled state to dirty. This means the code in mark_fs_dirty in translate.c that handles initial and clean states is unreachable. This patch fixes it and is successfully tested with: libquantum Thanks to Richard for pointing out the actual bug. v3: remove the redundant condition v2: root cause FS problem Suggested-by: Richard Henderson Signed-off-by: ShihPo Hung Reviewed-by: Richard Henderson Signed-off-by: Palmer Dabbelt --- target/riscv/cpu.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index e59343e13c..de0a8d893a 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -293,10 +293,7 @@ static inline void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, #ifdef CONFIG_USER_ONLY *flags = TB_FLAGS_MSTATUS_FS; #else - *flags = cpu_mmu_index(env, 0); - if (riscv_cpu_fp_enabled(env)) { - *flags |= TB_FLAGS_MSTATUS_FS; - } + *flags = cpu_mmu_index(env, 0) | (env->mstatus & MSTATUS_FS); #endif } From patchwork Tue Jan 21 22:57:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 11344775 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9EC6D6C1 for ; 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Tue, 21 Jan 2020 15:41:27 -0800 (PST) Subject: [PULL 4/5] target/riscv: fsd/fsw doesn't dirty FP state Date: Tue, 21 Jan 2020 14:57:01 -0800 Message-Id: <20200121225703.148465-5-palmerdabbelt@google.com> X-Mailer: git-send-email 2.25.0.341.g760bfbb309-goog MIME-Version: 1.0 Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, ShihPo Hung , Richard Henderson , Alistair Francis , Palmer Dabbelt From: Palmer Dabbelt To: Peter Maydell In-Reply-To: <20200121225703.148465-1-palmerdabbelt@google.com> References: <20200121225703.148465-1-palmerdabbelt@google.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::62a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: ShihPo Hung Signed-off-by: ShihPo Hung Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Palmer Dabbelt --- target/riscv/insn_trans/trans_rvd.inc.c | 1 - target/riscv/insn_trans/trans_rvf.inc.c | 1 - 2 files changed, 2 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvd.inc.c b/target/riscv/insn_trans/trans_rvd.inc.c index 393fa0248c..ea1044f13b 100644 --- a/target/riscv/insn_trans/trans_rvd.inc.c +++ b/target/riscv/insn_trans/trans_rvd.inc.c @@ -43,7 +43,6 @@ static bool trans_fsd(DisasContext *ctx, arg_fsd *a) tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEQ); - mark_fs_dirty(ctx); tcg_temp_free(t0); return true; } diff --git a/target/riscv/insn_trans/trans_rvf.inc.c b/target/riscv/insn_trans/trans_rvf.inc.c index 172dbfa919..e23cd639a6 100644 --- a/target/riscv/insn_trans/trans_rvf.inc.c +++ b/target/riscv/insn_trans/trans_rvf.inc.c @@ -52,7 +52,6 @@ static bool trans_fsw(DisasContext *ctx, arg_fsw *a) tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEUL); tcg_temp_free(t0); - mark_fs_dirty(ctx); return true; } From patchwork Tue Jan 21 22:57:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 11344751 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C07F86C1 for ; Tue, 21 Jan 2020 23:42:50 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 978E0217F4 for ; Tue, 21 Jan 2020 23:42:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="IEYMdxA3" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 978E0217F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; 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Tue, 21 Jan 2020 15:41:29 -0800 (PST) Received: from localhost ([2620:0:1000:2514:7f69:cd98:a2a2:a03d]) by smtp.gmail.com with ESMTPSA id d4sm533552pjz.12.2020.01.21.15.41.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2020 15:41:28 -0800 (PST) Subject: [PULL 5/5] target/riscv: update mstatus.SD when FS is set dirty Date: Tue, 21 Jan 2020 14:57:02 -0800 Message-Id: <20200121225703.148465-6-palmerdabbelt@google.com> X-Mailer: git-send-email 2.25.0.341.g760bfbb309-goog MIME-Version: 1.0 Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, ShihPo Hung , Richard Henderson , Alistair Francis , Palmer Dabbelt From: Palmer Dabbelt To: Peter Maydell In-Reply-To: <20200121225703.148465-1-palmerdabbelt@google.com> References: <20200121225703.148465-1-palmerdabbelt@google.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1032 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: ShihPo Hung remove the check becuase SD bit should summarize FS and XS fields unconditionally. Signed-off-by: ShihPo Hung Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Palmer Dabbelt --- target/riscv/csr.c | 3 +-- target/riscv/translate.c | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index da02f9f0b1..0e34c292c5 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -341,8 +341,7 @@ static int write_mstatus(CPURISCVState *env, int csrno, target_ulong val) mstatus = (mstatus & ~mask) | (val & mask); - dirty = (riscv_cpu_fp_enabled(env) && - ((mstatus & MSTATUS_FS) == MSTATUS_FS)) | + dirty = ((mstatus & MSTATUS_FS) == MSTATUS_FS) | ((mstatus & MSTATUS_XS) == MSTATUS_XS); mstatus = set_field(mstatus, MSTATUS_SD, dirty); env->mstatus = mstatus; diff --git a/target/riscv/translate.c b/target/riscv/translate.c index ab6a891dc3..8e40ed3ac4 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -394,7 +394,7 @@ static void mark_fs_dirty(DisasContext *ctx) tmp = tcg_temp_new(); tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus)); - tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS); + tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | MSTATUS_SD); tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus)); tcg_temp_free(tmp); }