From patchwork Tue Feb 4 03:28:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 11363959 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CB18917E0 for ; Tue, 4 Feb 2020 03:29:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A5AE22086A for ; Tue, 4 Feb 2020 03:29:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="DYgC15CL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727084AbgBDD2y (ORCPT ); Mon, 3 Feb 2020 22:28:54 -0500 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:54309 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726924AbgBDD2y (ORCPT ); Mon, 3 Feb 2020 22:28:54 -0500 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 35245886BF; Tue, 4 Feb 2020 16:28:47 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1580786927; bh=S12NbNvzyitASYeuyiRTGlWzIthLnwLfrSqRKnQYHxY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=DYgC15CL/HBZUXollf40qLbO9WZA+CaaBboFwwZw2DCS0r3VDSzOtOH6lFCrc1Wxg cT8OBwCtXNrA/kRm7x48sZe8HOblOKv7lUh+AzjOyxujEY9Li/u6hXcWut5rpFQOVR lo1Adbc4VRF/t4/yHDz6gC1B033g4O6nw5Q9LbGSAw79OdfEeFJDkGZ00xPgAHhmJo JPG9u86Eb83Hfyyt9LgfevNmfBTzkLo6P2nR0gTrp6YHvUZyypyNeGbOZlg1eIY73F k4/YOXnmX8sc6QuNagQFoi/KPLYQoA/vIvGh4JbHjg9ngOYb4eGxyZj5xu9sV0a9fF Z1jyvF0UuncBw== Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Tue, 04 Feb 2020 16:28:46 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.20]) by smtp (Postfix) with ESMTP id 880DE13EEFA; Tue, 4 Feb 2020 16:28:41 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id B4513280071; Tue, 4 Feb 2020 16:28:41 +1300 (NZDT) From: Chris Packham To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, Andy Shevchenko Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v5 1/2] dt-bindings: spi: Document binding for generic SPI multiplexer Date: Tue, 4 Feb 2020 16:28:37 +1300 Message-Id: <20200204032838.20739-2-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200204032838.20739-1-chris.packham@alliedtelesis.co.nz> References: <20200204032838.20739-1-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 x-atlnz-ls: pat Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add binding documentation for the spi-mux driver. This allows a generic multiplexer to be used to provide access to multiple SPI devices. Signed-off-by: Chris Packham Reviewed-by: Rob Herring --- Notes: Changes in v5: - Add reviewed-by from Rob Changes in v3: - make dt_binding_check clean (properly this time) Changes in v2: - update license - make dt_binding_check clean .../devicetree/bindings/spi/spi-mux.yaml | 89 +++++++++++++++++++ 1 file changed, 89 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-mux.yaml diff --git a/Documentation/devicetree/bindings/spi/spi-mux.yaml b/Documentation/devicetree/bindings/spi/spi-mux.yaml new file mode 100644 index 000000000000..0ae692dc28b5 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-mux.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/spi-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic SPI Multiplexer + +description: | + This binding describes a SPI bus multiplexer to route the SPI chip select + signals. This can be used when you need more devices than the SPI controller + has chip selects available. An example setup is shown in ASCII art; the actual + setting of the multiplexer to a channel needs to be done by a specific SPI mux + driver. + + MOSI /--------------------------------+--------+--------+--------\ + MISO |/------------------------------+|-------+|-------+|-------\| + SCL ||/----------------------------+||------+||------+||------\|| + ||| ||| ||| ||| ||| + +------------+ ||| ||| ||| ||| + | SoC ||| | +-+++-+ +-+++-+ +-+++-+ +-+++-+ + | ||| | | dev | | dev | | dev | | dev | + | +--+++-+ | CS-X +------+\ +--+--+ +--+--+ +--+--+ +--+--+ + | | SPI +-|-------+ Mux |\\ CS-0 | | | | + | +------+ | +--+---+\\\-------/ CS-1 | | | + | | | \\\----------------/ CS-2 | | + | +------+ | | \\-------------------------/ CS-3 | + | | ? +-|----------/ \----------------------------------/ + | +------+ | + +------------+ + +allOf: + - $ref: "/schemas/spi/spi-controller.yaml#" + +maintainers: + - Chris Packham + +properties: + compatible: + const: spi-mux + + mux-controls: + maxItems: 1 + +required: + - compatible + - reg + - spi-max-frequency + - mux-controls + +examples: + - | + #include + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + + mux-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + spi@0 { + compatible = "spi-mux"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <100000000>; + + mux-controls = <&mux>; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <40000000>; + }; + + spi-device@1 { + compatible = "lineartechnology,ltc2488"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <10000000>; + }; + }; + }; From patchwork Tue Feb 4 03:28:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 11363955 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7273A112B for ; Tue, 4 Feb 2020 03:28:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 36BAD2087E for ; Tue, 4 Feb 2020 03:28:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="PuL9xw2z" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727097AbgBDD2v (ORCPT ); Mon, 3 Feb 2020 22:28:51 -0500 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:54313 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727080AbgBDD2v (ORCPT ); Mon, 3 Feb 2020 22:28:51 -0500 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 377D8891A9; Tue, 4 Feb 2020 16:28:47 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1580786927; bh=YcBNPW1MC7iU/ikJzciIJ6vcp9EMI6jO/wnHYot75EM=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=PuL9xw2z7OKeWfJYyECz6XjwF4+y+y3TEblZEqR7T9PkqeblWe4ILs0wIqyDw+3q9 /7uSS8pm/b5MwTdQOE0zA8XIOcXoJ94o28/Weif0Sf/0WYfHn2iRskfvdagLqweB5Q 3lgEJDQFMTyUf9P3IBoPJZH0SbfaXsvIR+P5fZoCw6k3612EZiJf1mjnDJDWSlxQfG omiUJttly/a127+0sqW1rj5URqvepZAhnOk2ABYCuJDr6SeuMeQY4r5scg5IPkTW9C Hw96Am0X0zuCmtzQVMGMDOlPUhwZ3cKA5y2GQmaevT2a7XDAZO6gMe5467P7tC2HM/ 1qYAntMkyTX/w== Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Tue, 04 Feb 2020 16:28:47 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.20]) by smtp (Postfix) with ESMTP id C3BF813EF9D; Tue, 4 Feb 2020 16:28:41 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id EFF7A280071; Tue, 4 Feb 2020 16:28:41 +1300 (NZDT) From: Chris Packham To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, Andy Shevchenko Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v5 2/2] spi: Add generic SPI multiplexer Date: Tue, 4 Feb 2020 16:28:38 +1300 Message-Id: <20200204032838.20739-3-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200204032838.20739-1-chris.packham@alliedtelesis.co.nz> References: <20200204032838.20739-1-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 x-atlnz-ls: pat Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add a SPI device driver that sits in-band and provides a SPI controller which supports chip selects via a mux-control. This enables extra SPI devices to be connected with limited native chip selects. Signed-off-by: Chris Packham Reviewed-by: Andy Shevchenko --- Notes: Changes in v5: - Drop redudnant lines, use IS_ERR() instead of PTR_ERR_OR_ZERO Changes in v4: - incorporate review feedback from Andy drivers/spi/Kconfig | 11 +++ drivers/spi/Makefile | 1 + drivers/spi/spi-mux.c | 187 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 199 insertions(+) create mode 100644 drivers/spi/spi-mux.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 870f7797b56b..a4509000a291 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -881,6 +881,17 @@ config SPI_ZYNQMP_GQSPI # Add new SPI master controllers in alphabetical order above this line # +comment "SPI Multiplexer support" + +config SPI_MUX + tristate "SPI multiplexer support" + select MULTIPLEXER + help + This adds support for SPI multiplexers. Each SPI mux will be + accessible as a SPI controller, the devices behind the mux will appear + to be chip selects on this controller. It is still necessary to + select one or more specific mux-controller drivers. + # # There are lots of SPI device types, with sensors and memory # being probably the most widely used ones. diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index bb49c9e6d0a0..116409533727 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -9,6 +9,7 @@ ccflags-$(CONFIG_SPI_DEBUG) := -DDEBUG # config declarations into driver model code obj-$(CONFIG_SPI_MASTER) += spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o +obj-$(CONFIG_SPI_MUX) += spi-mux.o obj-$(CONFIG_SPI_SPIDEV) += spidev.o obj-$(CONFIG_SPI_LOOPBACK_TEST) += spi-loopback-test.o diff --git a/drivers/spi/spi-mux.c b/drivers/spi/spi-mux.c new file mode 100644 index 000000000000..4f94c9127fc1 --- /dev/null +++ b/drivers/spi/spi-mux.c @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// General Purpose SPI multiplexer + +#include +#include +#include +#include +#include +#include + +#define SPI_MUX_NO_CS ((unsigned int)-1) + +/** + * DOC: Driver description + * + * This driver supports a MUX on an SPI bus. This can be useful when you need + * more chip selects than the hardware peripherals support, or than are + * available in a particular board setup. + * + * The driver will create an additional SPI controller. Devices added under the + * mux will be handled as 'chip selects' on this controller. + */ + +/** + * struct spi_mux_priv - the basic spi_mux structure + * @spi: pointer to the device struct attached to the parent + * spi controller + * @current_cs: The current chip select set in the mux + * @child_msg_complete: The mux replaces the complete callback in the child's + * message to its own callback; this field is used by the + * driver to store the child's callback during a transfer + * @child_msg_context: Used to store the child's context to the callback + * @child_msg_dev: Used to store the spi_device pointer to the child + * @mux: mux_control structure used to provide chip selects for + * downstream spi devices + */ +struct spi_mux_priv { + struct spi_device *spi; + unsigned int current_cs; + + void (*child_msg_complete)(void *context); + void *child_msg_context; + struct spi_device *child_msg_dev; + struct mux_control *mux; +}; + +/* should not get called when the parent controller is doing a transfer */ +static int spi_mux_select(struct spi_device *spi) +{ + struct spi_mux_priv *priv = spi_controller_get_devdata(spi->controller); + int ret; + + if (priv->current_cs == spi->chip_select) + return 0; + + dev_dbg(&priv->spi->dev, "setting up the mux for cs %d\n", + spi->chip_select); + + /* copy the child device's settings except for the cs */ + priv->spi->max_speed_hz = spi->max_speed_hz; + priv->spi->mode = spi->mode; + priv->spi->bits_per_word = spi->bits_per_word; + + ret = mux_control_select(priv->mux, spi->chip_select); + if (ret) + return ret; + + priv->current_cs = spi->chip_select; + + return 0; +} + +static int spi_mux_setup(struct spi_device *spi) +{ + struct spi_mux_priv *priv = spi_controller_get_devdata(spi->controller); + + /* + * can be called multiple times, won't do a valid setup now but we will + * change the settings when we do a transfer (necessary because we + * can't predict from which device it will be anyway) + */ + return spi_setup(priv->spi); +} + +static void spi_mux_complete_cb(void *context) +{ + struct spi_mux_priv *priv = (struct spi_mux_priv *)context; + struct spi_controller *ctlr = spi_get_drvdata(priv->spi); + struct spi_message *m = ctlr->cur_msg; + + m->complete = priv->child_msg_complete; + m->context = priv->child_msg_context; + m->spi = priv->child_msg_dev; + spi_finalize_current_message(ctlr); + mux_control_deselect(priv->mux); +} + +static int spi_mux_transfer_one_message(struct spi_controller *ctlr, + struct spi_message *m) +{ + struct spi_mux_priv *priv = spi_controller_get_devdata(ctlr); + struct spi_device *spi = m->spi; + int ret; + + ret = spi_mux_select(spi); + if (ret) + return ret; + + /* + * Replace the complete callback, context and spi_device with our own + * pointers. Save originals + */ + priv->child_msg_complete = m->complete; + priv->child_msg_context = m->context; + priv->child_msg_dev = m->spi; + + m->complete = spi_mux_complete_cb; + m->context = priv; + m->spi = priv->spi; + + /* do the transfer */ + return spi_async(priv->spi, m); +} + +static int spi_mux_probe(struct spi_device *spi) +{ + struct spi_controller *ctlr; + struct spi_mux_priv *priv; + int ret; + + ctlr = spi_alloc_master(&spi->dev, sizeof(*priv)); + if (!ctlr) + return -ENOMEM; + + spi_set_drvdata(spi, ctlr); + priv = spi_controller_get_devdata(ctlr); + priv->spi = spi; + + priv->mux = devm_mux_control_get(&spi->dev, NULL); + if (IS_ERR(priv->mux)) { + ret = PTR_ERR(priv->mux); + if (ret != -EPROBE_DEFER) + dev_err(&spi->dev, "failed to get control-mux\n"); + goto err_put_ctlr; + } + + priv->current_cs = SPI_MUX_NO_CS; + + /* supported modes are the same as our parent's */ + ctlr->mode_bits = spi->controller->mode_bits; + ctlr->flags = spi->controller->flags; + ctlr->transfer_one_message = spi_mux_transfer_one_message; + ctlr->setup = spi_mux_setup; + ctlr->num_chipselect = mux_control_states(priv->mux); + ctlr->bus_num = -1; + ctlr->dev.of_node = spi->dev.of_node; + + ret = devm_spi_register_controller(&spi->dev, ctlr); + if (ret) + goto err_put_ctlr; + + return 0; + +err_put_ctlr: + spi_controller_put(ctlr); + + return ret; +} + +static const struct of_device_id spi_mux_of_match[] = { + { .compatible = "spi-mux" }, + { } +}; + +static struct spi_driver spi_mux_driver = { + .probe = spi_mux_probe, + .driver = { + .name = "spi-mux", + .of_match_table = spi_mux_of_match, + }, +}; + +module_spi_driver(spi_mux_driver); + +MODULE_DESCRIPTION("SPI multiplexer"); +MODULE_LICENSE("GPL");