From patchwork Tue Feb 4 10:10:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 11364367 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8D41214E3 for ; Tue, 4 Feb 2020 10:11:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6BFD821D7D for ; Tue, 4 Feb 2020 10:11:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="Lsm6BuNW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726675AbgBDKLD (ORCPT ); Tue, 4 Feb 2020 05:11:03 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:6500 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726553AbgBDKLB (ORCPT ); Tue, 4 Feb 2020 05:11:01 -0500 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 014A5eas027812; Tue, 4 Feb 2020 11:10:37 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=LKI8G68MpBnrq3cMYnWhas9QoAyLUbV2xIYeGqpMMjQ=; b=Lsm6BuNWh6WT4pYMHdTJHrK2sHcXbMG9yVG/sZYxSqwQ8H7yXDXCFTKf4P8FXb1+6rci mVnmzXFeVrXOEvet4ooBwWqnzwpF8y4/Dx5BPXkeae11AEE03D8sTFDPeroaOi2pVhwy FR0vzizXk3sFMjJRErsNaiu/G19geAFyyrhoSp3CXblzJmzzqDuFiGLGmZYmYZKTFLDo VeUnYKo0K92T8bQ2aulVndYCzNtBqVyzp3q7O1SJjUiohbQ4XtbFFjlxrSi8fj9QlHmD AIkJKq2IenpXK6P9n1ksYQBPX8gY11f5uNtyUFGjuDnX7IXRFnttaNHvLWjLwQQIbDkZ 4A== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2xw0018516-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 04 Feb 2020 11:10:37 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3A97D100034; Tue, 4 Feb 2020 11:10:31 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag6node2.st.com [10.75.127.17]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1FB952AD9D9; Tue, 4 Feb 2020 11:10:31 +0100 (CET) Received: from localhost (10.75.127.44) by SFHDAG6NODE2.st.com (10.75.127.17) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 4 Feb 2020 11:10:30 +0100 From: Olivier Moysan To: , , CC: , , , , , , , , Subject: [PATCH 1/4] dt-bindings: iio: adc: sd modulator: add vref support Date: Tue, 4 Feb 2020 11:10:05 +0100 Message-ID: <20200204101008.11411-2-olivier.moysan@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200204101008.11411-1-olivier.moysan@st.com> References: <20200204101008.11411-1-olivier.moysan@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG6NODE2.st.com (10.75.127.17) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-04_02:2020-02-04,2020-02-04 signatures=0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Add vref supply support to sigma delta modulator. Signed-off-by: Olivier Moysan Acked-by: Rob Herring --- .../devicetree/bindings/iio/adc/sigma-delta-modulator.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml b/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml index a390343d0c2a..2afe0765e971 100644 --- a/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml +++ b/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml @@ -8,6 +8,7 @@ title: Device-Tree bindings for sigma delta modulator maintainers: - Arnaud Pouliquen + - Olivier Moysan properties: compatible: @@ -21,6 +22,9 @@ properties: '#io-channel-cells': const: 0 + vref-supply: + description: Phandle to the vref input analog reference voltage. + required: - compatible - '#io-channel-cells' From patchwork Tue Feb 4 10:10:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 11364365 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 01499112B for ; Tue, 4 Feb 2020 10:11:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CA57821927 for ; Tue, 4 Feb 2020 10:11:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="gNNg9TgI" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726965AbgBDKLD (ORCPT ); Tue, 4 Feb 2020 05:11:03 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:3742 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726406AbgBDKLC (ORCPT ); Tue, 4 Feb 2020 05:11:02 -0500 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 014A7pCl011088; Tue, 4 Feb 2020 11:10:37 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=ZLFMFNe2ixUJM51GFxjwpcgrGZTCYwGU8LdeMcBXz/0=; b=gNNg9TgIkx4I+fxGBiNp2KOcwrBBRQXGCMimIU4ld2CvpPrwXb3INFZTT/ymXLBWSIca htMUuVkXGH5A4VK6Sg4tXCiKy8ElVcK9VAsbnktSmECv2biWIE1B9g/S0BKllJ23tRIB C2eYcli2lBXF5JZ3cNce8ak1dHbD4fF0H3c8x2aqs1XHyTGSKu6W3XjLdyv07j7OE2oA XRucC2rd1wDqQpjH1mFaSoj69kIC3ThCuFb2aEz2WQwPfxle0wPFgctqcKSrWc7k2hnu cioTS/vxDNhEZVNHU3UJTq4I4HMI+cHxygeXql0osoaVvu3kD7ifpsIo/1ErX94CqXND yw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2xvybe0hhh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 04 Feb 2020 11:10:37 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 00E1A100039; Tue, 4 Feb 2020 11:10:32 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag6node2.st.com [10.75.127.17]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DABD92AD9DB; Tue, 4 Feb 2020 11:10:31 +0100 (CET) Received: from localhost (10.75.127.47) by SFHDAG6NODE2.st.com (10.75.127.17) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 4 Feb 2020 11:10:31 +0100 From: Olivier Moysan To: , , CC: , , , , , , , , Subject: [PATCH 2/4] iio: adc: sd modulator: add scale support Date: Tue, 4 Feb 2020 11:10:06 +0100 Message-ID: <20200204101008.11411-3-olivier.moysan@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200204101008.11411-1-olivier.moysan@st.com> References: <20200204101008.11411-1-olivier.moysan@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG7NODE3.st.com (10.75.127.21) To SFHDAG6NODE2.st.com (10.75.127.17) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-04_02:2020-02-04,2020-02-04 signatures=0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Add scale support to sigma delta modulator. Signed-off-by: Olivier Moysan --- drivers/iio/adc/sd_adc_modulator.c | 108 ++++++++++++++++++++++++++--- 1 file changed, 100 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/sd_adc_modulator.c b/drivers/iio/adc/sd_adc_modulator.c index 560d8c7d9d86..a83f35832050 100644 --- a/drivers/iio/adc/sd_adc_modulator.c +++ b/drivers/iio/adc/sd_adc_modulator.c @@ -10,8 +10,7 @@ #include #include #include - -static const struct iio_info iio_sd_mod_iio_info; +#include static const struct iio_chan_spec iio_sd_mod_ch = { .type = IIO_VOLTAGE, @@ -21,34 +20,126 @@ static const struct iio_chan_spec iio_sd_mod_ch = { .realbits = 1, .shift = 0, }, + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), +}; + +static const struct iio_chan_spec iio_sd_mod_ch_ads = { + .type = IIO_VOLTAGE, + .indexed = 1, + .scan_type = { + .sign = 'u', + .realbits = 1, + .shift = 0, + }, + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), + .differential = 1, +}; + +struct iio_sd_mod_priv { + struct regulator *vref; + int vref_mv; +}; + +static int iio_sd_mod_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long mask) +{ + struct iio_sd_mod_priv *priv = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_SCALE: + *val = priv->vref_mv; + *val2 = chan->scan_type.realbits; + return IIO_VAL_INT; + } + + return -EINVAL; +} + +static const struct iio_info iio_sd_mod_iio_info = { + .read_raw = iio_sd_mod_read_raw, }; static int iio_sd_mod_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; + struct iio_sd_mod_priv *priv; struct iio_dev *iio; + int ret; - iio = devm_iio_device_alloc(dev, 0); + iio = devm_iio_device_alloc(dev, sizeof(*priv)); if (!iio) return -ENOMEM; + iio->channels = (const struct iio_chan_spec *) + of_device_get_match_data(&pdev->dev); + + priv = iio_priv(iio); + iio->dev.parent = dev; iio->dev.of_node = dev->of_node; iio->name = dev_name(dev); iio->info = &iio_sd_mod_iio_info; iio->modes = INDIO_BUFFER_HARDWARE; - iio->num_channels = 1; - iio->channels = &iio_sd_mod_ch; platform_set_drvdata(pdev, iio); - return devm_iio_device_register(&pdev->dev, iio); + priv->vref = devm_regulator_get_optional(dev, "vref"); + if (IS_ERR(priv->vref)) { + ret = PTR_ERR(priv->vref); + if (ret != -ENODEV) { + if (ret != -EPROBE_DEFER) + dev_err(dev, "vref get failed, %d\n", ret); + return ret; + } + } + + if (!IS_ERR(priv->vref)) { + ret = regulator_enable(priv->vref); + if (ret < 0) { + dev_err(dev, "vref enable failed %d\n", ret); + return ret; + } + + ret = regulator_get_voltage(priv->vref); + if (ret < 0) { + dev_err(dev, "vref get failed, %d\n", ret); + goto err_regulator_disable; + } + + priv->vref_mv = ret / 1000; + dev_dbg(dev, "vref+=%dmV\n", priv->vref_mv); + } + + ret = devm_iio_device_register(&pdev->dev, iio); + if (ret < 0) { + dev_err(dev, "Failed to register sd-modulator, %d\n", ret); + goto err_regulator_disable; + } + + return 0; + +err_regulator_disable: + regulator_disable(priv->vref); + + return ret; +} + +static int iio_sd_mod_remove(struct platform_device *pdev) +{ + struct iio_dev *indio_dev = platform_get_drvdata(pdev); + struct iio_sd_mod_priv *priv = iio_priv(indio_dev); + + if (priv->vref) + return regulator_disable(priv->vref); + + return 0; } static const struct of_device_id sd_adc_of_match[] = { - { .compatible = "sd-modulator" }, - { .compatible = "ads1201" }, + { .compatible = "sd-modulator", .data = &iio_sd_mod_ch }, + { .compatible = "ads1201", .data = &iio_sd_mod_ch_ads }, { } }; MODULE_DEVICE_TABLE(of, sd_adc_of_match); @@ -59,6 +150,7 @@ static struct platform_driver iio_sd_mod_adc = { .of_match_table = of_match_ptr(sd_adc_of_match), }, .probe = iio_sd_mod_probe, + .remove = iio_sd_mod_remove, }; module_platform_driver(iio_sd_mod_adc); From patchwork Tue Feb 4 10:10:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 11364361 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0BAD914B4 for ; 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Tue, 4 Feb 2020 11:10:32 +0100 From: Olivier Moysan To: , , CC: , , , , , , , , Subject: [PATCH 3/4] iio: adc: stm32-dfsdm: use resolution define Date: Tue, 4 Feb 2020 11:10:07 +0100 Message-ID: <20200204101008.11411-4-olivier.moysan@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200204101008.11411-1-olivier.moysan@st.com> References: <20200204101008.11411-1-olivier.moysan@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG3NODE3.st.com (10.75.127.9) To SFHDAG6NODE2.st.com (10.75.127.17) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-04_02:2020-02-04,2020-02-04 signatures=0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Use resolution define instead of hard coded value. Signed-off-by: Olivier Moysan --- drivers/iio/adc/stm32-dfsdm-adc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c index 2aad2cda6943..07b9dfdf8e76 100644 --- a/drivers/iio/adc/stm32-dfsdm-adc.c +++ b/drivers/iio/adc/stm32-dfsdm-adc.c @@ -1440,7 +1440,7 @@ static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev, ch->scan_type.shift = 8; } ch->scan_type.sign = 's'; - ch->scan_type.realbits = 24; + ch->scan_type.realbits = DFSDM_DATA_RES; ch->scan_type.storagebits = 32; return stm32_dfsdm_chan_configure(adc->dfsdm, From patchwork Tue Feb 4 10:10:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 11364369 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7429314E3 for ; Tue, 4 Feb 2020 10:11:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 48B1021927 for ; Tue, 4 Feb 2020 10:11:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="UNfs1fTp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727154AbgBDKLO (ORCPT ); Tue, 4 Feb 2020 05:11:14 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:13482 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726688AbgBDKLD (ORCPT ); Tue, 4 Feb 2020 05:11:03 -0500 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 014A7pji011091; Tue, 4 Feb 2020 11:10:37 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=bhdUjCl28U8mxH7dOdR1VAauDSxTC8bwI7sY3gTd9YU=; b=UNfs1fTp+4E4c4FmHuRM99P110CzEtE7UckSzL3ukGDivoVQ6GE1nL0nDRrcsQE0UYXZ 59RmKsj4LK18HMkZ5GoOHBip9A7TN4tvedcV1YgQyNkJF/Zqlkv0DOsTwv68It8yEjOC 9aAjl6vtWyJSWxxxc9KI+ZvPvexMr9tfpuMt9eLRUS+FfRvNFTaVQb1MfeCOxDhp8voI Ho+AA0SYipuLsTnvwgGsnQ2LesX0weR4qQ+DAdG1AuUFeGQF3YJxyzwSeJ8On5yCaJ7p llG0Y/+lZNSEOBXNEWtYRJVWHDgczg1o3VUcnRIGJuGLPe8bKkg4gjF1CNxoAjH2Iixc dw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2xvybe0hhm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 04 Feb 2020 11:10:37 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5908310003B; Tue, 4 Feb 2020 11:10:33 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag6node2.st.com [10.75.127.17]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 49AFC2AD9D9; Tue, 4 Feb 2020 11:10:33 +0100 (CET) Received: from localhost (10.75.127.46) by SFHDAG6NODE2.st.com (10.75.127.17) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 4 Feb 2020 11:10:32 +0100 From: Olivier Moysan To: , , CC: , , , , , , , , Subject: [PATCH 4/4] iio: adc: stm32-dfsdm: add scale and offset support Date: Tue, 4 Feb 2020 11:10:08 +0100 Message-ID: <20200204101008.11411-5-olivier.moysan@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200204101008.11411-1-olivier.moysan@st.com> References: <20200204101008.11411-1-olivier.moysan@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG3NODE3.st.com (10.75.127.9) To SFHDAG6NODE2.st.com (10.75.127.17) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-04_02:2020-02-04,2020-02-04 signatures=0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Add scale and offset attributes support to STM32 DFSDM. Signed-off-by: Olivier Moysan --- drivers/iio/adc/stm32-dfsdm-adc.c | 105 +++++++++++++++++++++++++++++- 1 file changed, 102 insertions(+), 3 deletions(-) diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c index 07b9dfdf8e76..b85fd3e90496 100644 --- a/drivers/iio/adc/stm32-dfsdm-adc.c +++ b/drivers/iio/adc/stm32-dfsdm-adc.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -67,6 +68,13 @@ struct stm32_dfsdm_dev_data { const struct regmap_config *regmap_cfg; }; +struct stm32_dfsdm_sd_chan_info { + int scale_val; + int scale_val2; + int offset; + unsigned int differential; +}; + struct stm32_dfsdm_adc { struct stm32_dfsdm *dfsdm; const struct stm32_dfsdm_dev_data *dev_data; @@ -79,6 +87,7 @@ struct stm32_dfsdm_adc { struct iio_hw_consumer *hwc; struct completion completion; u32 *buffer; + struct stm32_dfsdm_sd_chan_info *sd_chan; /* Audio specific */ unsigned int spi_freq; /* SPI bus clock frequency */ @@ -1271,7 +1280,10 @@ static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev, int *val2, long mask) { struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); - int ret; + struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id]; + struct stm32_dfsdm_filter_osr *flo = &fl->flo[fl->fast]; + u32 max = flo->max << (flo->lshift - chan->scan_type.shift); + int ret, idx = chan->scan_index; switch (mask) { case IIO_CHAN_INFO_RAW: @@ -1307,6 +1319,41 @@ static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev, *val = adc->sample_freq; return IIO_VAL_INT; + + case IIO_CHAN_INFO_SCALE: + /* + * Scale is expressed in mV. + * When fast mode is disabled, actual resolution may be lower + * than 2^n, where n=realbits-1. + * This leads to underestimating input voltage. To + * compensate this deviation, the voltage reference can be + * corrected with a factor = realbits resolution / actual max + */ + *val = div_u64((u64)adc->sd_chan[idx].scale_val * + (u64)BIT(DFSDM_DATA_RES - 1), max); + *val2 = chan->scan_type.realbits; + if (adc->sd_chan[idx].differential) + *val *= 2; + + return IIO_VAL_FRACTIONAL_LOG2; + + case IIO_CHAN_INFO_OFFSET: + /* + * DFSDM output data are in the range [-2^n,2^n-1], + * with n=realbits-1. + * - Differential modulator: + * Offset correspond to SD modulator offset. + * - Single ended modulator: + * Input is in [0V,Vref] range, where 0V corresponds to -2^n. + * Add 2^n to offset. (i.e. middle of input range) + * offset = offset(sd) * vref / res(sd) * max / vref. + */ + *val = div_u64((u64)max * adc->sd_chan[idx].offset, + BIT(adc->sd_chan[idx].scale_val2 - 1)); + if (!adc->sd_chan[idx].differential) + *val += max; + + return IIO_VAL_INT; } return -EINVAL; @@ -1430,7 +1477,9 @@ static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev, * IIO_CHAN_INFO_RAW: used to compute regular conversion * IIO_CHAN_INFO_OVERSAMPLING_RATIO: used to set oversampling */ - ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); + ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_OFFSET); ch->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) | BIT(IIO_CHAN_INFO_SAMP_FREQ); @@ -1481,8 +1530,10 @@ static int stm32_dfsdm_adc_init(struct iio_dev *indio_dev) { struct iio_chan_spec *ch; struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); + struct iio_channel *channels, *chan; + struct stm32_dfsdm_sd_chan_info *sd_chan; int num_ch; - int ret, chan_idx; + int ret, chan_idx, val2; adc->oversamp = DFSDM_DEFAULT_OVERSAMPLING; ret = stm32_dfsdm_compute_all_osrs(indio_dev, adc->oversamp); @@ -1506,6 +1557,22 @@ static int stm32_dfsdm_adc_init(struct iio_dev *indio_dev) if (!ch) return -ENOMEM; + /* Get SD modulator channels */ + channels = iio_channel_get_all(&indio_dev->dev); + if (IS_ERR(channels)) { + dev_err(&indio_dev->dev, "Failed to get channel %ld\n", + PTR_ERR(channels)); + return PTR_ERR(channels); + } + chan = &channels[0]; + + adc->sd_chan = devm_kzalloc(&indio_dev->dev, + sizeof(*adc->sd_chan) * num_ch, GFP_KERNEL); + if (!adc->sd_chan) + return -ENOMEM; + + sd_chan = adc->sd_chan; + for (chan_idx = 0; chan_idx < num_ch; chan_idx++) { ch[chan_idx].scan_index = chan_idx; ret = stm32_dfsdm_adc_chan_init_one(indio_dev, &ch[chan_idx]); @@ -1513,6 +1580,38 @@ static int stm32_dfsdm_adc_init(struct iio_dev *indio_dev) dev_err(&indio_dev->dev, "Channels init failed\n"); return ret; } + + if (!chan->indio_dev) + return -EINVAL; + + ret = iio_read_channel_scale(chan, &sd_chan->scale_val, + &sd_chan->scale_val2); + if (ret < 0) { + dev_err(&indio_dev->dev, + "Failed to get channel %d scale\n", chan_idx); + return ret; + } + + if (iio_channel_has_info(chan->channel, IIO_CHAN_INFO_OFFSET)) { + ret = iio_read_channel_offset(chan, &sd_chan->offset, + &val2); + if (ret < 0) { + dev_err(&indio_dev->dev, + "Failed to get channel %d offset\n", + chan_idx); + return ret; + } + } + + sd_chan->differential = chan->channel->differential; + + dev_dbg(&indio_dev->dev, "Channel %d %s scale ref=%d offset=%d", + chan_idx, chan->channel->differential ? + "differential" : "single-ended", + sd_chan->scale_val, sd_chan->offset); + + chan++; + sd_chan++; } indio_dev->num_channels = num_ch;