From patchwork Thu Sep 27 14:07:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 10618067 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 159AE15E8 for ; Thu, 27 Sep 2018 14:08:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 061FC2B721 for ; Thu, 27 Sep 2018 14:08:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EE6062B733; Thu, 27 Sep 2018 14:08:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0447D2B721 for ; Thu, 27 Sep 2018 14:08:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727579AbeI0U01 (ORCPT ); Thu, 27 Sep 2018 16:26:27 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:43024 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727263AbeI0U01 (ORCPT ); Thu, 27 Sep 2018 16:26:27 -0400 Received: by mail-pg1-f194.google.com with SMTP id q19-v6so2040848pgn.10; Thu, 27 Sep 2018 07:08:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wrVbKHx8U5uLLj1imAYO/Pu0eZL3Rt4//xeDHB+8AMo=; b=QwCYsjEWAwvNPYVaYB1GqPYit8cX2uzt7D/4pmeA2uPe+1Et9Hm+7CJqU2EjmEthi1 njQmEoDOVrMs54oyQKUlH8Wn6vV2hL0TEKLJVubORkFpUMozsT9UGiuLR07Xt7heYgQt D+7XY5XY+7DNiRVjSgekP8SGWkS//9QHYt4oLfOJXG3INyobXP/XTAqmdax4iItRO1VN csEV6F+pH54N1Wh637hL348z0fKpnASci+3HC0b+5KvIe5Yusw3IhRtAeN+HushJnFgC 6MW6nUB9JZr7FRaSbQAoDWa1u3Kvz55Oo8Ss+N//atczlKqEMCg7WXAdAoR4XhofujaC byLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wrVbKHx8U5uLLj1imAYO/Pu0eZL3Rt4//xeDHB+8AMo=; b=f6euBI8sgw3rUPmt4xWzDat0g5AQ+IhLK00s/geiJv1L5ONgjqsAyHAEmE16bJpGh3 ujkM0bfttqaR/XOODS8ykLXnoQEwvy9QySaPEYJ8Dn8Q3czxaHxqywpTGzmNfj+Z+pZN PTZ20oeLdNbMWe4oTP9qkN3yo+qK9FZ1Z2KEihsW0/YYPXva4Fy93cNhndg2ejUVMmSw ql8937pFO6F3KtVkGTKiyqA5Qk6QP/jASbq4wZQrLVNpwQpqynYYukwD8MekDUK3SSAJ I5knCu4U7sLZK7btf0NO/jpB+V2g9h1/A2cqUMq7VqfvgxRkdgivH57FYnMscQctn3yQ EyeA== X-Gm-Message-State: ABuFfoidOPxIfTUdbrwYLqit2H+YnRnRsNhXc84d84d+URxTwoK8HfLM w518IZQ6WTez7ILaz1z2fWc= X-Google-Smtp-Source: ACcGV6308tDG272i7cTeDsS3LrbmWkPUu0B9DSPyvgUFkEuvYoXHEXL44Jiqlxe0T2QjDR5YO8Rz7w== X-Received: by 2002:a17:902:ba95:: with SMTP id k21-v6mr11337575pls.38.1538057279735; Thu, 27 Sep 2018 07:07:59 -0700 (PDT) Received: from localhost.localdomain ([103.51.74.185]) by smtp.gmail.com with ESMTPSA id r205-v6sm4259763pgr.11.2018.09.27.07.07.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Sep 2018 07:07:59 -0700 (PDT) From: Anand Moon To: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , Marek Szyprowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCHv5 1/6] ARM: dts: exynos: Added UHS-I bus speed support Date: Thu, 27 Sep 2018 14:07:33 +0000 Message-Id: <20180927140738.1006-2-linux.amoon@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180927140738.1006-1-linux.amoon@gmail.com> References: <20180927140738.1006-1-linux.amoon@gmail.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Added support for UHS-I bus speed tuning for SDR50, DDR50 SDR104. Signed-off-by: Anand Moon --- --- [0] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/376263.html Changes from above. Fix the subject and commit message. drop sd-uhs-sdr12 and sd-uhs-sdr25 as host driver is not enable as of now. --- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 2fac4baf1eb4..0508e6891f41 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -503,6 +503,9 @@ cap-sd-highspeed; vmmc-supply = <&ldo19_reg>; vqmmc-supply = <&ldo13_reg>; + sd-uhs-sdr50; + sd-uhs-sdr104; + sd-uhs-ddr50; }; &nocp_mem0_0 { From patchwork Thu Sep 27 14:07:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 10618045 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 54C7915E8 for ; Thu, 27 Sep 2018 14:08:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CAAAE29697 for ; Thu, 27 Sep 2018 14:08:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BC1742B4A0; Thu, 27 Sep 2018 14:08:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BD08129697 for ; Thu, 27 Sep 2018 14:08:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727992AbeI0U0c (ORCPT ); Thu, 27 Sep 2018 16:26:32 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:39807 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727262AbeI0U0b (ORCPT ); Thu, 27 Sep 2018 16:26:31 -0400 Received: by mail-pg1-f194.google.com with SMTP id 85-v6so2055005pge.6; Thu, 27 Sep 2018 07:08:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=C4Mdmn+WkEtGLorwYz0JZmLfHLWBJ/DuiHb977olMvg=; b=XADdqMpPZcfcLfd4cFabL86Y55bDfaHCSKO1EzpbwpdLI8vIMWc6tMJ+KJ/wRzHp0g n57DS25FsCd5FfotNfG7U3CGFxzmBQWNEtLOX1xCehJ0FJL+sZl9fovxJzjPR2Ufs280 vRIzm73ni0D+1rXDihXZYIL6bUD4l6icWPhYqdYg9Rt6fjyafSxFOWeTmUtGDh19zVMv ZDAG42Z758BBLZbFQAeH+2k6QEoGRZubIHANCh1fA6opwE0FWev76byLe2gGDkdzSdHk YaXe0EP/BEX5zeQehFx1/VfNGaiTIZUxJ++DbUmFbU97OXzIpY68c2t1s2VYKXmsV69j zkSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=C4Mdmn+WkEtGLorwYz0JZmLfHLWBJ/DuiHb977olMvg=; b=odSFLfW/OyLBceuTKttmL8WUMgRtQ6qD0cYWS5MfHPkA0nKF1pC3QGgtWAnd8nrDVm HbqWOp3IT5Z4HGxCCWM8Uv5Bntetj5bN/TuSvgi8Z/m44f/D377RIx+aTN+bew7chcx+ zlPtzma4BrJSsD35SeflO1oMoomWoZZPMlTDp+vSfNBAjcyEQrWq6g73PDED3MUpltnx tUgO10KZYawfHGcVKEZcR8sM7W3ycNnZPVvc9yPFBqCZdd5Be2Bjcw8bqG8yXXg3bZoX yN9tz3UrZM/Ojor2BZhR5olpldoZezXSru3CPcNpDQmfYcgmYLKrgufklrYgEKh5i1iR S8cA== X-Gm-Message-State: ABuFfojtB5KRLyssKOlnzSGjqyCWWBO8LH05qJBn3C/67qG/Xbiz8Kpw +ZOxbUpstsMF2pQadlNz1VA= X-Google-Smtp-Source: ACcGV63Lt042KJqMl+f+8g7iVpR2jNwBHBX7xNyf3OpeTQoEZH3lUKUdgi93ribUoHcHmM7tcGci5g== X-Received: by 2002:a17:902:744c:: with SMTP id e12-v6mr11323902plt.186.1538057283998; Thu, 27 Sep 2018 07:08:03 -0700 (PDT) Received: from localhost.localdomain ([103.51.74.185]) by smtp.gmail.com with ESMTPSA id r205-v6sm4259763pgr.11.2018.09.27.07.08.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Sep 2018 07:08:03 -0700 (PDT) From: Anand Moon To: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , Marek Szyprowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCHv5 2/6] ARM: dts: exynos: fix regulator min values of LDO13 for Odroid XU3/XU4 Date: Thu, 27 Sep 2018 14:07:34 +0000 Message-Id: <20180927140738.1006-3-linux.amoon@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180927140738.1006-1-linux.amoon@gmail.com> References: <20180927140738.1006-1-linux.amoon@gmail.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Looking at the schematic sd_2 min/max range from 1.8V/2.8V so fix the regulator min value to 1.8V. Without these changes sdcard will failed to detect on booting when UHS-I tuning is enabled. Signed-off-by: Anand Moon --- [0] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/376262.html Fixed the commit message. drop the ramp-delay changes. drop the vmmc-supply/vqmmc-supply changes. --- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 0508e6891f41..15ab380e5fcf 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -231,7 +231,7 @@ ldo13_reg: LDO13 { regulator-name = "vddq_mmc2"; - regulator-min-microvolt = <2800000>; + regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2800000>; }; From patchwork Thu Sep 27 14:07:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 10618057 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2DDDC14BD for ; Thu, 27 Sep 2018 14:08:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1F3B52B6CF for ; Thu, 27 Sep 2018 14:08:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 131122B6EA; Thu, 27 Sep 2018 14:08:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C2F942B6CF for ; Thu, 27 Sep 2018 14:08:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727587AbeI0U0f (ORCPT ); Thu, 27 Sep 2018 16:26:35 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:33537 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727262AbeI0U0e (ORCPT ); Thu, 27 Sep 2018 16:26:34 -0400 Received: by mail-pg1-f193.google.com with SMTP id y18-v6so2079749pge.0; Thu, 27 Sep 2018 07:08:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oQiZIpqZCyb/15muQvEVGtCrC8IrAFJLh0dOxMdHDi4=; b=TWJkiNPIcvF+iZmOsYy7LgSu59ve/bJggHpR1qWrCWiZh+7kxr9Xzv6lXavVlfmRhK GnaYjRUHtsS9LYwxe9ZfjCjIU08RvY8cXOZ6bBueXflaKyselv6jznbsKcKrVmlLt2uC NlZ4RSJFaalHvYTCJV/ua8y41ODbJhD7aebqcb/nRlBOXvuBBbeMkn7AQoe1v6w/kPKp KDrGN4WBt3zfop229aPkN5IKhbDbYND4Rnhe9t/OIv7Neh1Z6QBCTxz1+z0/VH2M1Pgv SP71SxVNp68mGiEJK1nFU74pjWG8UCMBRIBdqAzT/WZxLMIYkYhfC20/YG8HdPuzEac+ cPMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oQiZIpqZCyb/15muQvEVGtCrC8IrAFJLh0dOxMdHDi4=; b=bArefd/dS2vkcj7EJ2MuZg8pp2m/LJeFZe2eibNr0kmc4/EAoimEhgS7FNp7T7Lyro 4WcujtWb1tFXF+0OUEajAnbAavCr+hGZgHQzDDAD1rfAfasaCwHH5gBFGpJJt0i8vGKj CNkNYxbDzockH4FOR3seYDVOvBAknywXr4jU2VmSrij/zgUZi8EDtjsFo+JFmTOp2CYC R9hQsl9cHKhgi4uaTyQCV/X/wUs0b2J0R8NS1e+1r2tPjVIHTi9PnhnFFyZGrNJ8fZ2E ih821Tm97eqfQvCvslY1UQ50vn3/D6AJC4HvBs/UomIg/kN1bSedQiQALI33k9TNaG2a KQww== X-Gm-Message-State: ABuFfogD129sRcsDlsmSR+UKj01N9l9G/yKf8/c1oqJ2ZysR28YKUaAL CaBIni94TmZ23Dj20HhVeoM= X-Google-Smtp-Source: ACcGV61U8abH1BkEwcKrByEWrKv30JnmNWRrWkP67tNOC4bZ0hFYwYgpZJzub4cP65oTefpLnlerFg== X-Received: by 2002:a62:5543:: with SMTP id j64-v6mr11564373pfb.188.1538057288132; Thu, 27 Sep 2018 07:08:08 -0700 (PDT) Received: from localhost.localdomain ([103.51.74.185]) by smtp.gmail.com with ESMTPSA id r205-v6sm4259763pgr.11.2018.09.27.07.08.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Sep 2018 07:08:07 -0700 (PDT) From: Anand Moon To: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , Marek Szyprowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCHv5 3/6] ARM: dts: exynos: update maximum frequency for sdcard to 200MHz Date: Thu, 27 Sep 2018 14:07:35 +0000 Message-Id: <20180927140738.1006-4-linux.amoon@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180927140738.1006-1-linux.amoon@gmail.com> References: <20180927140738.1006-1-linux.amoon@gmail.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP set the max-frequency to 200MHz for optimal performace. Signed-off-by: Anand Moon --- This patch is new to this series. microSD card. root@odroid:~# sudo cat /sys/kernel/debug/mmc1/ios clock: 200000000 Hz actual clock: 200000000 Hz vdd: 16 (2.8 ~ 2.9 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 2 (4 bits) timing spec: 6 (sd uhs SDR104) signal voltage: 1 (1.80 V) driver type: 0 (driver type B) --- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 15ab380e5fcf..a80b6c045154 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -501,6 +501,7 @@ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; bus-width = <4>; cap-sd-highspeed; + max-frequency = <200000000>; vmmc-supply = <&ldo19_reg>; vqmmc-supply = <&ldo13_reg>; sd-uhs-sdr50; From patchwork Thu Sep 27 14:07:36 2018 Content-Type: text/plain; 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Thu, 27 Sep 2018 07:08:11 -0700 (PDT) From: Anand Moon To: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , Marek Szyprowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCHv5 4/6] ARM: dts: exynos: Add pin configuration for SD write protect on Odroid XU3/XU4 Date: Thu, 27 Sep 2018 14:07:36 +0000 Message-Id: <20180927140738.1006-5-linux.amoon@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180927140738.1006-1-linux.amoon@gmail.com> References: <20180927140738.1006-1-linux.amoon@gmail.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add SD card write-protect pin configuration to be sure that it will be properly pulled down to indicate write access. Suggested-by: Krzysztof Kozlowski Signed-off-by: Anand Moon --- Changes since v4: 1. Remove cd-gpios and wp-gpios leaving only WP pin configuration (after Marek Szyprowski feedback). 2. Pull pin down. 3. change the subject and commit message. Sorry Krzysztof if I have copied your commit message to describe the changes. --- arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 7 +++++++ arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index dda8ca2d2324..b82af7c89654 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -289,6 +289,13 @@ samsung,pin-pud = ; samsung,pin-drv = ; }; + + sd2_wp: sd2-wp { + samsung,pins = "gpc4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; }; &pinctrl_2 { diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index a80b6c045154..54811960e322 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -498,7 +498,7 @@ samsung,dw-mshc-sdr-timing = <0 4>; samsung,dw-mshc-ddr-timing = <0 2>; pinctrl-names = "default"; - pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_wp &sd2_bus1 &sd2_bus4>; bus-width = <4>; cap-sd-highspeed; max-frequency = <200000000>; From patchwork Thu Sep 27 14:07:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 10618053 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8F79815E8 for ; Thu, 27 Sep 2018 14:08:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8025F2B6CF for ; Thu, 27 Sep 2018 14:08:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 743FF2B6EA; Thu, 27 Sep 2018 14:08:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C4CD2B6CF for ; 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Thu, 27 Sep 2018 07:08:15 -0700 (PDT) From: Anand Moon To: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , Marek Szyprowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCHv5 5/6] ARM: dts: exynos: update maximum frequency for emmc to 200MHz Date: Thu, 27 Sep 2018 14:07:37 +0000 Message-Id: <20180927140738.1006-6-linux.amoon@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180927140738.1006-1-linux.amoon@gmail.com> References: <20180927140738.1006-1-linux.amoon@gmail.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Set the max-frequency to 200MHz for optimal performace of eMMC. Signed-off-by: Anand Moon --- eMMC root@odroid:~# sudo cat /sys/kernel/debug/mmc0/ios clock: 200000000 Hz actual clock: 200000000 Hz vdd: 7 (1.65 - 1.95 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 10 (mmc HS400) signal voltage: 1 (1.80 V) driver type: 0 (driver type B) --- arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index e522edb2bb82..1f2d3987dde1 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -392,6 +392,7 @@ cap-mmc-highspeed; mmc-hs200-1_8v; mmc-hs400-1_8v; + max-frequency = <200000000>; vmmc-supply = <&ldo18_reg>; vqmmc-supply = <&ldo3_reg>; }; From patchwork Thu Sep 27 14:07:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 10618061 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 66B0715E8 for ; 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Thu, 27 Sep 2018 07:08:27 -0700 (PDT) Received: from localhost.localdomain ([103.51.74.185]) by smtp.gmail.com with ESMTPSA id r205-v6sm4259763pgr.11.2018.09.27.07.08.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Sep 2018 07:08:27 -0700 (PDT) From: Anand Moon To: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , Marek Szyprowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCHv5 6/6] mmc: dw_mmc-exynos: Add tuning for sdr and ddr timing for USH-I mode Date: Thu, 27 Sep 2018 14:07:38 +0000 Message-Id: <20180927140738.1006-7-linux.amoon@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180927140738.1006-1-linux.amoon@gmail.com> References: <20180927140738.1006-1-linux.amoon@gmail.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add tuning for sdr and ddr timing for USH-I mode sdr104/sdr50/ddr50 for host controller. Cc: Jaehoon Chung Cc: Marek Szyprowski Signed-off-by: Anand Moon --- No changes from previous patch --- drivers/mmc/host/dw_mmc-exynos.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index ab47b018716a..d46c3439b508 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c @@ -253,6 +253,8 @@ static void dw_mci_exynos_config_hs400(struct dw_mci *host, u32 timing) if (timing == MMC_TIMING_MMC_HS400) { dqs |= DATA_STROBE_EN; strobe = DQS_CTRL_RD_DELAY(strobe, priv->dqs_delay); + } else if (timing == MMC_TIMING_UHS_SDR104) { + dqs &= 0xffffff00; } else { dqs &= ~DATA_STROBE_EN; } @@ -312,6 +314,15 @@ static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios) if (ios->bus_width == MMC_BUS_WIDTH_8) wanted <<= 1; break; + case MMC_TIMING_UHS_SDR104: + case MMC_TIMING_UHS_SDR50: + clksel = (priv->sdr_timing & 0xfff8ffff) | + (priv->ciu_div << 16); + break; + case MMC_TIMING_UHS_DDR50: + clksel = (priv->ddr_timing & 0xfff8ffff) | + (priv->ciu_div << 16); + break; default: clksel = priv->sdr_timing; }