From patchwork Fri Feb 21 03:26:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395329 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 55DF61580 for ; Fri, 21 Feb 2020 03:28:21 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3E1AE24672 for ; Fri, 21 Feb 2020 03:28:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3E1AE24672 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A82E110FC3609; Thu, 20 Feb 2020 19:29:12 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0F0711003E988 for ; Thu, 20 Feb 2020 19:29:11 -0800 (PST) Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3KCdo143877 for ; Thu, 20 Feb 2020 22:28:18 -0500 Received: from e06smtp02.uk.ibm.com (e06smtp02.uk.ibm.com [195.75.94.98]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y8ubc193u-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:18 -0500 Received: from localhost by e06smtp02.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:08 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S76G42991798 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:07 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BEC7752052; Fri, 21 Feb 2020 03:28:07 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 18C1B5204F; Fri, 21 Feb 2020 03:28:07 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 8C12BA023F; Fri, 21 Feb 2020 14:28:02 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 01/27] powerpc: Add OPAL calls for LPC memory alloc/release Date: Fri, 21 Feb 2020 14:26:54 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0008-0000-0000-00000354F596 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0009-0000-0000-00004A760738 Message-Id: <20200221032720.33893-2-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 phishscore=0 adultscore=0 mlxscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxlogscore=777 suspectscore=1 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: S3IXVMBKDW6BUCXPAQSEMMD4H3SFC7RM X-Message-ID-Hash: S3IXVMBKDW6BUCXPAQSEMMD4H3SFC7RM X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . 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Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva Add OPAL calls for LPC memory alloc/release Signed-off-by: Alastair D'Silva Acked-by: Andrew Donnellan Acked-by: Frederic Barrat --- arch/powerpc/include/asm/opal-api.h | 2 ++ arch/powerpc/include/asm/opal.h | 3 +++ arch/powerpc/platforms/powernv/opal-call.c | 2 ++ 3 files changed, 7 insertions(+) diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h index c1f25a760eb1..9298e603001b 100644 --- a/arch/powerpc/include/asm/opal-api.h +++ b/arch/powerpc/include/asm/opal-api.h @@ -208,6 +208,8 @@ #define OPAL_HANDLE_HMI2 166 #define OPAL_NX_COPROC_INIT 167 #define OPAL_XIVE_GET_VP_STATE 170 +#define OPAL_NPU_MEM_ALLOC 171 +#define OPAL_NPU_MEM_RELEASE 172 #define OPAL_MPIPL_UPDATE 173 #define OPAL_MPIPL_REGISTER_TAG 174 #define OPAL_MPIPL_QUERY_TAG 175 diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h index 9986ac34b8e2..8f7727e0f9ce 100644 --- a/arch/powerpc/include/asm/opal.h +++ b/arch/powerpc/include/asm/opal.h @@ -39,6 +39,9 @@ int64_t opal_npu_spa_clear_cache(uint64_t phb_id, uint32_t bdfn, uint64_t PE_handle); int64_t opal_npu_tl_set(uint64_t phb_id, uint32_t bdfn, long cap, uint64_t rate_phys, uint32_t size); +int64_t opal_npu_mem_alloc(uint64_t phb_id, uint32_t bdfn, + uint64_t size, uint64_t *bar); +int64_t opal_npu_mem_release(uint64_t phb_id, uint32_t bdfn); int64_t opal_console_write(int64_t term_number, __be64 *length, const uint8_t *buffer); diff --git a/arch/powerpc/platforms/powernv/opal-call.c b/arch/powerpc/platforms/powernv/opal-call.c index 5cd0f52d258f..f26e58b72c04 100644 --- a/arch/powerpc/platforms/powernv/opal-call.c +++ b/arch/powerpc/platforms/powernv/opal-call.c @@ -287,6 +287,8 @@ OPAL_CALL(opal_pci_set_pbcq_tunnel_bar, OPAL_PCI_SET_PBCQ_TUNNEL_BAR); OPAL_CALL(opal_sensor_read_u64, OPAL_SENSOR_READ_U64); OPAL_CALL(opal_sensor_group_enable, OPAL_SENSOR_GROUP_ENABLE); OPAL_CALL(opal_nx_coproc_init, OPAL_NX_COPROC_INIT); +OPAL_CALL(opal_npu_mem_alloc, OPAL_NPU_MEM_ALLOC); +OPAL_CALL(opal_npu_mem_release, OPAL_NPU_MEM_RELEASE); OPAL_CALL(opal_mpipl_update, OPAL_MPIPL_UPDATE); OPAL_CALL(opal_mpipl_register_tag, OPAL_MPIPL_REGISTER_TAG); OPAL_CALL(opal_mpipl_query_tag, OPAL_MPIPL_QUERY_TAG); From patchwork Fri Feb 21 03:26:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395327 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 212111395 for ; Fri, 21 Feb 2020 03:28:21 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B60572467A for ; Fri, 21 Feb 2020 03:28:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B60572467A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8A29610FC3605; Thu, 20 Feb 2020 19:29:12 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 597F91003E988 for ; Thu, 20 Feb 2020 19:29:10 -0800 (PST) Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3Kh4u137502 for ; Thu, 20 Feb 2020 22:28:17 -0500 Received: from e06smtp02.uk.ibm.com (e06smtp02.uk.ibm.com [195.75.94.98]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y8uef6c6n-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:17 -0500 Received: from localhost by e06smtp02.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:08 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S7o531523282 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:07 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 871E0A4040; Fri, 21 Feb 2020 03:28:07 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 330E5A404D; Fri, 21 Feb 2020 03:28:07 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:07 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 93FA8A0278; Fri, 21 Feb 2020 14:28:02 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 02/27] mm/memory_hotplug: Allow check_hotplug_memory_addressable to be called from drivers Date: Fri, 21 Feb 2020 14:26:55 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0008-0000-0000-00000354F594 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0009-0000-0000-00004A760737 Message-Id: <20200221032720.33893-3-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 phishscore=0 mlxlogscore=999 suspectscore=3 malwarescore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: YLO2DAORW7PAZMZLRMMFV52IMIFKT3LW X-Message-ID-Hash: YLO2DAORW7PAZMZLRMMFV52IMIFKT3LW X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva When setting up OpenCAPI connected persistent memory, the range check may not be performed until quite late (or perhaps not at all, if the user does not establish a DAX device). This patch makes the range check callable so we can perform the check while probing the OpenCAPI SCM device. Signed-off-by: Alastair D'Silva Reviewed-by: Andrew Donnellan --- include/linux/memory_hotplug.h | 5 +++++ mm/memory_hotplug.c | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h index f4d59155f3d4..34a69aecc45e 100644 --- a/include/linux/memory_hotplug.h +++ b/include/linux/memory_hotplug.h @@ -337,6 +337,11 @@ static inline void __remove_memory(int nid, u64 start, u64 size) {} extern void set_zone_contiguous(struct zone *zone); extern void clear_zone_contiguous(struct zone *zone); +#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE +int check_hotplug_memory_addressable(unsigned long pfn, + unsigned long nr_pages); +#endif /* CONFIG_MEMORY_HOTPLUG_SPARSE */ + extern void __ref free_area_init_core_hotplug(int nid); extern int __add_memory(int nid, u64 start, u64 size); extern int add_memory(int nid, u64 start, u64 size); diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c index 0a54ffac8c68..14945f033594 100644 --- a/mm/memory_hotplug.c +++ b/mm/memory_hotplug.c @@ -276,8 +276,8 @@ static int check_pfn_span(unsigned long pfn, unsigned long nr_pages, return 0; } -static int check_hotplug_memory_addressable(unsigned long pfn, - unsigned long nr_pages) +int check_hotplug_memory_addressable(unsigned long pfn, + unsigned long nr_pages) { const u64 max_addr = PFN_PHYS(pfn + nr_pages) - 1; From patchwork Fri Feb 21 03:26:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395339 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 22DBE1580 for ; Fri, 21 Feb 2020 03:28:26 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0B2B32467B for ; Fri, 21 Feb 2020 03:28:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0B2B32467B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 1B6E710FC3615; Thu, 20 Feb 2020 19:29:15 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 975F810FC3608 for ; Thu, 20 Feb 2020 19:29:12 -0800 (PST) Received: from pps.filterd (m0098394.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3JGxn067466 for ; Thu, 20 Feb 2020 22:28:20 -0500 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y8ubvvvt3-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:19 -0500 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:08 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S89x51314814 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:08 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EE38F52052; Fri, 21 Feb 2020 03:28:07 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 45FC35204E; Fri, 21 Feb 2020 03:28:07 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id A59CDA027A; Fri, 21 Feb 2020 14:28:02 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 03/27] powerpc: Map & release OpenCAPI LPC memory Date: Fri, 21 Feb 2020 14:26:56 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-4275-0000-0000-000003A3FE60 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-4276-0000-0000-000038B80C78 Message-Id: <20200221032720.33893-4-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 spamscore=0 priorityscore=1501 mlxlogscore=494 bulkscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 mlxscore=0 suspectscore=3 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: 3P6W74MO4WZE37YJKCFPQLYSY62JU3LS X-Message-ID-Hash: 3P6W74MO4WZE37YJKCFPQLYSY62JU3LS X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch adds platform support to map & release LPC memory. Signed-off-by: Alastair D'Silva Reviewed-by: Andrew Donnellan --- arch/powerpc/include/asm/pnv-ocxl.h | 4 +++ arch/powerpc/platforms/powernv/ocxl.c | 43 +++++++++++++++++++++++++++ 2 files changed, 47 insertions(+) diff --git a/arch/powerpc/include/asm/pnv-ocxl.h b/arch/powerpc/include/asm/pnv-ocxl.h index 7de82647e761..0b2a6707e555 100644 --- a/arch/powerpc/include/asm/pnv-ocxl.h +++ b/arch/powerpc/include/asm/pnv-ocxl.h @@ -32,5 +32,9 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); extern void pnv_ocxl_free_xive_irq(u32 irq); +#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE +u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size); +void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); +#endif #endif /* _ASM_PNV_OCXL_H */ diff --git a/arch/powerpc/platforms/powernv/ocxl.c b/arch/powerpc/platforms/powernv/ocxl.c index 8c65aacda9c8..f2edbcc67361 100644 --- a/arch/powerpc/platforms/powernv/ocxl.c +++ b/arch/powerpc/platforms/powernv/ocxl.c @@ -475,6 +475,49 @@ void pnv_ocxl_spa_release(void *platform_data) } EXPORT_SYMBOL_GPL(pnv_ocxl_spa_release); +#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE +u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size) +{ + struct pci_controller *hose = pci_bus_to_host(pdev->bus); + struct pnv_phb *phb = hose->private_data; + u32 bdfn = pci_dev_id(pdev); + __be64 base_addr_be64; + u64 base_addr; + int rc; + + rc = opal_npu_mem_alloc(phb->opal_id, bdfn, size, &base_addr_be64); + if (rc) { + dev_warn(&pdev->dev, + "OPAL could not allocate LPC memory, rc=%d\n", rc); + return 0; + } + + base_addr = be64_to_cpu(base_addr_be64); + + rc = check_hotplug_memory_addressable(base_addr >> PAGE_SHIFT, + size >> PAGE_SHIFT); + if (rc) + return 0; + + return base_addr; +} +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_setup); + +void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev) +{ + struct pci_controller *hose = pci_bus_to_host(pdev->bus); + struct pnv_phb *phb = hose->private_data; + u32 bdfn = pci_dev_id(pdev); + int rc; + + rc = opal_npu_mem_release(phb->opal_id, bdfn); + if (rc) + dev_warn(&pdev->dev, + "OPAL reported rc=%d when releasing LPC memory\n", rc); +} +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_release); +#endif + int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) { struct spa_data *data = (struct spa_data *) platform_data; From patchwork Fri Feb 21 03:26:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395333 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 135DA1580 for ; Fri, 21 Feb 2020 03:28:23 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EF5D22467D for ; Fri, 21 Feb 2020 03:28:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EF5D22467D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id BF4BC10FC360D; Thu, 20 Feb 2020 19:29:13 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 07C351003E988 for ; Thu, 20 Feb 2020 19:29:11 -0800 (PST) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3JE0E020220 for ; Thu, 20 Feb 2020 22:28:19 -0500 Received: from e06smtp02.uk.ibm.com (e06smtp02.uk.ibm.com [195.75.94.98]) by mx0b-001b2d01.pphosted.com with ESMTP id 2y8ubxhfgg-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:18 -0500 Received: from localhost by e06smtp02.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:09 -0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S8nW57671812 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:08 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 072844C04E; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5A56A4C044; Fri, 21 Feb 2020 03:28:07 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:07 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id BAC5BA02A1; Fri, 21 Feb 2020 14:28:02 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 04/27] ocxl: Remove unnecessary externs Date: Fri, 21 Feb 2020 14:26:57 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0008-0000-0000-00000354F595 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0009-0000-0000-00004A760739 Message-Id: <20200221032720.33893-5-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 suspectscore=3 mlxlogscore=999 clxscore=1015 malwarescore=0 adultscore=0 impostorscore=0 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: Y633IA5Q56GFIJQJB62GBAUEYOQX7QTY X-Message-ID-Hash: Y633IA5Q56GFIJQJB62GBAUEYOQX7QTY X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . 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Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva Function declarations don't need externs, remove the existing ones so they are consistent with newer code Signed-off-by: Alastair D'Silva Acked-by: Andrew Donnellan Acked-by: Frederic Barrat --- arch/powerpc/include/asm/pnv-ocxl.h | 32 ++++++++++++++--------------- include/misc/ocxl.h | 6 +++--- 2 files changed, 18 insertions(+), 20 deletions(-) diff --git a/arch/powerpc/include/asm/pnv-ocxl.h b/arch/powerpc/include/asm/pnv-ocxl.h index 0b2a6707e555..b23c99bc0c84 100644 --- a/arch/powerpc/include/asm/pnv-ocxl.h +++ b/arch/powerpc/include/asm/pnv-ocxl.h @@ -9,29 +9,27 @@ #define PNV_OCXL_TL_BITS_PER_RATE 4 #define PNV_OCXL_TL_RATE_BUF_SIZE ((PNV_OCXL_TL_MAX_TEMPLATE+1) * PNV_OCXL_TL_BITS_PER_RATE / 8) -extern int pnv_ocxl_get_actag(struct pci_dev *dev, u16 *base, u16 *enabled, - u16 *supported); -extern int pnv_ocxl_get_pasid_count(struct pci_dev *dev, int *count); +int pnv_ocxl_get_actag(struct pci_dev *dev, u16 *base, u16 *enabled, u16 *supported); +int pnv_ocxl_get_pasid_count(struct pci_dev *dev, int *count); -extern int pnv_ocxl_get_tl_cap(struct pci_dev *dev, long *cap, +int pnv_ocxl_get_tl_cap(struct pci_dev *dev, long *cap, char *rate_buf, int rate_buf_size); -extern int pnv_ocxl_set_tl_conf(struct pci_dev *dev, long cap, +int pnv_ocxl_set_tl_conf(struct pci_dev *dev, long cap, uint64_t rate_buf_phys, int rate_buf_size); -extern int pnv_ocxl_get_xsl_irq(struct pci_dev *dev, int *hwirq); -extern void pnv_ocxl_unmap_xsl_regs(void __iomem *dsisr, void __iomem *dar, - void __iomem *tfc, void __iomem *pe_handle); -extern int pnv_ocxl_map_xsl_regs(struct pci_dev *dev, void __iomem **dsisr, - void __iomem **dar, void __iomem **tfc, - void __iomem **pe_handle); +int pnv_ocxl_get_xsl_irq(struct pci_dev *dev, int *hwirq); +void pnv_ocxl_unmap_xsl_regs(void __iomem *dsisr, void __iomem *dar, + void __iomem *tfc, void __iomem *pe_handle); +int pnv_ocxl_map_xsl_regs(struct pci_dev *dev, void __iomem **dsisr, + void __iomem **dar, void __iomem **tfc, + void __iomem **pe_handle); -extern int pnv_ocxl_spa_setup(struct pci_dev *dev, void *spa_mem, int PE_mask, - void **platform_data); -extern void pnv_ocxl_spa_release(void *platform_data); -extern int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle); +int pnv_ocxl_spa_setup(struct pci_dev *dev, void *spa_mem, int PE_mask, void **platform_data); +void pnv_ocxl_spa_release(void *platform_data); +int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle); -extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); -extern void pnv_ocxl_free_xive_irq(u32 irq); +int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); +void pnv_ocxl_free_xive_irq(u32 irq); #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size); void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); diff --git a/include/misc/ocxl.h b/include/misc/ocxl.h index 06dd5839e438..0a762e387418 100644 --- a/include/misc/ocxl.h +++ b/include/misc/ocxl.h @@ -173,7 +173,7 @@ int ocxl_context_detach(struct ocxl_context *ctx); * * Returns 0 on success, negative on failure */ -extern int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id); +int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id); /** * Frees an IRQ associated with an AFU context @@ -182,7 +182,7 @@ extern int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id); * * Returns 0 on success, negative on failure */ -extern int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id); +int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id); /** * Gets the address of the trigger page for an IRQ @@ -193,7 +193,7 @@ extern int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id); * * returns the trigger page address, or 0 if the IRQ is not valid */ -extern u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id); +u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id); /** * Provide a callback to be called when an IRQ is triggered From patchwork Fri Feb 21 03:26:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395353 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 879051395 for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:10 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S9ho59244686 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:09 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A083252054; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id ABC5452059; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id C614FA03B4; Fri, 21 Feb 2020 14:28:02 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 05/27] ocxl: Address kernel doc errors & warnings Date: Fri, 21 Feb 2020 14:26:58 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0016-0000-0000-000002E8CEC2 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0017-0000-0000-0000334BED96 Message-Id: <20200221032720.33893-6-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=3 clxscore=1015 mlxlogscore=999 mlxscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 impostorscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: CBJHCEWYTKTX2YX3QQ44T6Y2GIULH5BR X-Message-ID-Hash: CBJHCEWYTKTX2YX3QQ44T6Y2GIULH5BR X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch addresses warnings and errors from the kernel doc scripts for the OpenCAPI driver. It also makes minor tweaks to make the docs more consistent. Signed-off-by: Alastair D'Silva Acked-by: Andrew Donnellan --- drivers/misc/ocxl/config.c | 24 ++++---- drivers/misc/ocxl/ocxl_internal.h | 9 +-- include/misc/ocxl.h | 96 ++++++++++++------------------- 3 files changed, 55 insertions(+), 74 deletions(-) diff --git a/drivers/misc/ocxl/config.c b/drivers/misc/ocxl/config.c index c8e19bfb5ef9..a62e3d7db2bf 100644 --- a/drivers/misc/ocxl/config.c +++ b/drivers/misc/ocxl/config.c @@ -273,16 +273,16 @@ static int read_afu_info(struct pci_dev *dev, struct ocxl_fn_config *fn, } /** - * Read the template version from the AFU - * dev: the device for the AFU - * fn: the AFU offsets - * len: outputs the template length - * version: outputs the major<<8,minor version + * read_template_version() - Read the template version from the AFU + * @dev: the device for the AFU + * @fn: the AFU offsets + * @len: outputs the template length + * @version: outputs the major<<8,minor version * * Returns 0 on success, negative on failure */ static int read_template_version(struct pci_dev *dev, struct ocxl_fn_config *fn, - u16 *len, u16 *version) + u16 *len, u16 *version) { u32 val32; u8 major, minor; @@ -476,16 +476,16 @@ static int validate_afu(struct pci_dev *dev, struct ocxl_afu_config *afu) } /** - * Populate AFU metadata regarding LPC memory - * dev: the device for the AFU - * fn: the AFU offsets - * afu: the AFU struct to populate the LPC metadata into + * read_afu_lpc_memory_info() - Populate AFU metadata regarding LPC memory + * @dev: the device for the AFU + * @fn: the AFU offsets + * @afu: the AFU struct to populate the LPC metadata into * * Returns 0 on success, negative on failure */ static int read_afu_lpc_memory_info(struct pci_dev *dev, - struct ocxl_fn_config *fn, - struct ocxl_afu_config *afu) + struct ocxl_fn_config *fn, + struct ocxl_afu_config *afu) { int rc; u32 val32; diff --git a/drivers/misc/ocxl/ocxl_internal.h b/drivers/misc/ocxl/ocxl_internal.h index 345bf843a38e..198e4e4bc51d 100644 --- a/drivers/misc/ocxl/ocxl_internal.h +++ b/drivers/misc/ocxl/ocxl_internal.h @@ -122,11 +122,12 @@ int ocxl_config_check_afu_index(struct pci_dev *dev, struct ocxl_fn_config *fn, int afu_idx); /** - * Update values within a Process Element + * ocxl_link_update_pe() - Update values within a Process Element + * @link_handle: the link handle associated with the process element + * @pasid: the PASID for the AFU context + * @tid: the new thread id for the process element * - * link_handle: the link handle associated with the process element - * pasid: the PASID for the AFU context - * tid: the new thread id for the process element + * Returns 0 on success */ int ocxl_link_update_pe(void *link_handle, int pasid, __u16 tid); diff --git a/include/misc/ocxl.h b/include/misc/ocxl.h index 0a762e387418..357ef1aadbc0 100644 --- a/include/misc/ocxl.h +++ b/include/misc/ocxl.h @@ -62,8 +62,7 @@ struct ocxl_context; // Device detection & initialisation /** - * Open an OpenCAPI function on an OpenCAPI device - * + * ocxl_function_open() - Open an OpenCAPI function on an OpenCAPI device * @dev: The PCI device that contains the function * * Returns an opaque pointer to the function, or an error pointer (check with IS_ERR) @@ -71,8 +70,7 @@ struct ocxl_context; struct ocxl_fn *ocxl_function_open(struct pci_dev *dev); /** - * Get the list of AFUs associated with a PCI function device - * + * ocxl_function_afu_list() - Get the list of AFUs associated with a PCI function device * Returns a list of struct ocxl_afu * * * @fn: The OpenCAPI function containing the AFUs @@ -80,8 +78,7 @@ struct ocxl_fn *ocxl_function_open(struct pci_dev *dev); struct list_head *ocxl_function_afu_list(struct ocxl_fn *fn); /** - * Fetch an AFU instance from an OpenCAPI function - * + * ocxl_function_fetch_afu() - Fetch an AFU instance from an OpenCAPI function * @fn: The OpenCAPI function to get the AFU from * @afu_idx: The index of the AFU to get * @@ -92,23 +89,20 @@ struct list_head *ocxl_function_afu_list(struct ocxl_fn *fn); struct ocxl_afu *ocxl_function_fetch_afu(struct ocxl_fn *fn, u8 afu_idx); /** - * Take a reference to an AFU - * + * ocxl_afu_get() - Take a reference to an AFU * @afu: The AFU to increment the reference count on */ void ocxl_afu_get(struct ocxl_afu *afu); /** - * Release a reference to an AFU - * + * ocxl_afu_put() - Release a reference to an AFU * @afu: The AFU to decrement the reference count on */ void ocxl_afu_put(struct ocxl_afu *afu); /** - * Get the configuration information for an OpenCAPI function - * + * ocxl_function_config() - Get the configuration information for an OpenCAPI function * @fn: The OpenCAPI function to get the config for * * Returns the function config, or NULL on error @@ -116,8 +110,7 @@ void ocxl_afu_put(struct ocxl_afu *afu); const struct ocxl_fn_config *ocxl_function_config(struct ocxl_fn *fn); /** - * Close an OpenCAPI function - * + * ocxl_function_close() - Close an OpenCAPI function * This will free any AFUs previously retrieved from the function, and * detach and associated contexts. The contexts must by freed by the caller. * @@ -129,8 +122,7 @@ void ocxl_function_close(struct ocxl_fn *fn); // Context allocation /** - * Allocate an OpenCAPI context - * + * ocxl_context_alloc() - Allocate an OpenCAPI context * @context: The OpenCAPI context to allocate, must be freed with ocxl_context_free * @afu: The AFU the context belongs to * @mapping: The mapping to unmap when the context is closed (may be NULL) @@ -139,14 +131,13 @@ int ocxl_context_alloc(struct ocxl_context **context, struct ocxl_afu *afu, struct address_space *mapping); /** - * Free an OpenCAPI context - * + * ocxl_context_free() - Free an OpenCAPI context * @ctx: The OpenCAPI context to free */ void ocxl_context_free(struct ocxl_context *ctx); /** - * Grant access to an MM to an OpenCAPI context + * ocxl_context_attach() - Grant access to an MM to an OpenCAPI context * @ctx: The OpenCAPI context to attach * @amr: The value of the AMR register to restrict access * @mm: The mm to attach to the context @@ -157,7 +148,7 @@ int ocxl_context_attach(struct ocxl_context *ctx, u64 amr, struct mm_struct *mm); /** - * Detach an MM from an OpenCAPI context + * ocxl_context_detach() - Detach an MM from an OpenCAPI context * @ctx: The OpenCAPI context to attach * * Returns 0 on success, negative on failure @@ -167,7 +158,7 @@ int ocxl_context_detach(struct ocxl_context *ctx); // AFU IRQs /** - * Allocate an IRQ associated with an AFU context + * ocxl_afu_irq_alloc() - Allocate an IRQ associated with an AFU context * @ctx: the AFU context * @irq_id: out, the IRQ ID * @@ -176,7 +167,7 @@ int ocxl_context_detach(struct ocxl_context *ctx); int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id); /** - * Frees an IRQ associated with an AFU context + * ocxl_afu_irq_free() - Frees an IRQ associated with an AFU context * @ctx: the AFU context * @irq_id: the IRQ ID * @@ -185,7 +176,7 @@ int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id); int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id); /** - * Gets the address of the trigger page for an IRQ + * ocxl_afu_irq_get_addr() - Gets the address of the trigger page for an IRQ * This can then be provided to an AFU which will write to that * page to trigger the IRQ. * @ctx: The AFU context that the IRQ is associated with @@ -196,7 +187,7 @@ int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id); u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id); /** - * Provide a callback to be called when an IRQ is triggered + * ocxl_irq_set_handler() - Provide a callback to be called when an IRQ is triggered * @ctx: The AFU context that the IRQ is associated with * @irq_id: The IRQ ID * @handler: the callback to be called when the IRQ is triggered @@ -213,8 +204,7 @@ int ocxl_irq_set_handler(struct ocxl_context *ctx, int irq_id, // AFU Metadata /** - * Get a pointer to the config for an AFU - * + * ocxl_afu_config() - Get a pointer to the config for an AFU * @afu: a pointer to the AFU to get the config for * * Returns a pointer to the AFU config @@ -222,27 +212,24 @@ int ocxl_irq_set_handler(struct ocxl_context *ctx, int irq_id, struct ocxl_afu_config *ocxl_afu_config(struct ocxl_afu *afu); /** - * Assign opaque hardware specific information to an OpenCAPI AFU. - * - * @dev: The PCI device associated with the OpenCAPI device + * ocxl_afu_set_private() - Assign opaque hardware specific information to an OpenCAPI AFU. + * @afu: The OpenCAPI AFU * @private: the opaque hardware specific information to assign to the driver */ void ocxl_afu_set_private(struct ocxl_afu *afu, void *private); /** - * Fetch the hardware specific information associated with an external OpenCAPI - * AFU. This may be consumed by an external OpenCAPI driver. - * - * @afu: The AFU + * ocxl_afu_get_private() - Fetch the hardware specific information associated with + * an external OpenCAPI AFU. This may be consumed by an external OpenCAPI driver. + * @afu: The OpenCAPI AFU * * Returns the opaque pointer associated with the device, or NULL if not set */ -void *ocxl_afu_get_private(struct ocxl_afu *dev); +void *ocxl_afu_get_private(struct ocxl_afu *afu); // Global MMIO /** - * Read a 32 bit value from global MMIO - * + * ocxl_global_mmio_read32() - Read a 32 bit value from global MMIO * @afu: The AFU * @offset: The Offset from the start of MMIO * @endian: the endianness that the MMIO data is in @@ -251,11 +238,10 @@ void *ocxl_afu_get_private(struct ocxl_afu *dev); * Returns 0 for success, negative on error */ int ocxl_global_mmio_read32(struct ocxl_afu *afu, size_t offset, - enum ocxl_endian endian, u32 *val); + enum ocxl_endian endian, u32 *val); /** - * Read a 64 bit value from global MMIO - * + * ocxl_global_mmio_read64() - Read a 64 bit value from global MMIO * @afu: The AFU * @offset: The Offset from the start of MMIO * @endian: the endianness that the MMIO data is in @@ -264,11 +250,10 @@ int ocxl_global_mmio_read32(struct ocxl_afu *afu, size_t offset, * Returns 0 for success, negative on error */ int ocxl_global_mmio_read64(struct ocxl_afu *afu, size_t offset, - enum ocxl_endian endian, u64 *val); + enum ocxl_endian endian, u64 *val); /** - * Write a 32 bit value to global MMIO - * + * ocxl_global_mmio_write32() - Write a 32 bit value to global MMIO * @afu: The AFU * @offset: The Offset from the start of MMIO * @endian: the endianness that the MMIO data is in @@ -277,11 +262,10 @@ int ocxl_global_mmio_read64(struct ocxl_afu *afu, size_t offset, * Returns 0 for success, negative on error */ int ocxl_global_mmio_write32(struct ocxl_afu *afu, size_t offset, - enum ocxl_endian endian, u32 val); + enum ocxl_endian endian, u32 val); /** - * Write a 64 bit value to global MMIO - * + * ocxl_global_mmio_write64() - Write a 64 bit value to global MMIO * @afu: The AFU * @offset: The Offset from the start of MMIO * @endian: the endianness that the MMIO data is in @@ -290,11 +274,10 @@ int ocxl_global_mmio_write32(struct ocxl_afu *afu, size_t offset, * Returns 0 for success, negative on error */ int ocxl_global_mmio_write64(struct ocxl_afu *afu, size_t offset, - enum ocxl_endian endian, u64 val); + enum ocxl_endian endian, u64 val); /** - * Set bits in a 32 bit global MMIO register - * + * ocxl_global_mmio_set32() - Set bits in a 32 bit global MMIO register * @afu: The AFU * @offset: The Offset from the start of MMIO * @endian: the endianness that the MMIO data is in @@ -303,11 +286,10 @@ int ocxl_global_mmio_write64(struct ocxl_afu *afu, size_t offset, * Returns 0 for success, negative on error */ int ocxl_global_mmio_set32(struct ocxl_afu *afu, size_t offset, - enum ocxl_endian endian, u32 mask); + enum ocxl_endian endian, u32 mask); /** - * Set bits in a 64 bit global MMIO register - * + * ocxl_global_mmio_set64() - Set bits in a 64 bit global MMIO register * @afu: The AFU * @offset: The Offset from the start of MMIO * @endian: the endianness that the MMIO data is in @@ -316,11 +298,10 @@ int ocxl_global_mmio_set32(struct ocxl_afu *afu, size_t offset, * Returns 0 for success, negative on error */ int ocxl_global_mmio_set64(struct ocxl_afu *afu, size_t offset, - enum ocxl_endian endian, u64 mask); + enum ocxl_endian endian, u64 mask); /** - * Set bits in a 32 bit global MMIO register - * + * ocxl_global_mmio_clear32() - Set bits in a 32 bit global MMIO register * @afu: The AFU * @offset: The Offset from the start of MMIO * @endian: the endianness that the MMIO data is in @@ -329,11 +310,10 @@ int ocxl_global_mmio_set64(struct ocxl_afu *afu, size_t offset, * Returns 0 for success, negative on error */ int ocxl_global_mmio_clear32(struct ocxl_afu *afu, size_t offset, - enum ocxl_endian endian, u32 mask); + enum ocxl_endian endian, u32 mask); /** - * Set bits in a 64 bit global MMIO register - * + * ocxl_global_mmio_clear64() - Set bits in a 64 bit global MMIO register * @afu: The AFU * @offset: The Offset from the start of MMIO * @endian: the endianness that the MMIO data is in @@ -342,7 +322,7 @@ int ocxl_global_mmio_clear32(struct ocxl_afu *afu, size_t offset, * Returns 0 for success, negative on error */ int ocxl_global_mmio_clear64(struct ocxl_afu *afu, size_t offset, - enum ocxl_endian endian, u64 mask); + enum ocxl_endian endian, u64 mask); // Functions left here are for compatibility with the cxlflash driver From patchwork Fri Feb 21 03:26:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395347 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 109231395 for ; Fri, 21 Feb 2020 03:28:30 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EC7A2208E4 for ; Fri, 21 Feb 2020 03:28:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EC7A2208E4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 6F2F710FC3612; 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Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva Tally up the LPC memory on an OpenCAPI link & allow it to be mapped Signed-off-by: Alastair D'Silva --- drivers/misc/ocxl/core.c | 10 ++++++ drivers/misc/ocxl/link.c | 53 +++++++++++++++++++++++++++++++ drivers/misc/ocxl/ocxl_internal.h | 33 +++++++++++++++++++ 3 files changed, 96 insertions(+) diff --git a/drivers/misc/ocxl/core.c b/drivers/misc/ocxl/core.c index b7a09b21ab36..2531c6cf19a0 100644 --- a/drivers/misc/ocxl/core.c +++ b/drivers/misc/ocxl/core.c @@ -230,8 +230,18 @@ static int configure_afu(struct ocxl_afu *afu, u8 afu_idx, struct pci_dev *dev) if (rc) goto err_free_pasid; + if (afu->config.lpc_mem_size || afu->config.special_purpose_mem_size) { + rc = ocxl_link_add_lpc_mem(afu->fn->link, afu->config.lpc_mem_offset, + afu->config.lpc_mem_size + + afu->config.special_purpose_mem_size); + if (rc) + goto err_free_mmio; + } + return 0; +err_free_mmio: + unmap_mmio_areas(afu); err_free_pasid: reclaim_afu_pasid(afu); err_free_actag: diff --git a/drivers/misc/ocxl/link.c b/drivers/misc/ocxl/link.c index 58d111afd9f6..1e039cc5ebe5 100644 --- a/drivers/misc/ocxl/link.c +++ b/drivers/misc/ocxl/link.c @@ -84,6 +84,11 @@ struct ocxl_link { int dev; atomic_t irq_available; struct spa *spa; + struct mutex lpc_mem_lock; /* protects lpc_mem & lpc_mem_sz */ + u64 lpc_mem_sz; /* Total amount of LPC memory presented on the link */ + u64 lpc_mem; + int lpc_consumers; + void *platform_data; }; static struct list_head links_list = LIST_HEAD_INIT(links_list); @@ -396,6 +401,8 @@ static int alloc_link(struct pci_dev *dev, int PE_mask, struct ocxl_link **out_l if (rc) goto err_spa; + mutex_init(&link->lpc_mem_lock); + /* platform specific hook */ rc = pnv_ocxl_spa_setup(dev, link->spa->spa_mem, PE_mask, &link->platform_data); @@ -711,3 +718,49 @@ void ocxl_link_free_irq(void *link_handle, int hw_irq) atomic_inc(&link->irq_available); } EXPORT_SYMBOL_GPL(ocxl_link_free_irq); + +int ocxl_link_add_lpc_mem(void *link_handle, u64 offset, u64 size) +{ + struct ocxl_link *link = (struct ocxl_link *) link_handle; + + // Check for overflow + if (offset > (offset + size)) + return -EINVAL; + + mutex_lock(&link->lpc_mem_lock); + link->lpc_mem_sz = max(link->lpc_mem_sz, offset + size); + + mutex_unlock(&link->lpc_mem_lock); + + return 0; +} + +u64 ocxl_link_lpc_map(void *link_handle, struct pci_dev *pdev) +{ + struct ocxl_link *link = (struct ocxl_link *) link_handle; + + mutex_lock(&link->lpc_mem_lock); + + if(!link->lpc_mem) + link->lpc_mem = pnv_ocxl_platform_lpc_setup(pdev, link->lpc_mem_sz); + + if(link->lpc_mem) + link->lpc_consumers++; + mutex_unlock(&link->lpc_mem_lock); + + return link->lpc_mem; +} + +void ocxl_link_lpc_release(void *link_handle, struct pci_dev *pdev) +{ + struct ocxl_link *link = (struct ocxl_link *) link_handle; + + mutex_lock(&link->lpc_mem_lock); + WARN_ON(--link->lpc_consumers < 0); + if (link->lpc_consumers == 0) { + pnv_ocxl_platform_lpc_release(pdev); + link->lpc_mem = 0; + } + + mutex_unlock(&link->lpc_mem_lock); +} diff --git a/drivers/misc/ocxl/ocxl_internal.h b/drivers/misc/ocxl/ocxl_internal.h index 198e4e4bc51d..d0c8c4838f42 100644 --- a/drivers/misc/ocxl/ocxl_internal.h +++ b/drivers/misc/ocxl/ocxl_internal.h @@ -142,4 +142,37 @@ int ocxl_irq_offset_to_id(struct ocxl_context *ctx, u64 offset); u64 ocxl_irq_id_to_offset(struct ocxl_context *ctx, int irq_id); void ocxl_afu_irq_free_all(struct ocxl_context *ctx); +/** + * ocxl_link_add_lpc_mem() - Increment the amount of memory required by an OpenCAPI link + * + * @link_handle: The OpenCAPI link handle + * @offset: The offset of the memory to add + * @size: The amount of memory to increment by + * + * Returns 0 on success, negative on overflow + */ +int ocxl_link_add_lpc_mem(void *link_handle, u64 offset, u64 size); + +/** + * ocxl_link_lpc_map() - Map the LPC memory for an OpenCAPI device + * Since LPC memory belongs to a link, the whole LPC memory available + * on the link must be mapped in order to make it accessible to a device. + * @link_handle: The OpenCAPI link handle + * @pdev: A device that is on the link + * + * Returns the address of the mapped LPC memory, or 0 on error + */ +u64 ocxl_link_lpc_map(void *link_handle, struct pci_dev *pdev); + +/** + * ocxl_link_lpc_release() - Release the LPC memory device for an OpenCAPI device + * + * Offlines LPC memory on an OpenCAPI link for a device. If this is the + * last device on the link to release the memory, unmap it from the link. + * + * @link_handle: The OpenCAPI link handle + * @pdev: A device that is on the link + */ +void ocxl_link_lpc_release(void *link_handle, struct pci_dev *pdev); + #endif /* _OCXL_INTERNAL_H_ */ From patchwork Fri Feb 21 03:27:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395345 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 84142159A for ; Fri, 21 Feb 2020 03:28:28 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6CBF324653 for ; Fri, 21 Feb 2020 03:28:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6CBF324653 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 4F19A10FC361C; Thu, 20 Feb 2020 19:29:16 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CF55D10FC360B for ; Thu, 20 Feb 2020 19:29:12 -0800 (PST) Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3KI2v104777 for ; Thu, 20 Feb 2020 22:28:19 -0500 Received: from e06smtp02.uk.ibm.com (e06smtp02.uk.ibm.com [195.75.94.98]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y8ubqh1hv-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:19 -0500 Received: from localhost by e06smtp02.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:10 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S9Kg59768916 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:09 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 928ADAE045; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E7655AE051; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id EEA46A03B7; Fri, 21 Feb 2020 14:28:02 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 07/27] ocxl: Add functions to map/unmap LPC memory Date: Fri, 21 Feb 2020 14:27:00 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0008-0000-0000-00000354F599 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0009-0000-0000-00004A76073A Message-Id: <20200221032720.33893-8-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 priorityscore=1501 suspectscore=1 spamscore=0 bulkscore=0 impostorscore=0 mlxlogscore=808 lowpriorityscore=0 malwarescore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: UGQZZ7SKWWTRVLDNO7ONZJ7YSBM257AS X-Message-ID-Hash: UGQZZ7SKWWTRVLDNO7ONZJ7YSBM257AS X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . 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Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva Add functions to map/unmap LPC memory Signed-off-by: Alastair D'Silva Acked-by: Frederic Barrat --- drivers/misc/ocxl/core.c | 51 +++++++++++++++++++++++++++++++ drivers/misc/ocxl/ocxl_internal.h | 3 ++ include/misc/ocxl.h | 21 +++++++++++++ 3 files changed, 75 insertions(+) diff --git a/drivers/misc/ocxl/core.c b/drivers/misc/ocxl/core.c index 2531c6cf19a0..75ff14e3882a 100644 --- a/drivers/misc/ocxl/core.c +++ b/drivers/misc/ocxl/core.c @@ -210,6 +210,56 @@ static void unmap_mmio_areas(struct ocxl_afu *afu) release_fn_bar(afu->fn, afu->config.global_mmio_bar); } +int ocxl_afu_map_lpc_mem(struct ocxl_afu *afu) +{ + struct pci_dev *dev = to_pci_dev(afu->fn->dev.parent); + + if ((afu->config.lpc_mem_size + afu->config.special_purpose_mem_size) == 0) + return 0; + + afu->lpc_base_addr = ocxl_link_lpc_map(afu->fn->link, dev); + if (afu->lpc_base_addr == 0) + return -EINVAL; + + if (afu->config.lpc_mem_size > 0) { + afu->lpc_res.start = afu->lpc_base_addr + afu->config.lpc_mem_offset; + afu->lpc_res.end = afu->lpc_res.start + afu->config.lpc_mem_size - 1; + } + + if (afu->config.special_purpose_mem_size > 0) { + afu->special_purpose_res.start = afu->lpc_base_addr + + afu->config.special_purpose_mem_offset; + afu->special_purpose_res.end = afu->special_purpose_res.start + + afu->config.special_purpose_mem_size - 1; + } + + return 0; +} +EXPORT_SYMBOL_GPL(ocxl_afu_map_lpc_mem); + +struct resource *ocxl_afu_lpc_mem(struct ocxl_afu *afu) +{ + return &afu->lpc_res; +} +EXPORT_SYMBOL_GPL(ocxl_afu_lpc_mem); + +static void unmap_lpc_mem(struct ocxl_afu *afu) +{ + struct pci_dev *dev = to_pci_dev(afu->fn->dev.parent); + + if (afu->lpc_res.start || afu->special_purpose_res.start) { + void *link = afu->fn->link; + + // only release the link when the the last consumer calls release + ocxl_link_lpc_release(link, dev); + + afu->lpc_res.start = 0; + afu->lpc_res.end = 0; + afu->special_purpose_res.start = 0; + afu->special_purpose_res.end = 0; + } +} + static int configure_afu(struct ocxl_afu *afu, u8 afu_idx, struct pci_dev *dev) { int rc; @@ -251,6 +301,7 @@ static int configure_afu(struct ocxl_afu *afu, u8 afu_idx, struct pci_dev *dev) static void deconfigure_afu(struct ocxl_afu *afu) { + unmap_lpc_mem(afu); unmap_mmio_areas(afu); reclaim_afu_pasid(afu); reclaim_afu_actag(afu); diff --git a/drivers/misc/ocxl/ocxl_internal.h b/drivers/misc/ocxl/ocxl_internal.h index d0c8c4838f42..ce0cac1da416 100644 --- a/drivers/misc/ocxl/ocxl_internal.h +++ b/drivers/misc/ocxl/ocxl_internal.h @@ -52,6 +52,9 @@ struct ocxl_afu { void __iomem *global_mmio_ptr; u64 pp_mmio_start; void *private; + u64 lpc_base_addr; /* Covers both LPC & special purpose memory */ + struct resource lpc_res; + struct resource special_purpose_res; }; enum ocxl_context_status { diff --git a/include/misc/ocxl.h b/include/misc/ocxl.h index 357ef1aadbc0..d8b0b4d46bfb 100644 --- a/include/misc/ocxl.h +++ b/include/misc/ocxl.h @@ -203,6 +203,27 @@ int ocxl_irq_set_handler(struct ocxl_context *ctx, int irq_id, // AFU Metadata +/** + * ocxl_afu_map_lpc_mem() - Map the LPC system & special purpose memory for an AFU + * Do not call this during device discovery, as there may me multiple + * devices on a link, and the memory is mapped for the whole link, not + * just one device. It should only be called after all devices have + * registered their memory on the link. + * + * @afu: The AFU that has the LPC memory to map + * + * Returns 0 on success, negative on failure + */ +int ocxl_afu_map_lpc_mem(struct ocxl_afu *afu); + +/** + * ocxl_afu_lpc_mem() - Get the physical address range of LPC memory for an AFU + * @afu: The AFU associated with the LPC memory + * + * Returns a pointer to the resource struct for the physical address range + */ +struct resource *ocxl_afu_lpc_mem(struct ocxl_afu *afu); + /** * ocxl_afu_config() - Get a pointer to the config for an AFU * @afu: a pointer to the AFU to get the config for From patchwork Fri Feb 21 03:27:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395369 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C55911395 for ; Fri, 21 Feb 2020 03:28:38 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ADEED208E4 for ; Fri, 21 Feb 2020 03:28:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ADEED208E4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 5827210FC3632; Thu, 20 Feb 2020 19:29:20 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 46ADD10FC3618 for ; Thu, 20 Feb 2020 19:29:15 -0800 (PST) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3KPpp091325 for ; Thu, 20 Feb 2020 22:28:22 -0500 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0b-001b2d01.pphosted.com with ESMTP id 2y8uc09th0-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:22 -0500 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:10 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S9bV59768912 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:09 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 41E0EAE058; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E8A25AE057; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 0E4E7A03BA; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 08/27] ocxl: Emit a log message showing how much LPC memory was detected Date: Fri, 21 Feb 2020 14:27:01 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0012-0000-0000-00000388D1CD X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0013-0000-0000-000021C56A6D Message-Id: <20200221032720.33893-9-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 clxscore=1015 malwarescore=0 adultscore=0 mlxlogscore=574 spamscore=0 suspectscore=1 mlxscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: TYVJWD43VCJSB6YVEEMJS6W2TPJVWALN X-Message-ID-Hash: TYVJWD43VCJSB6YVEEMJS6W2TPJVWALN X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch emits a message showing how much LPC memory & special purpose memory was detected on an OCXL device. Signed-off-by: Alastair D'Silva Acked-by: Andrew Donnellan Acked-by: Frederic Barrat --- drivers/misc/ocxl/config.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/misc/ocxl/config.c b/drivers/misc/ocxl/config.c index a62e3d7db2bf..701ae6216abf 100644 --- a/drivers/misc/ocxl/config.c +++ b/drivers/misc/ocxl/config.c @@ -568,6 +568,10 @@ static int read_afu_lpc_memory_info(struct pci_dev *dev, afu->special_purpose_mem_size = total_mem_size - lpc_mem_size; } + + dev_info(&dev->dev, "Probed LPC memory of %#llx bytes and special purpose memory of %#llx bytes\n", + afu->lpc_mem_size, afu->special_purpose_mem_size); + return 0; } From patchwork Fri Feb 21 03:27:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395351 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 715A41580 for ; Fri, 21 Feb 2020 03:28:31 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 593E824653 for ; Fri, 21 Feb 2020 03:28:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 593E824653 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 87DB810FC3621; Thu, 20 Feb 2020 19:29:16 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.158.5; helo=mx0b-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 45D4610FC360A for ; Thu, 20 Feb 2020 19:29:14 -0800 (PST) Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3K7WC028505 for ; Thu, 20 Feb 2020 22:28:21 -0500 Received: from e06smtp05.uk.ibm.com (e06smtp05.uk.ibm.com [195.75.94.101]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y92xf23j5-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:21 -0500 Received: from localhost by e06smtp05.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:10 -0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S9Ri55246940 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:09 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 93551A4054; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E9DEAA405B; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 16532A03BB; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 09/27] ocxl: Save the device serial number in ocxl_fn Date: Fri, 21 Feb 2020 14:27:02 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0020-0000-0000-000003AC220F X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0021-0000-0000-000022042A32 Message-Id: <20200221032720.33893-10-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 bulkscore=0 spamscore=0 suspectscore=1 malwarescore=0 priorityscore=1501 impostorscore=0 mlxlogscore=462 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: CSDYAH3TVZAWEQOLNGBJLVYRY25PDWPT X-Message-ID-Hash: CSDYAH3TVZAWEQOLNGBJLVYRY25PDWPT X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch retrieves the serial number of the card and makes it available to consumers of the ocxl driver via the ocxl_fn struct. Signed-off-by: Alastair D'Silva Acked-by: Frederic Barrat Acked-by: Andrew Donnellan --- drivers/misc/ocxl/config.c | 46 ++++++++++++++++++++++++++++++++++++++ include/misc/ocxl.h | 1 + 2 files changed, 47 insertions(+) diff --git a/drivers/misc/ocxl/config.c b/drivers/misc/ocxl/config.c index 701ae6216abf..ce33fafa7b50 100644 --- a/drivers/misc/ocxl/config.c +++ b/drivers/misc/ocxl/config.c @@ -71,6 +71,51 @@ static int find_dvsec_afu_ctrl(struct pci_dev *dev, u8 afu_idx) return 0; } +/** + * get_function_0() - Find a related PCI device (function 0) + * @device: PCI device to match + * + * Returns a pointer to the related device, or null if not found + */ +static struct pci_dev *get_function_0(struct pci_dev *dev) +{ + unsigned int devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0); + + return pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), + dev->bus->number, devfn); +} + +static void read_serial(struct pci_dev *dev, struct ocxl_fn_config *fn) +{ + u32 low, high; + int pos; + + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DSN); + if (pos) { + pci_read_config_dword(dev, pos + 0x04, &low); + pci_read_config_dword(dev, pos + 0x08, &high); + + fn->serial = low | ((u64)high) << 32; + + return; + } + + if (PCI_FUNC(dev->devfn) != 0) { + struct pci_dev *related = get_function_0(dev); + + if (!related) { + fn->serial = 0; + return; + } + + read_serial(related, fn); + pci_dev_put(related); + return; + } + + fn->serial = 0; +} + static void read_pasid(struct pci_dev *dev, struct ocxl_fn_config *fn) { u16 val; @@ -208,6 +253,7 @@ int ocxl_config_read_function(struct pci_dev *dev, struct ocxl_fn_config *fn) int rc; read_pasid(dev, fn); + read_serial(dev, fn); rc = read_dvsec_tl(dev, fn); if (rc) { diff --git a/include/misc/ocxl.h b/include/misc/ocxl.h index d8b0b4d46bfb..b8514dc64bd0 100644 --- a/include/misc/ocxl.h +++ b/include/misc/ocxl.h @@ -46,6 +46,7 @@ struct ocxl_fn_config { int dvsec_afu_info_pos; /* offset of the AFU information DVSEC */ s8 max_pasid_log; s8 max_afu_index; + u64 serial; }; enum ocxl_endian { From patchwork Fri Feb 21 03:27:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395363 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D3B401395 for ; Fri, 21 Feb 2020 03:28:35 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BC179222C4 for ; Fri, 21 Feb 2020 03:28:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BC179222C4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 1969110FC361D; Thu, 20 Feb 2020 19:29:19 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 46AAA10FC3606 for ; Thu, 20 Feb 2020 19:29:15 -0800 (PST) Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3KC2I143889 for ; Thu, 20 Feb 2020 22:28:22 -0500 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y8ubc195p-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:22 -0500 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:10 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S9pC48693446 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:09 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9990811C05B; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EA29011C04A; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:08 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 1E591A03BC; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 10/27] powerpc: Add driver for OpenCAPI Persistent Memory Date: Fri, 21 Feb 2020 14:27:03 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0012-0000-0000-00000388D1CE X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0013-0000-0000-000021C56A6E Message-Id: <20200221032720.33893-11-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 phishscore=0 adultscore=0 mlxscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxlogscore=999 suspectscore=4 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: RHJYF2PZHX5WTLVG75YIXWRDCBIP76JZ X-Message-ID-Hash: RHJYF2PZHX5WTLVG75YIXWRDCBIP76JZ X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This driver exposes LPC memory on OpenCAPI pmem cards as an NVDIMM, allowing the existing nvram infrastructure to be used. Namespace metadata is stored on the media itself, so scm_reserve_metadata() maps 1 section's worth of PMEM storage at the start to hold this. The rest of the PMEM range is registered with libnvdimm as an nvdimm. scm_ndctl_config_read/write/size() provide callbacks to libnvdimm to access the metadata. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/Kconfig | 3 + arch/powerpc/platforms/powernv/Makefile | 1 + arch/powerpc/platforms/powernv/pmem/Kconfig | 15 + arch/powerpc/platforms/powernv/pmem/Makefile | 7 + arch/powerpc/platforms/powernv/pmem/ocxl.c | 473 ++++++++++++++++++ .../platforms/powernv/pmem/ocxl_internal.h | 28 ++ 6 files changed, 527 insertions(+) create mode 100644 arch/powerpc/platforms/powernv/pmem/Kconfig create mode 100644 arch/powerpc/platforms/powernv/pmem/Makefile create mode 100644 arch/powerpc/platforms/powernv/pmem/ocxl.c create mode 100644 arch/powerpc/platforms/powernv/pmem/ocxl_internal.h diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig index 938803eab0ad..fc8976af0e52 100644 --- a/arch/powerpc/platforms/powernv/Kconfig +++ b/arch/powerpc/platforms/powernv/Kconfig @@ -50,3 +50,6 @@ config PPC_VAS config SCOM_DEBUGFS bool "Expose SCOM controllers via debugfs" depends on DEBUG_FS + +source "arch/powerpc/platforms/powernv/pmem/Kconfig" + diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile index c0f8120045c3..0bbd72988b6f 100644 --- a/arch/powerpc/platforms/powernv/Makefile +++ b/arch/powerpc/platforms/powernv/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_PPC_VAS) += vas.o vas-window.o vas-debug.o obj-$(CONFIG_OCXL_BASE) += ocxl.o obj-$(CONFIG_SCOM_DEBUGFS) += opal-xscom.o obj-$(CONFIG_PPC_SECURE_BOOT) += opal-secvar.o +obj-$(CONFIG_LIBNVDIMM) += pmem/ diff --git a/arch/powerpc/platforms/powernv/pmem/Kconfig b/arch/powerpc/platforms/powernv/pmem/Kconfig new file mode 100644 index 000000000000..c5d927520920 --- /dev/null +++ b/arch/powerpc/platforms/powernv/pmem/Kconfig @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0-only +if LIBNVDIMM + +config OCXL_PMEM + tristate "OpenCAPI Persistent Memory" + depends on LIBNVDIMM && PPC_POWERNV && PCI && EEH && ZONE_DEVICE && OCXL + help + Exposes devices that implement the OpenCAPI Storage Class Memory + specification as persistent memory regions. You may also want + DEV_DAX, DEV_DAX_PMEM & FS_DAX if you plan on using DAX devices + stacked on top of this driver. + + Select N if unsure. + +endif diff --git a/arch/powerpc/platforms/powernv/pmem/Makefile b/arch/powerpc/platforms/powernv/pmem/Makefile new file mode 100644 index 000000000000..1c55c4193175 --- /dev/null +++ b/arch/powerpc/platforms/powernv/pmem/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 + +ccflags-$(CONFIG_PPC_WERROR) += -Werror + +obj-$(CONFIG_OCXL_PMEM) += ocxlpmem.o + +ocxlpmem-y := ocxl.o diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c new file mode 100644 index 000000000000..3c4eeb5dcc0f --- /dev/null +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -0,0 +1,473 @@ +// SPDX-License-Id +// Copyright 2019 IBM Corp. + +/* + * A driver for OpenCAPI devices that implement the Storage Class + * Memory specification. + */ + +#include +#include +#include +#include +#include +#include "ocxl_internal.h" + + +static const struct pci_device_id ocxlpmem_pci_tbl[] = { + { PCI_DEVICE(PCI_VENDOR_ID_IBM, 0x0625), }, + { } +}; + +MODULE_DEVICE_TABLE(pci, ocxlpmem_pci_tbl); + +#define NUM_MINORS 256 // Total to reserve + +static dev_t ocxlpmem_dev; +static struct class *ocxlpmem_class; +static struct mutex minors_idr_lock; +static struct idr minors_idr; + +/** + * ndctl_config_write() - Handle a ND_CMD_SET_CONFIG_DATA command from ndctl + * @ocxlpmem: the device metadata + * @command: the incoming data to write + * Return: 0 on success, negative on failure + */ +static int ndctl_config_write(struct ocxlpmem *ocxlpmem, + struct nd_cmd_set_config_hdr *command) +{ + if (command->in_offset + command->in_length > LABEL_AREA_SIZE) + return -EINVAL; + + memcpy_flushcache(ocxlpmem->metadata_addr + command->in_offset, command->in_buf, + command->in_length); + + return 0; +} + +/** + * ndctl_config_read() - Handle a ND_CMD_GET_CONFIG_DATA command from ndctl + * @ocxlpmem: the device metadata + * @command: the read request + * Return: 0 on success, negative on failure + */ +static int ndctl_config_read(struct ocxlpmem *ocxlpmem, + struct nd_cmd_get_config_data_hdr *command) +{ + if (command->in_offset + command->in_length > LABEL_AREA_SIZE) + return -EINVAL; + + memcpy_mcsafe(command->out_buf, ocxlpmem->metadata_addr + command->in_offset, + command->in_length); + + return 0; +} + +/** + * ndctl_config_size() - Handle a ND_CMD_GET_CONFIG_SIZE command from ndctl + * @command: the read request + * Return: 0 on success, negative on failure + */ +static int ndctl_config_size(struct nd_cmd_get_config_size *command) +{ + command->status = 0; + command->config_size = LABEL_AREA_SIZE; + command->max_xfer = PAGE_SIZE; + + return 0; +} + +static int ndctl(struct nvdimm_bus_descriptor *nd_desc, + struct nvdimm *nvdimm, + unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) +{ + struct ocxlpmem *ocxlpmem = container_of(nd_desc, struct ocxlpmem, bus_desc); + + switch (cmd) { + case ND_CMD_GET_CONFIG_SIZE: + *cmd_rc = ndctl_config_size(buf); + return 0; + + case ND_CMD_GET_CONFIG_DATA: + *cmd_rc = ndctl_config_read(ocxlpmem, buf); + return 0; + + case ND_CMD_SET_CONFIG_DATA: + *cmd_rc = ndctl_config_write(ocxlpmem, buf); + return 0; + + default: + return -ENOTTY; + } +} + +/** + * reserve_metadata() - Reserve space for nvdimm metadata + * @ocxlpmem: the device metadata + * @lpc_mem: The resource representing the LPC memory of the OpenCAPI device + */ +static int reserve_metadata(struct ocxlpmem *ocxlpmem, + struct resource *lpc_mem) +{ + ocxlpmem->metadata_addr = devm_memremap(&ocxlpmem->dev, lpc_mem->start, + LABEL_AREA_SIZE, MEMREMAP_WB); + if (IS_ERR(ocxlpmem->metadata_addr)) + return PTR_ERR(ocxlpmem->metadata_addr); + + return 0; +} + +/** + * register_lpc_mem() - Discover persistent memory on a device and register it with the NVDIMM subsystem + * @ocxlpmem: the device metadata + * Return: 0 on success + */ +static int register_lpc_mem(struct ocxlpmem *ocxlpmem) +{ + struct nd_region_desc region_desc; + struct nd_mapping_desc nd_mapping_desc; + struct resource *lpc_mem; + const struct ocxl_afu_config *config; + const struct ocxl_fn_config *fn_config; + int rc; + unsigned long nvdimm_cmd_mask = 0; + unsigned long nvdimm_flags = 0; + int target_node; + char serial[16+1]; + + // Set up the reserved metadata area + rc = ocxl_afu_map_lpc_mem(ocxlpmem->ocxl_afu); + if (rc < 0) + return rc; + + lpc_mem = ocxl_afu_lpc_mem(ocxlpmem->ocxl_afu); + if (lpc_mem == NULL || lpc_mem->start == 0) + return -EINVAL; + + config = ocxl_afu_config(ocxlpmem->ocxl_afu); + fn_config = ocxl_function_config(ocxlpmem->ocxl_fn); + + rc = reserve_metadata(ocxlpmem, lpc_mem); + if (rc) + return rc; + + ocxlpmem->bus_desc.provider_name = "ocxl-pmem"; + ocxlpmem->bus_desc.ndctl = ndctl; + ocxlpmem->bus_desc.module = THIS_MODULE; + + ocxlpmem->nvdimm_bus = nvdimm_bus_register(&ocxlpmem->dev, + &ocxlpmem->bus_desc); + if (!ocxlpmem->nvdimm_bus) + return -EINVAL; + + ocxlpmem->pmem_res.start = (u64)lpc_mem->start + LABEL_AREA_SIZE; + ocxlpmem->pmem_res.end = (u64)lpc_mem->start + config->lpc_mem_size - 1; + ocxlpmem->pmem_res.name = "OpenCAPI persistent memory"; + + set_bit(ND_CMD_GET_CONFIG_SIZE, &nvdimm_cmd_mask); + set_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm_cmd_mask); + set_bit(ND_CMD_SET_CONFIG_DATA, &nvdimm_cmd_mask); + + set_bit(NDD_ALIASING, &nvdimm_flags); + + snprintf(serial, sizeof(serial), "%llx", fn_config->serial); + nd_mapping_desc.nvdimm = nvdimm_create(ocxlpmem->nvdimm_bus, ocxlpmem, + NULL, nvdimm_flags, nvdimm_cmd_mask, + 0, NULL); + if (!nd_mapping_desc.nvdimm) + return -ENOMEM; + + if (nvdimm_bus_check_dimm_count(ocxlpmem->nvdimm_bus, 1)) + return -EINVAL; + + nd_mapping_desc.start = ocxlpmem->pmem_res.start; + nd_mapping_desc.size = resource_size(&ocxlpmem->pmem_res); + nd_mapping_desc.position = 0; + + ocxlpmem->nd_set.cookie1 = fn_config->serial + 1; // allow for empty serial + ocxlpmem->nd_set.cookie2 = fn_config->serial + 1; + + target_node = of_node_to_nid(ocxlpmem->pdev->dev.of_node); + + memset(®ion_desc, 0, sizeof(region_desc)); + region_desc.res = &ocxlpmem->pmem_res; + region_desc.numa_node = NUMA_NO_NODE; + region_desc.target_node = target_node; + region_desc.num_mappings = 1; + region_desc.mapping = &nd_mapping_desc; + region_desc.nd_set = &ocxlpmem->nd_set; + + set_bit(ND_REGION_PAGEMAP, ®ion_desc.flags); + /* + * NB: libnvdimm copies the data from ndr_desc into it's own + * structures so passing a stack pointer is fine. + */ + ocxlpmem->nd_region = nvdimm_pmem_region_create(ocxlpmem->nvdimm_bus, + ®ion_desc); + if (!ocxlpmem->nd_region) + return -EINVAL; + + dev_info(&ocxlpmem->dev, + "Onlining %lluMB of persistent memory\n", + nd_mapping_desc.size / SZ_1M); + + return 0; +} + +/** + * allocate_minor() - Allocate a minor number to use for an OpenCAPI pmem device + * @ocxlpmem: the device metadata + * Return: the allocated minor number + */ +static int allocate_minor(struct ocxlpmem *ocxlpmem) +{ + int minor; + + mutex_lock(&minors_idr_lock); + minor = idr_alloc(&minors_idr, ocxlpmem, 0, NUM_MINORS, GFP_KERNEL); + mutex_unlock(&minors_idr_lock); + return minor; +} + +static void free_minor(struct ocxlpmem *ocxlpmem) +{ + mutex_lock(&minors_idr_lock); + idr_remove(&minors_idr, MINOR(ocxlpmem->dev.devt)); + mutex_unlock(&minors_idr_lock); +} + +/** + * free_ocxlpmem() - Free all members of an ocxlpmem struct + * @ocxlpmem: the device struct to clear + */ +static void free_ocxlpmem(struct ocxlpmem *ocxlpmem) +{ + int rc; + + if (ocxlpmem->nvdimm_bus) + nvdimm_bus_unregister(ocxlpmem->nvdimm_bus); + + free_minor(ocxlpmem); + + if (ocxlpmem->metadata_addr) + devm_memunmap(&ocxlpmem->dev, ocxlpmem->metadata_addr); + + if (ocxlpmem->ocxl_context) { + rc = ocxl_context_detach(ocxlpmem->ocxl_context); + if (rc == -EBUSY) + dev_warn(&ocxlpmem->dev, "Timeout detaching ocxl context\n"); + else + ocxl_context_free(ocxlpmem->ocxl_context); + + } + + if (ocxlpmem->ocxl_afu) + ocxl_afu_put(ocxlpmem->ocxl_afu); + + if (ocxlpmem->ocxl_fn) + ocxl_function_close(ocxlpmem->ocxl_fn); + + kfree(ocxlpmem); +} + +/** + * free_ocxlpmem_dev() - Free an OpenCAPI persistent memory device + * @dev: The device struct + */ +static void free_ocxlpmem_dev(struct device *dev) +{ + struct ocxlpmem *ocxlpmem = container_of(dev, struct ocxlpmem, dev); + + free_ocxlpmem(ocxlpmem); +} + +/** + * ocxlpmem_register() - Register an OpenCAPI pmem device with the kernel + * @ocxlpmem: the device metadata + * Return: 0 on success, negative on failure + */ +static int ocxlpmem_register(struct ocxlpmem *ocxlpmem) +{ + int rc; + int minor = allocate_minor(ocxlpmem); + + if (minor < 0) + return minor; + + ocxlpmem->dev.release = free_ocxlpmem_dev; + rc = dev_set_name(&ocxlpmem->dev, "ocxlpmem%d", minor); + if (rc < 0) + return rc; + + ocxlpmem->dev.devt = MKDEV(MAJOR(ocxlpmem_dev), minor); + ocxlpmem->dev.class = ocxlpmem_class; + ocxlpmem->dev.parent = &ocxlpmem->pdev->dev; + + return device_register(&ocxlpmem->dev); +} + +/** + * ocxlpmem_remove() - Free an OpenCAPI persistent memory device + * @pdev: the PCI device information struct + */ +static void ocxlpmem_remove(struct pci_dev *pdev) +{ + if (PCI_FUNC(pdev->devfn) == 0) { + struct ocxlpmem_function0 *func0 = pci_get_drvdata(pdev); + + if (func0) { + ocxl_function_close(func0->ocxl_fn); + func0->ocxl_fn = NULL; + } + } else { + struct ocxlpmem *ocxlpmem = pci_get_drvdata(pdev); + + if (ocxlpmem) + device_unregister(&ocxlpmem->dev); + } +} + +/** + * probe_function0() - Set up function 0 for an OpenCAPI persistent memory device + * This is important as it enables templates higher than 0 across all other functions, + * which in turn enables higher bandwidth accesses + * @pdev: the PCI device information struct + * Return: 0 on success, negative on failure + */ +static int probe_function0(struct pci_dev *pdev) +{ + struct ocxlpmem_function0 *func0 = NULL; + struct ocxl_fn *fn; + + func0 = kzalloc(sizeof(*func0), GFP_KERNEL); + if (!func0) + return -ENOMEM; + + func0->pdev = pdev; + fn = ocxl_function_open(pdev); + if (IS_ERR(fn)) { + kfree(func0); + dev_err(&pdev->dev, "failed to open OCXL function\n"); + return PTR_ERR(fn); + } + func0->ocxl_fn = fn; + + pci_set_drvdata(pdev, func0); + + return 0; +} + +/** + * probe() - Init an OpenCAPI persistent memory device + * @pdev: the PCI device information struct + * @ent: The entry from ocxlpmem_pci_tbl + * Return: 0 on success, negative on failure + */ +static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) +{ + struct ocxlpmem *ocxlpmem; + int rc; + + if (PCI_FUNC(pdev->devfn) == 0) + return probe_function0(pdev); + else if (PCI_FUNC(pdev->devfn) != 1) + return 0; + + ocxlpmem = kzalloc(sizeof(*ocxlpmem), GFP_KERNEL); + if (!ocxlpmem) { + dev_err(&pdev->dev, "Could not allocate OpenCAPI persistent memory metadata\n"); + rc = -ENOMEM; + goto err; + } + ocxlpmem->pdev = pdev; + + pci_set_drvdata(pdev, ocxlpmem); + + ocxlpmem->ocxl_fn = ocxl_function_open(pdev); + if (IS_ERR(ocxlpmem->ocxl_fn)) { + kfree(ocxlpmem); + pci_set_drvdata(pdev, NULL); + dev_err(&pdev->dev, "failed to open OCXL function\n"); + rc = PTR_ERR(ocxlpmem->ocxl_fn); + goto err; + } + + ocxlpmem->ocxl_afu = ocxl_function_fetch_afu(ocxlpmem->ocxl_fn, 0); + if (ocxlpmem->ocxl_afu == NULL) { + dev_err(&pdev->dev, "Could not get OCXL AFU from function\n"); + rc = -ENXIO; + goto err; + } + + ocxl_afu_get(ocxlpmem->ocxl_afu); + + // Resources allocated below here are cleaned up in the release handler + + rc = ocxlpmem_register(ocxlpmem); + if (rc) { + dev_err(&pdev->dev, "Could not register OpenCAPI persistent memory device with the kernel\n"); + goto err; + } + + rc = ocxl_context_alloc(&ocxlpmem->ocxl_context, ocxlpmem->ocxl_afu, NULL); + if (rc) { + dev_err(&pdev->dev, "Could not allocate OCXL context\n"); + goto err; + } + + rc = ocxl_context_attach(ocxlpmem->ocxl_context, 0, NULL); + if (rc) { + dev_err(&pdev->dev, "Could not attach ocxl context\n"); + goto err; + } + + rc = register_lpc_mem(ocxlpmem); + if (rc) { + dev_err(&pdev->dev, "Could not register OpenCAPI persistent memory with libnvdimm\n"); + goto err; + } + + return 0; + +err: + /* + * Further cleanup is done in the release handler via free_ocxlpmem() + * This allows us to keep the character device live to handle IOCTLs to + * investigate issues if the card has an error + */ + + dev_err(&pdev->dev, + "Error detected, will not register OpenCAPI persistent memory\n"); + return rc; +} + +static struct pci_driver pci_driver = { + .name = "ocxl-pmem", + .id_table = ocxlpmem_pci_tbl, + .probe = probe, + .remove = ocxlpmem_remove, + .shutdown = ocxlpmem_remove, +}; + +static int __init ocxlpmem_init(void) +{ + int rc = 0; + + rc = pci_register_driver(&pci_driver); + if (rc) + return rc; + + return 0; +} + +static void ocxlpmem_exit(void) +{ + pci_unregister_driver(&pci_driver); +} + +module_init(ocxlpmem_init); +module_exit(ocxlpmem_exit); + +MODULE_DESCRIPTION("OpenCAPI Persistent Memory"); +MODULE_LICENSE("GPL"); diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h new file mode 100644 index 000000000000..0faf3740e9b8 --- /dev/null +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright 2019 IBM Corp. + +#include +#include +#include +#include + +#define LABEL_AREA_SIZE (1UL << PA_SECTION_SHIFT) + +struct ocxlpmem_function0 { + struct pci_dev *pdev; + struct ocxl_fn *ocxl_fn; +}; + +struct ocxlpmem { + struct device dev; + struct pci_dev *pdev; + struct ocxl_fn *ocxl_fn; + struct nd_interleave_set nd_set; + struct nvdimm_bus_descriptor bus_desc; + struct nvdimm_bus *nvdimm_bus; + struct ocxl_afu *ocxl_afu; + struct ocxl_context *ocxl_context; + void *metadata_addr; + struct resource pmem_res; + struct nd_region *nd_region; +}; From patchwork Fri Feb 21 03:27:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395359 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4E9071580 for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:10 -0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S9dF45481990 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:09 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7AAD9A405C; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 269C7A4054; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 338ADA03C4; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 11/27] powerpc: Enable the OpenCAPI Persistent Memory driver for powernv_defconfig Date: Fri, 21 Feb 2020 14:27:04 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0020-0000-0000-000003AC2210 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0021-0000-0000-000022042A31 Message-Id: <20200221032720.33893-12-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 bulkscore=0 priorityscore=1501 mlxscore=0 impostorscore=0 suspectscore=1 spamscore=0 mlxlogscore=499 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: I65CZI42PI3HBBV6N3PTPB6DZ23YLYAS X-Message-ID-Hash: I65CZI42PI3HBBV6N3PTPB6DZ23YLYAS X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch enables the OpenCAPI Persistent Memory driver, as well as DAX support, for the 'powernv' platform. DAX is not a strict requirement for the functioning of the driver, but it is likely that a user will want to create a DAX device on top of their persistent memory device. Signed-off-by: Alastair D'Silva Reviewed-by: Andrew Donnellan --- arch/powerpc/configs/powernv_defconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/powerpc/configs/powernv_defconfig b/arch/powerpc/configs/powernv_defconfig index 71749377d164..921d77bbd3d2 100644 --- a/arch/powerpc/configs/powernv_defconfig +++ b/arch/powerpc/configs/powernv_defconfig @@ -348,3 +348,8 @@ CONFIG_KVM_BOOK3S_64=m CONFIG_KVM_BOOK3S_64_HV=m CONFIG_VHOST_NET=m CONFIG_PRINTK_TIME=y +CONFIG_ZONE_DEVICE=y +CONFIG_OCXL_PMEM=m +CONFIG_DEV_DAX=m +CONFIG_DEV_DAX_PMEM=m +CONFIG_FS_DAX=y From patchwork Fri Feb 21 03:27:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395429 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E7B201395 for ; Fri, 21 Feb 2020 03:29:40 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D00B8208E4 for ; Fri, 21 Feb 2020 03:29:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D00B8208E4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 20C6A10FC36C2; Thu, 20 Feb 2020 19:30:32 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CDFAF10FC3610 for ; Thu, 20 Feb 2020 19:30:28 -0800 (PST) Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3Sib0102305 for ; Thu, 20 Feb 2020 22:29:36 -0500 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y9ytr4638-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:29:35 -0500 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:29:25 -0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S9BZ49807518 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:10 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D13D7A4064; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 29246A4060; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 3DEC4A03CC; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 12/27] powerpc/powernv/pmem: Add register addresses & status values to the header Date: Fri, 21 Feb 2020 14:27:05 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-4275-0000-0000-000003A3FE70 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-4276-0000-0000-000038B80C88 Message-Id: <20200221032720.33893-13-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=1 clxscore=1015 mlxlogscore=962 mlxscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 impostorscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210021 Message-ID-Hash: UPTRLD4OVQMS5BLBFMV7MAV6AVTZYMBS X-Message-ID-Hash: UPTRLD4OVQMS5BLBFMV7MAV6AVTZYMBS X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva These values have been taken from the device specifications. Signed-off-by: Alastair D'Silva Reviewed-by: Andrew Donnellan --- .../platforms/powernv/pmem/ocxl_internal.h | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h index 0faf3740e9b8..9cf3e42750e7 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -8,6 +8,78 @@ #define LABEL_AREA_SIZE (1UL << PA_SECTION_SHIFT) +#define GLOBAL_MMIO_CHI 0x000 +#define GLOBAL_MMIO_CHIC 0x008 +#define GLOBAL_MMIO_CHIE 0x010 +#define GLOBAL_MMIO_CHIEC 0x018 +#define GLOBAL_MMIO_HCI 0x020 +#define GLOBAL_MMIO_HCIC 0x028 +#define GLOBAL_MMIO_IMA0_OHP 0x040 +#define GLOBAL_MMIO_IMA0_CFP 0x048 +#define GLOBAL_MMIO_IMA1_OHP 0x050 +#define GLOBAL_MMIO_IMA1_CFP 0x058 +#define GLOBAL_MMIO_ACMA_CREQO 0x100 +#define GLOBAL_MMIO_ACMA_CRSPO 0x104 +#define GLOBAL_MMIO_ACMA_CDBO 0x108 +#define GLOBAL_MMIO_ACMA_CDBS 0x10c +#define GLOBAL_MMIO_NSCMA_CREQO 0x120 +#define GLOBAL_MMIO_NSCMA_CRSPO 0x124 +#define GLOBAL_MMIO_NSCMA_CDBO 0x128 +#define GLOBAL_MMIO_NSCMA_CDBS 0x12c +#define GLOBAL_MMIO_CSTS 0x140 +#define GLOBAL_MMIO_FWVER 0x148 +#define GLOBAL_MMIO_CCAP0 0x160 +#define GLOBAL_MMIO_CCAP1 0x168 + +#define GLOBAL_MMIO_CHI_ACRA BIT_ULL(0) +#define GLOBAL_MMIO_CHI_NSCRA BIT_ULL(1) +#define GLOBAL_MMIO_CHI_CRDY BIT_ULL(4) +#define GLOBAL_MMIO_CHI_CFFS BIT_ULL(5) +#define GLOBAL_MMIO_CHI_MA BIT_ULL(6) +#define GLOBAL_MMIO_CHI_ELA BIT_ULL(7) +#define GLOBAL_MMIO_CHI_CDA BIT_ULL(8) +#define GLOBAL_MMIO_CHI_CHFS BIT_ULL(9) + +#define GLOBAL_MMIO_CHI_ALL (GLOBAL_MMIO_CHI_ACRA | \ + GLOBAL_MMIO_CHI_NSCRA | \ + GLOBAL_MMIO_CHI_CRDY | \ + GLOBAL_MMIO_CHI_CFFS | \ + GLOBAL_MMIO_CHI_MA | \ + GLOBAL_MMIO_CHI_ELA | \ + GLOBAL_MMIO_CHI_CDA | \ + GLOBAL_MMIO_CHI_CHFS) + +#define GLOBAL_MMIO_HCI_ACRW BIT_ULL(0) +#define GLOBAL_MMIO_HCI_NSCRW BIT_ULL(1) +#define GLOBAL_MMIO_HCI_AFU_RESET BIT_ULL(2) +#define GLOBAL_MMIO_HCI_FW_DEBUG BIT_ULL(3) +#define GLOBAL_MMIO_HCI_CONTROLLER_DUMP BIT_ULL(4) +#define GLOBAL_MMIO_HCI_CONTROLLER_DUMP_COLLECTED BIT_ULL(5) +#define GLOBAL_MMIO_HCI_REQ_HEALTH_PERF BIT_ULL(6) + +#define ADMIN_COMMAND_HEARTBEAT 0x00u +#define ADMIN_COMMAND_SHUTDOWN 0x01u +#define ADMIN_COMMAND_FW_UPDATE 0x02u +#define ADMIN_COMMAND_FW_DEBUG 0x03u +#define ADMIN_COMMAND_ERRLOG 0x04u +#define ADMIN_COMMAND_SMART 0x05u +#define ADMIN_COMMAND_CONTROLLER_STATS 0x06u +#define ADMIN_COMMAND_CONTROLLER_DUMP 0x07u +#define ADMIN_COMMAND_CMD_CAPS 0x08u +#define ADMIN_COMMAND_MAX 0x08u + +#define STATUS_SUCCESS 0x00 +#define STATUS_MEM_UNAVAILABLE 0x20 +#define STATUS_BAD_OPCODE 0x50 +#define STATUS_BAD_REQUEST_PARM 0x51 +#define STATUS_BAD_DATA_PARM 0x52 +#define STATUS_DEBUG_BLOCKED 0x70 +#define STATUS_FAIL 0xFF + +#define STATUS_FW_UPDATE_BLOCKED 0x21 +#define STATUS_FW_ARG_INVALID 0x51 +#define STATUS_FW_INVALID 0x52 + struct ocxlpmem_function0 { struct pci_dev *pdev; struct ocxl_fn *ocxl_fn; From patchwork Fri Feb 21 03:27:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395365 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 70E7E1580 for ; Fri, 21 Feb 2020 03:28:37 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 585D424656 for ; Fri, 21 Feb 2020 03:28:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 585D424656 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 3D37810FC362D; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:10 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S9lD55246944 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:09 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BC3FD52052; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 213D552050; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 52EA8A03CF; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 13/27] powerpc/powernv/pmem: Read the capability registers & wait for device ready Date: Fri, 21 Feb 2020 14:27:06 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0020-0000-0000-000003AC2211 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0021-0000-0000-000022042A33 Message-Id: <20200221032720.33893-14-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 spamscore=0 priorityscore=1501 mlxlogscore=999 bulkscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 mlxscore=0 suspectscore=1 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: AEFXONBF4QXGE2JEE4FYWERPFQ4VM4W5 X-Message-ID-Hash: AEFXONBF4QXGE2JEE4FYWERPFQ4VM4W5 X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch reads timeouts & firmware version from the controller, and uses those timeouts to wait for the controller to report that it is ready before handing the memory over to libnvdimm. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/Makefile | 2 +- arch/powerpc/platforms/powernv/pmem/ocxl.c | 92 +++++++++++++++++++ .../platforms/powernv/pmem/ocxl_internal.c | 19 ++++ .../platforms/powernv/pmem/ocxl_internal.h | 24 +++++ 4 files changed, 136 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/platforms/powernv/pmem/ocxl_internal.c diff --git a/arch/powerpc/platforms/powernv/pmem/Makefile b/arch/powerpc/platforms/powernv/pmem/Makefile index 1c55c4193175..4ceda25907d4 100644 --- a/arch/powerpc/platforms/powernv/pmem/Makefile +++ b/arch/powerpc/platforms/powernv/pmem/Makefile @@ -4,4 +4,4 @@ ccflags-$(CONFIG_PPC_WERROR) += -Werror obj-$(CONFIG_OCXL_PMEM) += ocxlpmem.o -ocxlpmem-y := ocxl.o +ocxlpmem-y := ocxl.o ocxl_internal.o diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index 3c4eeb5dcc0f..431212c9f0cc 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -215,6 +216,36 @@ static int register_lpc_mem(struct ocxlpmem *ocxlpmem) return 0; } +/** + * is_usable() - Is a controller usable? + * @ocxlpmem: the device metadata + * @verbose: True to log errors + * Return: true if the controller is usable + */ +static bool is_usable(const struct ocxlpmem *ocxlpmem, bool verbose) +{ + u64 chi = 0; + int rc = ocxlpmem_chi(ocxlpmem, &chi); + + if (rc < 0) + return false; + + if (!(chi & GLOBAL_MMIO_CHI_CRDY)) { + if (verbose) + dev_err(&ocxlpmem->dev, "controller is not ready.\n"); + return false; + } + + if (!(chi & GLOBAL_MMIO_CHI_MA)) { + if (verbose) + dev_err(&ocxlpmem->dev, + "controller does not have memory available.\n"); + return false; + } + + return true; +} + /** * allocate_minor() - Allocate a minor number to use for an OpenCAPI pmem device * @ocxlpmem: the device metadata @@ -328,6 +359,48 @@ static void ocxlpmem_remove(struct pci_dev *pdev) } } +/** + * read_device_metadata() - Retrieve config information from the AFU and save it for future use + * @ocxlpmem: the device metadata + * Return: 0 on success, negative on failure + */ +static int read_device_metadata(struct ocxlpmem *ocxlpmem) +{ + u64 val; + int rc; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP0, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + ocxlpmem->scm_revision = val & 0xFFFF; + ocxlpmem->read_latency = (val >> 32) & 0xFF; + ocxlpmem->readiness_timeout = (val >> 48) & 0x0F; + ocxlpmem->memory_available_timeout = val >> 52; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP1, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + ocxlpmem->max_controller_dump_size = val & 0xFFFFFFFF; + + // Extract firmware version text + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_FWVER, + OCXL_HOST_ENDIAN, (u64 *)ocxlpmem->fw_version); + if (rc) + return rc; + + ocxlpmem->fw_version[8] = '\0'; + + dev_info(&ocxlpmem->dev, + "Firmware version '%s' SCM revision %d:%d\n", ocxlpmem->fw_version, + ocxlpmem->scm_revision >> 4, ocxlpmem->scm_revision & 0x0F); + + return 0; +} + /** * probe_function0() - Set up function 0 for an OpenCAPI persistent memory device * This is important as it enables templates higher than 0 across all other functions, @@ -368,6 +441,7 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct ocxlpmem *ocxlpmem; int rc; + u16 elapsed, timeout; if (PCI_FUNC(pdev->devfn) == 0) return probe_function0(pdev); @@ -422,6 +496,24 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) goto err; } + if (read_device_metadata(ocxlpmem)) { + dev_err(&pdev->dev, "Could not read metadata\n"); + goto err; + } + + elapsed = 0; + timeout = ocxlpmem->readiness_timeout + ocxlpmem->memory_available_timeout; + while (!is_usable(ocxlpmem, false)) { + if (elapsed++ > timeout) { + dev_warn(&ocxlpmem->dev, "OpenCAPI Persistent Memory ready timeout.\n"); + (void)is_usable(ocxlpmem, true); + rc = -ENXIO; + goto err; + } + + msleep(1000); + } + rc = register_lpc_mem(ocxlpmem); if (rc) { dev_err(&pdev->dev, "Could not register OpenCAPI persistent memory with libnvdimm\n"); diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c new file mode 100644 index 000000000000..617ca943b1b8 --- /dev/null +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright 2019 IBM Corp. + +#include +#include +#include "ocxl_internal.h" + +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi) +{ + u64 val; + int rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHI, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + *chi = val; + + return 0; +} diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h index 9cf3e42750e7..ba0301533d00 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -97,4 +97,28 @@ struct ocxlpmem { void *metadata_addr; struct resource pmem_res; struct nd_region *nd_region; + char fw_version[8+1]; + + u32 max_controller_dump_size; + u16 scm_revision; // major/minor + u8 readiness_timeout; /* The worst case time (in seconds) that the host shall + * wait for the controller to become operational following a reset (CHI.CRDY). + */ + u8 memory_available_timeout; /* The worst case time (in seconds) that the host shall + * wait for memory to become available following a reset (CHI.MA). + */ + + u16 read_latency; /* The nominal measure of latency (in nanoseconds) + * associated with an unassisted read of a memory block. + * This represents the capability of the raw media technology without assistance + */ }; + +/** + * ocxlpmem_chi() - Get the value of the CHI register + * @ocxlpmem: the device metadata + * @chi: returns the CHI value + * + * Returns 0 on success, negative on error + */ +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi); From patchwork Fri Feb 21 03:27:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395371 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 92ABD1395 for ; Fri, 21 Feb 2020 03:28:40 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7AD2720716 for ; Fri, 21 Feb 2020 03:28:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7AD2720716 Authentication-Results: mail.kernel.org; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:10 -0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3S9V659506906 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:09 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C8BD5A405C; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2E7F9A4065; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 605ACA03D2; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 14/27] powerpc/powernv/pmem: Add support for Admin commands Date: Fri, 21 Feb 2020 14:27:07 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0012-0000-0000-00000388D1CC X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0013-0000-0000-000021C56A6F Message-Id: <20200221032720.33893-15-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 priorityscore=1501 suspectscore=1 spamscore=0 bulkscore=0 impostorscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: XGIGIJWIU63643V7EOLOKJHQAMFVKNTD X-Message-ID-Hash: XGIGIJWIU63643V7EOLOKJHQAMFVKNTD X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch requests the metadata required to issue admin commands, as well as some helper functions to construct and check the completion of the commands. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 65 ++++++++ .../platforms/powernv/pmem/ocxl_internal.c | 153 ++++++++++++++++++ .../platforms/powernv/pmem/ocxl_internal.h | 61 +++++++ 3 files changed, 279 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index 431212c9f0cc..4e782d22605b 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -216,6 +216,58 @@ static int register_lpc_mem(struct ocxlpmem *ocxlpmem) return 0; } +/** + * extract_command_metadata() - Extract command data from MMIO & save it for further use + * @ocxlpmem: the device metadata + * @offset: The base address of the command data structures (address of CREQO) + * @command_metadata: A pointer to the command metadata to populate + * Return: 0 on success, negative on failure + */ +static int extract_command_metadata(struct ocxlpmem *ocxlpmem, u32 offset, + struct command_metadata *command_metadata) +{ + int rc; + u64 tmp; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, offset, OCXL_LITTLE_ENDIAN, + &tmp); + if (rc) + return rc; + + command_metadata->request_offset = tmp >> 32; + command_metadata->response_offset = tmp & 0xFFFFFFFF; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, offset + 8, OCXL_LITTLE_ENDIAN, + &tmp); + if (rc) + return rc; + + command_metadata->data_offset = tmp >> 32; + command_metadata->data_size = tmp & 0xFFFFFFFF; + + command_metadata->id = 0; + + return 0; +} + +/** + * setup_command_metadata() - Set up the command metadata + * @ocxlpmem: the device metadata + */ +static int setup_command_metadata(struct ocxlpmem *ocxlpmem) +{ + int rc; + + mutex_init(&ocxlpmem->admin_command.lock); + + rc = extract_command_metadata(ocxlpmem, GLOBAL_MMIO_ACMA_CREQO, + &ocxlpmem->admin_command); + if (rc) + return rc; + + return 0; +} + /** * is_usable() - Is a controller usable? * @ocxlpmem: the device metadata @@ -456,6 +508,14 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) } ocxlpmem->pdev = pdev; + ocxlpmem->timeouts[ADMIN_COMMAND_ERRLOG] = 2000; // ms + ocxlpmem->timeouts[ADMIN_COMMAND_HEARTBEAT] = 100; // ms + ocxlpmem->timeouts[ADMIN_COMMAND_SMART] = 100; // ms + ocxlpmem->timeouts[ADMIN_COMMAND_CONTROLLER_DUMP] = 1000; // ms + ocxlpmem->timeouts[ADMIN_COMMAND_CONTROLLER_STATS] = 100; // ms + ocxlpmem->timeouts[ADMIN_COMMAND_SHUTDOWN] = 1000; // ms + ocxlpmem->timeouts[ADMIN_COMMAND_FW_UPDATE] = 16000; // ms + pci_set_drvdata(pdev, ocxlpmem); ocxlpmem->ocxl_fn = ocxl_function_open(pdev); @@ -501,6 +561,11 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) goto err; } + if (setup_command_metadata(ocxlpmem)) { + dev_err(&pdev->dev, "Could not read OCXL command matada\n"); + goto err; + } + elapsed = 0; timeout = ocxlpmem->readiness_timeout + ocxlpmem->memory_available_timeout; while (!is_usable(ocxlpmem, false)) { diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c index 617ca943b1b8..583f48023025 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c @@ -17,3 +17,156 @@ int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi) return 0; } + +#define COMMAND_REQUEST_SIZE (8 * sizeof(u64)) +static int scm_command_request(const struct ocxlpmem *ocxlpmem, + struct command_metadata *cmd, u8 op_code) +{ + u64 val = op_code; + int rc; + u8 i; + + cmd->op_code = op_code; + cmd->id++; + + val |= ((u64)cmd->id) << 16; + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, cmd->request_offset, + OCXL_LITTLE_ENDIAN, val); + if (rc) + return rc; + + for (i = sizeof(u64); i < COMMAND_REQUEST_SIZE; i += sizeof(u64)) { + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, + cmd->request_offset + i, + OCXL_LITTLE_ENDIAN, 0); + if (rc) + return rc; + } + + return 0; +} + +int admin_command_request(struct ocxlpmem *ocxlpmem, u8 op_code) +{ + u64 val; + int rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHI, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + return scm_command_request(ocxlpmem, &ocxlpmem->admin_command, op_code); +} + +static int command_response(const struct ocxlpmem *ocxlpmem, + const struct command_metadata *cmd) +{ + u64 val; + u16 id; + u8 status; + int rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + cmd->response_offset, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + status = val & 0xff; + id = (val >> 16) & 0xffff; + + if (id != cmd->id) { + dev_warn(&ocxlpmem->dev, + "Expected response for command %d, but received response for command %d instead.\n", + cmd->id, id); + } + + return status; +} + +int admin_response(const struct ocxlpmem *ocxlpmem) +{ + return command_response(ocxlpmem, &ocxlpmem->admin_command); +} + + +int admin_command_execute(const struct ocxlpmem *ocxlpmem) +{ + return ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_HCI, + OCXL_LITTLE_ENDIAN, GLOBAL_MMIO_HCI_ACRW); +} + +static bool admin_command_complete(const struct ocxlpmem *ocxlpmem) +{ + u64 val = 0; + + int rc = ocxlpmem_chi(ocxlpmem, &val); + + WARN_ON(rc); + + return (val & GLOBAL_MMIO_CHI_ACRA) != 0; +} + +int admin_command_complete_timeout(const struct ocxlpmem *ocxlpmem, + int command) +{ + u32 timeout = ocxlpmem->timeouts[command]; + // 32 is the next power of 2 greater than the 20ms minimum for msleep +#define TIMEOUT_SLEEP_MILLIS 32 + timeout /= TIMEOUT_SLEEP_MILLIS; + if (!timeout) + timeout = DEFAULT_TIMEOUT / TIMEOUT_SLEEP_MILLIS; + + while (timeout-- > 0) { + if (admin_command_complete(ocxlpmem)) + return 0; + msleep(TIMEOUT_SLEEP_MILLIS); + } + + if (admin_command_complete(ocxlpmem)) + return 0; + + return -EBUSY; +} + +int admin_response_handled(const struct ocxlpmem *ocxlpmem) +{ + return ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHIC, + OCXL_LITTLE_ENDIAN, GLOBAL_MMIO_CHI_ACRA); +} + +void warn_status(const struct ocxlpmem *ocxlpmem, const char *message, + u8 status) +{ + const char *text = "Unknown"; + + switch (status) { + case STATUS_SUCCESS: + text = "Success"; + break; + + case STATUS_MEM_UNAVAILABLE: + text = "Persistent memory unavailable"; + break; + + case STATUS_BAD_OPCODE: + text = "Bad opcode"; + break; + + case STATUS_BAD_REQUEST_PARM: + text = "Bad request parameter"; + break; + + case STATUS_BAD_DATA_PARM: + text = "Bad data parameter"; + break; + + case STATUS_DEBUG_BLOCKED: + text = "Debug action blocked"; + break; + + case STATUS_FAIL: + text = "Failed"; + break; + } + + dev_warn(&ocxlpmem->dev, "%s: %s (%x)\n", message, text, status); +} diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h index ba0301533d00..2fef68c71271 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -7,6 +7,7 @@ #include #define LABEL_AREA_SIZE (1UL << PA_SECTION_SHIFT) +#define DEFAULT_TIMEOUT 100 #define GLOBAL_MMIO_CHI 0x000 #define GLOBAL_MMIO_CHIC 0x008 @@ -80,6 +81,16 @@ #define STATUS_FW_ARG_INVALID 0x51 #define STATUS_FW_INVALID 0x52 +struct command_metadata { + u32 request_offset; + u32 response_offset; + u32 data_offset; + u32 data_size; + struct mutex lock; + u16 id; + u8 op_code; +}; + struct ocxlpmem_function0 { struct pci_dev *pdev; struct ocxl_fn *ocxl_fn; @@ -95,9 +106,11 @@ struct ocxlpmem { struct ocxl_afu *ocxl_afu; struct ocxl_context *ocxl_context; void *metadata_addr; + struct command_metadata admin_command; struct resource pmem_res; struct nd_region *nd_region; char fw_version[8+1]; + u32 timeouts[ADMIN_COMMAND_MAX+1]; u32 max_controller_dump_size; u16 scm_revision; // major/minor @@ -122,3 +135,51 @@ struct ocxlpmem { * Returns 0 on success, negative on error */ int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi); + +/** + * admin_command_request() - Issue an admin command request + * @ocxlpmem: the device metadata + * @op_code: The op-code for the command + * + * Returns an identifier for the command, or negative on error + */ +int admin_command_request(struct ocxlpmem *ocxlpmem, u8 op_code); + +/** + * admin_response() - Validate an admin response + * @ocxlpmem: the device metadata + * Returns the status code of the command, or negative on error + */ +int admin_response(const struct ocxlpmem *ocxlpmem); + +/** + * admin_command_execute() - Notify the controller to start processing a pending admin command + * @ocxlpmem: the device metadata + * Returns 0 on success, negative on error + */ +int admin_command_execute(const struct ocxlpmem *ocxlpmem); + +/** + * admin_command_complete_timeout() - Wait for an admin command to finish executing + * @ocxlpmem: the device metadata + * @command: the admin command to wait for completion (determines the timeout) + * Returns 0 on success, -EBUSY on timeout + */ +int admin_command_complete_timeout(const struct ocxlpmem *ocxlpmem, + int command); + +/** + * admin_response_handled() - Notify the controller that the admin response has been handled + * @ocxlpmem: the device metadata + * Returns 0 on success, negative on failure + */ +int admin_response_handled(const struct ocxlpmem *ocxlpmem); + +/** + * warn_status() - Emit a kernel warning showing a command status. + * @ocxlpmem: the device metadata + * @message: A message to accompany the warning + * @status: The command status + */ +void warn_status(const struct ocxlpmem *ocxlpmem, const char *message, + u8 status); From patchwork Fri Feb 21 03:27:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395375 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 18F511395 for ; Fri, 21 Feb 2020 03:28:42 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0147024650 for ; Fri, 21 Feb 2020 03:28:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0147024650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 9B65110FC363B; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:11 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SAB843647038 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:10 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8F6F3AE04D; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC284AE051; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 69933A03DC; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 15/27] powerpc/powernv/pmem: Add support for near storage commands Date: Fri, 21 Feb 2020 14:27:08 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0012-0000-0000-00000388D1CF X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0013-0000-0000-000021C56A70 Message-Id: <20200221032720.33893-16-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=1 clxscore=1015 mlxlogscore=999 mlxscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 impostorscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: EGJILXPEUIULTNYXNULZ6VPHS24L7LBG X-Message-ID-Hash: EGJILXPEUIULTNYXNULZ6VPHS24L7LBG X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva Similar to the previous patch, this adds support for near storage commands. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 6 +++ .../platforms/powernv/pmem/ocxl_internal.c | 41 +++++++++++++++++++ .../platforms/powernv/pmem/ocxl_internal.h | 37 +++++++++++++++++ 3 files changed, 84 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index 4e782d22605b..b8bd7e703b19 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -259,12 +259,18 @@ static int setup_command_metadata(struct ocxlpmem *ocxlpmem) int rc; mutex_init(&ocxlpmem->admin_command.lock); + mutex_init(&ocxlpmem->ns_command.lock); rc = extract_command_metadata(ocxlpmem, GLOBAL_MMIO_ACMA_CREQO, &ocxlpmem->admin_command); if (rc) return rc; + rc = extract_command_metadata(ocxlpmem, GLOBAL_MMIO_NSCMA_CREQO, + &ocxlpmem->ns_command); + if (rc) + return rc; + return 0; } diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c index 583f48023025..3e0b133feddf 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.c @@ -133,6 +133,47 @@ int admin_response_handled(const struct ocxlpmem *ocxlpmem) OCXL_LITTLE_ENDIAN, GLOBAL_MMIO_CHI_ACRA); } +int ns_command_request(struct ocxlpmem *ocxlpmem, u8 op_code) +{ + u64 val; + int rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHI, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + if (!(val & GLOBAL_MMIO_CHI_NSCRA)) + return -EBUSY; + + return scm_command_request(ocxlpmem, &ocxlpmem->ns_command, op_code); +} + +int ns_response(const struct ocxlpmem *ocxlpmem) +{ + return command_response(ocxlpmem, &ocxlpmem->ns_command); +} + +int ns_command_execute(const struct ocxlpmem *ocxlpmem) +{ + return ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_HCI, + OCXL_LITTLE_ENDIAN, GLOBAL_MMIO_HCI_NSCRW); +} + +bool ns_command_complete(const struct ocxlpmem *ocxlpmem) +{ + u64 val = 0; + int rc = ocxlpmem_chi(ocxlpmem, &val); + + WARN_ON(rc); + + return (val & GLOBAL_MMIO_CHI_NSCRA) != 0; +} + +int ns_response_handled(const struct ocxlpmem *ocxlpmem) +{ + return ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHIC, + OCXL_LITTLE_ENDIAN, GLOBAL_MMIO_CHI_NSCRA); +} + void warn_status(const struct ocxlpmem *ocxlpmem, const char *message, u8 status) { diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h index 2fef68c71271..28e2020f6355 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -107,6 +107,7 @@ struct ocxlpmem { struct ocxl_context *ocxl_context; void *metadata_addr; struct command_metadata admin_command; + struct command_metadata ns_command; struct resource pmem_res; struct nd_region *nd_region; char fw_version[8+1]; @@ -175,6 +176,42 @@ int admin_command_complete_timeout(const struct ocxlpmem *ocxlpmem, */ int admin_response_handled(const struct ocxlpmem *ocxlpmem); +/** + * ns_command_request() - Issue a near storage command request + * @ocxlpmem: the device metadata + * @op_code: The op-code for the command + * Returns an identifier for the command, or negative on error + */ +int ns_command_request(struct ocxlpmem *ocxlpmem, u8 op_code); + +/** + * ns_response() - Validate a near storage response + * @ocxlpmem: the device metadata + * Returns the status code of the command, or negative on error + */ +int ns_response(const struct ocxlpmem *ocxlpmem); + +/** + * ns_command_execute() - Notify the controller to start processing a pending near storage command + * @ocxlpmem: the device metadata + * Returns 0 on success, negative on error + */ +int ns_command_execute(const struct ocxlpmem *ocxlpmem); + +/** + * ns_command_complete() - Is a near storage command executing + * @ocxlpmem: the device metadata + * Returns true if the previous admin command has completed + */ +bool ns_command_complete(const struct ocxlpmem *ocxlpmem); + +/** + * ns_response_handled() - Notify the controller that the near storage response has been handled + * @ocxlpmem: the device metadata + * Returns 0 on success, negative on failure + */ +int ns_response_handled(const struct ocxlpmem *ocxlpmem); + /** * warn_status() - Emit a kernel warning showing a command status. * @ocxlpmem: the device metadata From patchwork Fri Feb 21 03:27:09 2020 Content-Type: text/plain; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:29:27 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SBe549086650 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:11 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1757FA404D; Fri, 21 Feb 2020 03:28:11 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7252BA4040; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 7B369A03DD; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 16/27] powerpc/powernv/pmem: Register a character device for userspace to interact with Date: Fri, 21 Feb 2020 14:27:09 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0012-0000-0000-00000388D1D4 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0013-0000-0000-000021C56A75 Message-Id: <20200221032720.33893-17-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=3 phishscore=0 adultscore=0 clxscore=1015 impostorscore=0 malwarescore=0 spamscore=0 bulkscore=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: V5ZIQZC5T33LSOUBM474NTMMRAGETHEX X-Message-ID-Hash: V5ZIQZC5T33LSOUBM474NTMMRAGETHEX X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch introduces a character device (/dev/ocxl-scmX) which further patches will use to interact with userspace. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 116 +++++++++++++++++- .../platforms/powernv/pmem/ocxl_internal.h | 2 + 2 files changed, 116 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index b8bd7e703b19..63109a870d2c 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include "ocxl_internal.h" @@ -339,6 +340,9 @@ static void free_ocxlpmem(struct ocxlpmem *ocxlpmem) free_minor(ocxlpmem); + if (ocxlpmem->cdev.owner) + cdev_del(&ocxlpmem->cdev); + if (ocxlpmem->metadata_addr) devm_memunmap(&ocxlpmem->dev, ocxlpmem->metadata_addr); @@ -396,6 +400,70 @@ static int ocxlpmem_register(struct ocxlpmem *ocxlpmem) return device_register(&ocxlpmem->dev); } +static void ocxlpmem_put(struct ocxlpmem *ocxlpmem) +{ + put_device(&ocxlpmem->dev); +} + +static struct ocxlpmem *ocxlpmem_get(struct ocxlpmem *ocxlpmem) +{ + return (get_device(&ocxlpmem->dev) == NULL) ? NULL : ocxlpmem; +} + +static struct ocxlpmem *find_and_get_ocxlpmem(dev_t devno) +{ + struct ocxlpmem *ocxlpmem; + int minor = MINOR(devno); + /* + * We don't declare an RCU critical section here, as our AFU + * is protected by a reference counter on the device. By the time the + * minor number of a device is removed from the idr, the ref count of + * the device is already at 0, so no user API will access that AFU and + * this function can't return it. + */ + ocxlpmem = idr_find(&minors_idr, minor); + if (ocxlpmem) + ocxlpmem_get(ocxlpmem); + return ocxlpmem; +} + +static int file_open(struct inode *inode, struct file *file) +{ + struct ocxlpmem *ocxlpmem; + + ocxlpmem = find_and_get_ocxlpmem(inode->i_rdev); + if (!ocxlpmem) + return -ENODEV; + + file->private_data = ocxlpmem; + return 0; +} + +static int file_release(struct inode *inode, struct file *file) +{ + struct ocxlpmem *ocxlpmem = file->private_data; + + ocxlpmem_put(ocxlpmem); + return 0; +} + +static const struct file_operations fops = { + .owner = THIS_MODULE, + .open = file_open, + .release = file_release, +}; + +/** + * create_cdev() - Create the chardev in /dev for the device + * @ocxlpmem: the SCM metadata + * Return: 0 on success, negative on failure + */ +static int create_cdev(struct ocxlpmem *ocxlpmem) +{ + cdev_init(&ocxlpmem->cdev, &fops); + return cdev_add(&ocxlpmem->cdev, ocxlpmem->dev.devt, 1); +} + /** * ocxlpmem_remove() - Free an OpenCAPI persistent memory device * @pdev: the PCI device information struct @@ -572,6 +640,11 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) goto err; } + if (create_cdev(ocxlpmem)) { + dev_err(&pdev->dev, "Could not create character device\n"); + goto err; + } + elapsed = 0; timeout = ocxlpmem->readiness_timeout + ocxlpmem->memory_available_timeout; while (!is_usable(ocxlpmem, false)) { @@ -613,20 +686,59 @@ static struct pci_driver pci_driver = { .shutdown = ocxlpmem_remove, }; +static int file_init(void) +{ + int rc; + + mutex_init(&minors_idr_lock); + idr_init(&minors_idr); + + rc = alloc_chrdev_region(&ocxlpmem_dev, 0, NUM_MINORS, "ocxl-pmem"); + if (rc) { + idr_destroy(&minors_idr); + pr_err("Unable to allocate OpenCAPI persistent memory major number: %d\n", rc); + return rc; + } + + ocxlpmem_class = class_create(THIS_MODULE, "ocxl-pmem"); + if (IS_ERR(ocxlpmem_class)) { + idr_destroy(&minors_idr); + pr_err("Unable to create ocxl-pmem class\n"); + unregister_chrdev_region(ocxlpmem_dev, NUM_MINORS); + return PTR_ERR(ocxlpmem_class); + } + + return 0; +} + +static void file_exit(void) +{ + class_destroy(ocxlpmem_class); + unregister_chrdev_region(ocxlpmem_dev, NUM_MINORS); + idr_destroy(&minors_idr); +} + static int __init ocxlpmem_init(void) { - int rc = 0; + int rc; - rc = pci_register_driver(&pci_driver); + rc = file_init(); if (rc) return rc; + rc = pci_register_driver(&pci_driver); + if (rc) { + file_exit(); + return rc; + } + return 0; } static void ocxlpmem_exit(void) { pci_unregister_driver(&pci_driver); + file_exit(); } module_init(ocxlpmem_init); diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h index 28e2020f6355..d2d81fec7bb1 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -2,6 +2,7 @@ // Copyright 2019 IBM Corp. #include +#include #include #include #include @@ -99,6 +100,7 @@ struct ocxlpmem_function0 { struct ocxlpmem { struct device dev; struct pci_dev *pdev; + struct cdev cdev; struct ocxl_fn *ocxl_fn; struct nd_interleave_set nd_set; struct nvdimm_bus_descriptor bus_desc; From patchwork Fri Feb 21 03:27:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395383 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7CCF41395 for ; Fri, 21 Feb 2020 03:28:45 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6591B2465D for ; Fri, 21 Feb 2020 03:28:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6591B2465D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:12 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3RFqH44302716 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:27:15 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F21A511C04C; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 02DE611C050; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:09 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 92484A03DE; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 17/27] powerpc/powernv/pmem: Implement the Read Error Log command Date: Fri, 21 Feb 2020 14:27:10 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0012-0000-0000-00000388D1D0 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0013-0000-0000-000021C56A73 Message-Id: <20200221032720.33893-18-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 priorityscore=1501 suspectscore=3 spamscore=0 bulkscore=0 impostorscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: 2HFMAS2YA5XSPLUAIGOZ5CZIHGLYHCOH X-Message-ID-Hash: 2HFMAS2YA5XSPLUAIGOZ5CZIHGLYHCOH X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva The read error log command extracts information from the controller's internal error log. This patch exposes this information in 2 ways: - During probe, if an error occurs & a log is available, print it to the console - After probe, make the error log available to userspace via an IOCTL. Userspace is notified of pending error logs in a later patch ("powerpc/powernv/pmem: Forward events to userspace") Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 269 ++++++++++++++++++ .../platforms/powernv/pmem/ocxl_internal.h | 1 + include/uapi/nvdimm/ocxl-pmem.h | 46 +++ 3 files changed, 316 insertions(+) create mode 100644 include/uapi/nvdimm/ocxl-pmem.h diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index 63109a870d2c..2b64504f9129 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -447,10 +447,219 @@ static int file_release(struct inode *inode, struct file *file) return 0; } +/** + * error_log_header_parse() - Parse the first 64 bits of the error log command response + * @ocxlpmem: the device metadata + * @length: out, returns the number of bytes in the response (excluding the 64 bit header) + */ +static int error_log_header_parse(struct ocxlpmem *ocxlpmem, u16 *length) +{ + int rc; + u64 val; + + u16 data_identifier; + u32 data_length; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + data_identifier = val >> 48; + data_length = val & 0xFFFF; + + if (data_identifier != 0x454C) { // 'EL' + dev_err(&ocxlpmem->dev, + "Bad data identifier for error log data, expected 'EL', got '%2s' (%#x), data_length=%u\n", + (char *)&data_identifier, + (unsigned int)data_identifier, data_length); + return -EINVAL; + } + + *length = data_length; + return 0; +} + +static int error_log_offset_0x08(struct ocxlpmem *ocxlpmem, + u32 *log_identifier, u32 *program_ref_code) +{ + int rc; + u64 val; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + *log_identifier = val >> 32; + *program_ref_code = val & 0xFFFFFFFF; + + return 0; +} + +static int read_error_log(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_error_log *log, bool buf_is_user) +{ + u64 val; + u16 user_buf_length; + u16 buf_length; + u16 i; + int rc; + + if (log->buf_size % 8) + return -EINVAL; + + rc = ocxlpmem_chi(ocxlpmem, &val); + if (rc) + goto out; + + if (!(val & GLOBAL_MMIO_CHI_ELA)) + return -EAGAIN; + + user_buf_length = log->buf_size; + + mutex_lock(&ocxlpmem->admin_command.lock); + + rc = admin_command_request(ocxlpmem, ADMIN_COMMAND_ERRLOG); + if (rc) + goto out; + + rc = admin_command_execute(ocxlpmem); + if (rc) + goto out; + + rc = admin_command_complete_timeout(ocxlpmem, ADMIN_COMMAND_ERRLOG); + if (rc < 0) { + dev_warn(&ocxlpmem->dev, "Read error log timed out\n"); + goto out; + } + + rc = admin_response(ocxlpmem); + if (rc < 0) + goto out; + if (rc != STATUS_SUCCESS) { + warn_status(ocxlpmem, "Unexpected status from retrieve error log", rc); + goto out; + } + + + rc = error_log_header_parse(ocxlpmem, &log->buf_size); + if (rc) + goto out; + // log->buf_size now contains the returned buffer size, not the user size + + rc = error_log_offset_0x08(ocxlpmem, &log->log_identifier, + &log->program_reference_code); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x10, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + goto out; + + log->error_log_type = val >> 56; + log->action_flags = (log->error_log_type == OCXL_PMEM_ERROR_LOG_TYPE_GENERAL) ? + (val >> 32) & 0xFFFFFF : 0; + log->power_on_seconds = val & 0xFFFFFFFF; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x18, + OCXL_LITTLE_ENDIAN, &log->timestamp); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x20, + OCXL_HOST_ENDIAN, &log->wwid[0]); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x28, + OCXL_HOST_ENDIAN, &log->wwid[1]); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x30, + OCXL_HOST_ENDIAN, (u64 *)log->fw_revision); + if (rc) + goto out; + log->fw_revision[8] = '\0'; + + buf_length = (user_buf_length < log->buf_size) ? + user_buf_length : log->buf_size; + for (i = 0; i < buf_length + 0x48; i += 8) { + u64 val; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + i, + OCXL_HOST_ENDIAN, &val); + if (rc) + goto out; + + if (buf_is_user) { + if (copy_to_user(&log->buf[i], &val, sizeof(u64))) { + rc = -EFAULT; + goto out; + } + } else + log->buf[i] = val; + } + + rc = admin_response_handled(ocxlpmem); + if (rc) + goto out; + +out: + mutex_unlock(&ocxlpmem->admin_command.lock); + return rc; + +} + +static int ioctl_error_log(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_error_log __user *uarg) +{ + struct ioctl_ocxl_pmem_error_log args; + int rc; + + if (copy_from_user(&args, uarg, sizeof(args))) + return -EFAULT; + + rc = read_error_log(ocxlpmem, &args, true); + if (rc) + return rc; + + if (copy_to_user(uarg, &args, sizeof(args))) + return -EFAULT; + + return 0; +} + +static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) +{ + struct ocxlpmem *ocxlpmem = file->private_data; + int rc = -EINVAL; + + switch (cmd) { + case IOCTL_OCXL_PMEM_ERROR_LOG: + rc = ioctl_error_log(ocxlpmem, + (struct ioctl_ocxl_pmem_error_log __user *)args); + break; + } + return rc; +} + static const struct file_operations fops = { .owner = THIS_MODULE, .open = file_open, .release = file_release, + .unlocked_ioctl = file_ioctl, + .compat_ioctl = file_ioctl, }; /** @@ -527,6 +736,60 @@ static int read_device_metadata(struct ocxlpmem *ocxlpmem) return 0; } +static const char *decode_error_log_type(u8 error_log_type) +{ + switch (error_log_type) { + case 0x00: + return "general"; + case 0x01: + return "predictive failure"; + case 0x02: + return "thermal warning"; + case 0x03: + return "data loss"; + case 0x04: + return "health & performance"; + default: + return "unknown"; + } +} + +static void dump_error_log(struct ocxlpmem *ocxlpmem) +{ + struct ioctl_ocxl_pmem_error_log log; + u32 buf_size; + u8 *buf; + int rc; + + if (ocxlpmem->admin_command.data_size == 0) + return; + + buf_size = ocxlpmem->admin_command.data_size - 0x48; + buf = kzalloc(buf_size, GFP_KERNEL); + if (!buf) + return; + + log.buf = buf; + log.buf_size = buf_size; + + rc = read_error_log(ocxlpmem, &log, false); + if (rc < 0) + goto out; + + dev_warn(&ocxlpmem->dev, + "OCXL PMEM Error log: WWID=0x%016llx%016llx LID=0x%x PRC=%x type=0x%x %s, Uptime=%u seconds timestamp=0x%llx\n", + log.wwid[0], log.wwid[1], + log.log_identifier, log.program_reference_code, + log.error_log_type, + decode_error_log_type(log.error_log_type), + log.power_on_seconds, log.timestamp); + print_hex_dump(KERN_WARNING, "buf", DUMP_PREFIX_OFFSET, 16, 1, buf, + log.buf_size, false); + +out: + kfree(buf); +} + /** * probe_function0() - Set up function 0 for an OpenCAPI persistent memory device * This is important as it enables templates higher than 0 across all other functions, @@ -568,6 +831,7 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) struct ocxlpmem *ocxlpmem; int rc; u16 elapsed, timeout; + u64 chi; if (PCI_FUNC(pdev->devfn) == 0) return probe_function0(pdev); @@ -667,6 +931,11 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) return 0; err: + if (ocxlpmem && + (ocxlpmem_chi(ocxlpmem, &chi) == 0) && + (chi & GLOBAL_MMIO_CHI_ELA)) + dump_error_log(ocxlpmem); + /* * Further cleanup is done in the release handler via free_ocxlpmem() * This allows us to keep the character device live to handle IOCTLs to diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h index d2d81fec7bb1..b953ee522ed4 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -5,6 +5,7 @@ #include #include #include +#include #include #define LABEL_AREA_SIZE (1UL << PA_SECTION_SHIFT) diff --git a/include/uapi/nvdimm/ocxl-pmem.h b/include/uapi/nvdimm/ocxl-pmem.h new file mode 100644 index 000000000000..b10f8ac0c20f --- /dev/null +++ b/include/uapi/nvdimm/ocxl-pmem.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ +/* Copyright 2017 IBM Corp. */ +#ifndef _UAPI_OCXL_SCM_H +#define _UAPI_OCXL_SCM_H + +#include +#include + +#define OCXL_PMEM_ERROR_LOG_ACTION_RESET (1 << (32-32)) +#define OCXL_PMEM_ERROR_LOG_ACTION_CHKFW (1 << (53-32)) +#define OCXL_PMEM_ERROR_LOG_ACTION_REPLACE (1 << (54-32)) +#define OCXL_PMEM_ERROR_LOG_ACTION_DUMP (1 << (55-32)) + +#define OCXL_PMEM_ERROR_LOG_TYPE_GENERAL (0x00) +#define OCXL_PMEM_ERROR_LOG_TYPE_PREDICTIVE_FAILURE (0x01) +#define OCXL_PMEM_ERROR_LOG_TYPE_THERMAL_WARNING (0x02) +#define OCXL_PMEM_ERROR_LOG_TYPE_DATA_LOSS (0x03) +#define OCXL_PMEM_ERROR_LOG_TYPE_HEALTH_PERFORMANCE (0x04) + +struct ioctl_ocxl_pmem_error_log { + __u32 log_identifier; /* out */ + __u32 program_reference_code; /* out */ + __u32 action_flags; /* out, recommended course of action */ + __u32 power_on_seconds; /* out, Number of seconds the controller has been on when the error occurred */ + __u64 timestamp; /* out, relative time since the current IPL */ + __u64 wwid[2]; /* out, the NAA formatted WWID associated with the controller */ + char fw_revision[8+1]; /* out, firmware revision as null terminated text */ + __u16 buf_size; /* in/out, buffer size provided/required. + * If required is greater than provided, the buffer + * will be truncated to the amount provided. If its + * less, then only the required bytes will be populated. + * If it is 0, then there are no more error log entries. + */ + __u8 error_log_type; + __u8 reserved1; + __u32 reserved2; + __u64 reserved3[2]; + __u8 *buf; /* pointer to output buffer */ +}; + +/* ioctl numbers */ +#define OCXL_PMEM_MAGIC 0x5C +/* SCM devices */ +#define IOCTL_OCXL_PMEM_ERROR_LOG _IOWR(OCXL_PMEM_MAGIC, 0x01, struct ioctl_ocxl_pmem_error_log) + +#endif /* _UAPI_OCXL_SCM_H */ From patchwork Fri Feb 21 03:27:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395395 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 52FC91580 for ; Fri, 21 Feb 2020 03:28:52 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3B44424650 for ; Fri, 21 Feb 2020 03:28:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3B44424650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 5CF1010FC363C; Thu, 20 Feb 2020 19:29:23 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3708510FC3606 for ; Thu, 20 Feb 2020 19:29:16 -0800 (PST) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3JEZx020263 for ; Thu, 20 Feb 2020 22:28:23 -0500 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0b-001b2d01.pphosted.com with ESMTP id 2y8ubxhfj2-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:23 -0500 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:12 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SB5N31981874 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:11 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3697A52050; Fri, 21 Feb 2020 03:28:11 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 8A24B5204E; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id A30CDA03DF; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 18/27] powerpc/powernv/pmem: Add controller dump IOCTLs Date: Fri, 21 Feb 2020 14:27:11 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0016-0000-0000-000002E8CEC4 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0017-0000-0000-0000334BED97 Message-Id: <20200221032720.33893-19-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=74 mlxscore=74 bulkscore=0 lowpriorityscore=0 spamscore=74 suspectscore=1 mlxlogscore=-44 clxscore=1015 malwarescore=0 adultscore=0 impostorscore=0 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: CTIMOEWHFKUSLK4YQ4G2BENNVI2V6XUG X-Message-ID-Hash: CTIMOEWHFKUSLK4YQ4G2BENNVI2V6XUG X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch adds IOCTLs to allow userspace to request & fetch dumps of the internal controller state. This is useful during debugging or when a fatal error on the controller has occurred. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 132 +++++++++++++++++++++ include/uapi/nvdimm/ocxl-pmem.h | 15 +++ 2 files changed, 147 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index 2b64504f9129..2cabafe1fc58 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -640,6 +640,124 @@ static int ioctl_error_log(struct ocxlpmem *ocxlpmem, return 0; } +static int ioctl_controller_dump_data(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_controller_dump_data __user *uarg) +{ + struct ioctl_ocxl_pmem_controller_dump_data args; + u16 i; + u64 val; + int rc; + + if (copy_from_user(&args, uarg, sizeof(args))) + return -EFAULT; + + if (args.buf_size % 8) + return -EINVAL; + + if (args.buf_size > ocxlpmem->admin_command.data_size) + return -EINVAL; + + mutex_lock(&ocxlpmem->admin_command.lock); + + rc = admin_command_request(ocxlpmem, ADMIN_COMMAND_CONTROLLER_DUMP); + if (rc) + goto out; + + val = ((u64)args.offset) << 32; + val |= args.buf_size; + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.request_offset + 0x08, + OCXL_LITTLE_ENDIAN, val); + if (rc) + goto out; + + rc = admin_command_execute(ocxlpmem); + if (rc) + goto out; + + rc = admin_command_complete_timeout(ocxlpmem, + ADMIN_COMMAND_CONTROLLER_DUMP); + if (rc < 0) { + dev_warn(&ocxlpmem->dev, "Controller dump timed out\n"); + goto out; + } + + rc = admin_response(ocxlpmem); + if (rc < 0) + goto out; + if (rc != STATUS_SUCCESS) { + warn_status(ocxlpmem, + "Unexpected status from retrieve error log", + rc); + goto out; + } + + for (i = 0; i < args.buf_size; i += 8) { + u64 val; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + i, + OCXL_HOST_ENDIAN, &val); + if (rc) + goto out; + + if (copy_to_user(&args.buf[i], &val, sizeof(u64))) { + rc = -EFAULT; + goto out; + } + } + + if (copy_to_user(uarg, &args, sizeof(args))) { + rc = -EFAULT; + goto out; + } + + rc = admin_response_handled(ocxlpmem); + if (rc) + goto out; + +out: + mutex_unlock(&ocxlpmem->admin_command.lock); + return rc; +} + +int request_controller_dump(struct ocxlpmem *ocxlpmem) +{ + int rc; + u64 busy = 1; + + rc = ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHIC, + OCXL_LITTLE_ENDIAN, + GLOBAL_MMIO_CHI_CDA); + + + rc = ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_HCI, + OCXL_LITTLE_ENDIAN, + GLOBAL_MMIO_HCI_CONTROLLER_DUMP); + if (rc) + return rc; + + while (busy) { + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + GLOBAL_MMIO_HCI, + OCXL_LITTLE_ENDIAN, &busy); + if (rc) + return rc; + + busy &= GLOBAL_MMIO_HCI_CONTROLLER_DUMP; + cond_resched(); + } + + return 0; +} + +static int ioctl_controller_dump_complete(struct ocxlpmem *ocxlpmem) +{ + return ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_HCI, + OCXL_LITTLE_ENDIAN, + GLOBAL_MMIO_HCI_CONTROLLER_DUMP_COLLECTED); +} + static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) { struct ocxlpmem *ocxlpmem = file->private_data; @@ -650,7 +768,21 @@ static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) rc = ioctl_error_log(ocxlpmem, (struct ioctl_ocxl_pmem_error_log __user *)args); break; + + case IOCTL_OCXL_PMEM_CONTROLLER_DUMP: + rc = request_controller_dump(ocxlpmem); + break; + + case IOCTL_OCXL_PMEM_CONTROLLER_DUMP_DATA: + rc = ioctl_controller_dump_data(ocxlpmem, + (struct ioctl_ocxl_pmem_controller_dump_data __user *)args); + break; + + case IOCTL_OCXL_PMEM_CONTROLLER_DUMP_COMPLETE: + rc = ioctl_controller_dump_complete(ocxlpmem); + break; } + return rc; } diff --git a/include/uapi/nvdimm/ocxl-pmem.h b/include/uapi/nvdimm/ocxl-pmem.h index b10f8ac0c20f..d4d8512d03f7 100644 --- a/include/uapi/nvdimm/ocxl-pmem.h +++ b/include/uapi/nvdimm/ocxl-pmem.h @@ -38,9 +38,24 @@ struct ioctl_ocxl_pmem_error_log { __u8 *buf; /* pointer to output buffer */ }; +struct ioctl_ocxl_pmem_controller_dump_data { + __u8 *buf; /* pointer to output buffer */ + __u16 buf_size; /* in/out, buffer size provided/required. + * If required is greater than provided, the buffer + * will be truncated to the amount provided. If its + * less, then only the required bytes will be populated. + * If it is 0, then there is no more dump data available. + */ + __u32 offset; /* in, Offset within the dump */ + __u64 reserved[8]; +}; + /* ioctl numbers */ #define OCXL_PMEM_MAGIC 0x5C /* SCM devices */ #define IOCTL_OCXL_PMEM_ERROR_LOG _IOWR(OCXL_PMEM_MAGIC, 0x01, struct ioctl_ocxl_pmem_error_log) +#define IOCTL_OCXL_PMEM_CONTROLLER_DUMP _IO(OCXL_PMEM_MAGIC, 0x02) +#define IOCTL_OCXL_PMEM_CONTROLLER_DUMP_DATA _IOWR(OCXL_PMEM_MAGIC, 0x03, struct ioctl_ocxl_pmem_controller_dump_data) +#define IOCTL_OCXL_PMEM_CONTROLLER_DUMP_COMPLETE _IO(OCXL_PMEM_MAGIC, 0x04) #endif /* _UAPI_OCXL_SCM_H */ From patchwork Fri Feb 21 03:27:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395407 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 086FE1580 for ; Fri, 21 Feb 2020 03:28:58 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E4F5A20716 for ; Fri, 21 Feb 2020 03:28:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E4F5A20716 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A9F9C10FC3633; Thu, 20 Feb 2020 19:29:25 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 304A910FC3632 for ; Thu, 20 Feb 2020 19:29:20 -0800 (PST) Received: from pps.filterd (m0187473.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3JK9K021308 for ; Thu, 20 Feb 2020 22:28:27 -0500 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y8ucnrcg4-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:27 -0500 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:11 -0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SAF852232288 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:10 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B1D98A405B; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 16A03A405C; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id ACDD4A03E0; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 19/27] powerpc/powernv/pmem: Add an IOCTL to report controller statistics Date: Fri, 21 Feb 2020 14:27:12 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0012-0000-0000-00000388D1D2 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0013-0000-0000-000021C56A71 Message-Id: <20200221032720.33893-20-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 impostorscore=0 spamscore=0 phishscore=0 mlxlogscore=622 priorityscore=1501 clxscore=1015 suspectscore=1 bulkscore=0 mlxscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: VXGS2IIY5PAIG7SM3HSMPDJW6BQK5YPR X-Message-ID-Hash: VXGS2IIY5PAIG7SM3HSMPDJW6BQK5YPR X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva The controller can report a number of statistics that are useful in evaluating the performance and reliability of the card. This patch exposes this information via an IOCTL. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 185 +++++++++++++++++++++ include/uapi/nvdimm/ocxl-pmem.h | 17 ++ 2 files changed, 202 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index 2cabafe1fc58..009d4fd29e7d 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -758,6 +758,186 @@ static int ioctl_controller_dump_complete(struct ocxlpmem *ocxlpmem) GLOBAL_MMIO_HCI_CONTROLLER_DUMP_COLLECTED); } +/** + * controller_stats_header_parse() - Parse the first 64 bits of the controller stats admin command response + * @ocxlpmem: the device metadata + * @length: out, returns the number of bytes in the response (excluding the 64 bit header) + */ +static int controller_stats_header_parse(struct ocxlpmem *ocxlpmem, + u32 *length) +{ + int rc; + u64 val; + + u16 data_identifier; + u32 data_length; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + data_identifier = val >> 48; + data_length = val & 0xFFFFFFFF; + + if (data_identifier != 0x4353) { // 'CS' + dev_err(&ocxlpmem->dev, + "Bad data identifier for controller stats, expected 'CS', got '%-.*s'\n", + 2, (char *)&data_identifier); + return -EINVAL; + } + + *length = data_length; + return 0; +} + +static int ioctl_controller_stats(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_controller_stats __user *uarg) +{ + struct ioctl_ocxl_pmem_controller_stats args; + u32 length; + int rc; + u64 val; + + memset(&args, '\0', sizeof(args)); + + mutex_lock(&ocxlpmem->admin_command.lock); + + rc = admin_command_request(ocxlpmem, ADMIN_COMMAND_CONTROLLER_STATS); + if (rc) + goto out; + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.request_offset + 0x08, + OCXL_LITTLE_ENDIAN, 0); + if (rc) + goto out; + + rc = admin_command_execute(ocxlpmem); + if (rc) + goto out; + + + rc = admin_command_complete_timeout(ocxlpmem, + ADMIN_COMMAND_CONTROLLER_STATS); + if (rc < 0) { + dev_warn(&ocxlpmem->dev, "Controller stats timed out\n"); + goto out; + } + + rc = admin_response(ocxlpmem); + if (rc < 0) + goto out; + if (rc != STATUS_SUCCESS) { + warn_status(ocxlpmem, + "Unexpected status from controller stats", rc); + goto out; + } + + rc = controller_stats_header_parse(ocxlpmem, &length); + if (rc) + goto out; + + if (length != 0x140) + warn_status(ocxlpmem, + "Unexpected length for controller stats data, expected 0x140, got 0x%x", + length); + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x08, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + goto out; + + args.reset_count = val >> 32; + args.reset_uptime = val & 0xFFFFFFFF; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x10, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + goto out; + + args.power_on_uptime = val >> 32; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x08, + OCXL_LITTLE_ENDIAN, &args.host_load_count); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x10, + OCXL_LITTLE_ENDIAN, &args.host_store_count); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x18, + OCXL_LITTLE_ENDIAN, &args.media_read_count); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x20, + OCXL_LITTLE_ENDIAN, &args.media_write_count); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x28, + OCXL_LITTLE_ENDIAN, &args.cache_hit_count); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x30, + OCXL_LITTLE_ENDIAN, &args.cache_miss_count); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x38, + OCXL_LITTLE_ENDIAN, &args.media_read_latency); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x40, + OCXL_LITTLE_ENDIAN, &args.media_write_latency); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x48, + OCXL_LITTLE_ENDIAN, &args.cache_read_latency); + if (rc) + goto out; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + 0x08 + 0x40 + 0x50, + OCXL_LITTLE_ENDIAN, &args.cache_write_latency); + if (rc) + goto out; + + if (copy_to_user(uarg, &args, sizeof(args))) { + rc = -EFAULT; + goto out; + } + + rc = admin_response_handled(ocxlpmem); + if (rc) + goto out; + + rc = 0; + goto out; + +out: + mutex_unlock(&ocxlpmem->admin_command.lock); + return rc; +} + static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) { struct ocxlpmem *ocxlpmem = file->private_data; @@ -781,6 +961,11 @@ static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) case IOCTL_OCXL_PMEM_CONTROLLER_DUMP_COMPLETE: rc = ioctl_controller_dump_complete(ocxlpmem); break; + + case IOCTL_OCXL_PMEM_CONTROLLER_STATS: + rc = ioctl_controller_stats(ocxlpmem, + (struct ioctl_ocxl_pmem_controller_stats __user *)args); + break; } return rc; diff --git a/include/uapi/nvdimm/ocxl-pmem.h b/include/uapi/nvdimm/ocxl-pmem.h index d4d8512d03f7..add223aa2fdb 100644 --- a/include/uapi/nvdimm/ocxl-pmem.h +++ b/include/uapi/nvdimm/ocxl-pmem.h @@ -50,6 +50,22 @@ struct ioctl_ocxl_pmem_controller_dump_data { __u64 reserved[8]; }; +struct ioctl_ocxl_pmem_controller_stats { + __u32 reset_count; + __u32 reset_uptime; /* seconds */ + __u32 power_on_uptime; /* seconds */ + __u64 host_load_count; + __u64 host_store_count; + __u64 media_read_count; + __u64 media_write_count; + __u64 cache_hit_count; + __u64 cache_miss_count; + __u64 media_read_latency; /* nanoseconds */ + __u64 media_write_latency; /* nanoseconds */ + __u64 cache_read_latency; /* nanoseconds */ + __u64 cache_write_latency; /* nanoseconds */ +}; + /* ioctl numbers */ #define OCXL_PMEM_MAGIC 0x5C /* SCM devices */ @@ -57,5 +73,6 @@ struct ioctl_ocxl_pmem_controller_dump_data { #define IOCTL_OCXL_PMEM_CONTROLLER_DUMP _IO(OCXL_PMEM_MAGIC, 0x02) #define IOCTL_OCXL_PMEM_CONTROLLER_DUMP_DATA _IOWR(OCXL_PMEM_MAGIC, 0x03, struct ioctl_ocxl_pmem_controller_dump_data) #define IOCTL_OCXL_PMEM_CONTROLLER_DUMP_COMPLETE _IO(OCXL_PMEM_MAGIC, 0x04) +#define IOCTL_OCXL_PMEM_CONTROLLER_STATS _IO(OCXL_PMEM_MAGIC, 0x05) #endif /* _UAPI_OCXL_SCM_H */ From patchwork Fri Feb 21 03:27:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395389 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6F7B51395 for ; Fri, 21 Feb 2020 03:28:48 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 57324208E4 for ; Fri, 21 Feb 2020 03:28:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 57324208E4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 1F93810FC362B; Thu, 20 Feb 2020 19:29:23 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:12 -0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SBXr31981876 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:11 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 59E2A4C04A; Fri, 21 Feb 2020 03:28:11 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A9B2E4C040; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id B65B9A03E1; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 20/27] powerpc/powernv/pmem: Forward events to userspace Date: Fri, 21 Feb 2020 14:27:13 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0020-0000-0000-000003AC2213 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0021-0000-0000-000022042A34 Message-Id: <20200221032720.33893-21-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 clxscore=1015 malwarescore=0 adultscore=0 mlxlogscore=848 spamscore=0 suspectscore=3 mlxscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: PSBMNLNVEVLETRSONXYPO5WZ6GTRGRRQ X-Message-ID-Hash: PSBMNLNVEVLETRSONXYPO5WZ6GTRGRRQ X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva Some of the interrupts that the card generates are better handled by the userspace daemon, in particular: Controller Hardware/Firmware Fatal Controller Dump Available Error Log available This patch allows a userspace application to register an eventfd with the driver via SCM_IOCTL_EVENTFD to receive notifications of these interrupts. Userspace can then identify what events have occurred by calling SCM_IOCTL_EVENT_CHECK and checking against the SCM_IOCTL_EVENT_FOO masks. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 216 ++++++++++++++++++ .../platforms/powernv/pmem/ocxl_internal.h | 5 + include/uapi/nvdimm/ocxl-pmem.h | 16 ++ 3 files changed, 237 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index 009d4fd29e7d..e46696d3cc36 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -335,11 +336,22 @@ static void free_ocxlpmem(struct ocxlpmem *ocxlpmem) { int rc; + // Disable doorbells + (void)ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHIEC, + OCXL_LITTLE_ENDIAN, + GLOBAL_MMIO_CHI_ALL); + if (ocxlpmem->nvdimm_bus) nvdimm_bus_unregister(ocxlpmem->nvdimm_bus); free_minor(ocxlpmem); + if (ocxlpmem->irq_addr[1]) + iounmap(ocxlpmem->irq_addr[1]); + + if (ocxlpmem->irq_addr[0]) + iounmap(ocxlpmem->irq_addr[0]); + if (ocxlpmem->cdev.owner) cdev_del(&ocxlpmem->cdev); @@ -443,6 +455,11 @@ static int file_release(struct inode *inode, struct file *file) { struct ocxlpmem *ocxlpmem = file->private_data; + if (ocxlpmem->ev_ctx) { + eventfd_ctx_put(ocxlpmem->ev_ctx); + ocxlpmem->ev_ctx = NULL; + } + ocxlpmem_put(ocxlpmem); return 0; } @@ -938,6 +955,51 @@ static int ioctl_controller_stats(struct ocxlpmem *ocxlpmem, return rc; } +static int ioctl_eventfd(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_eventfd __user *uarg) +{ + struct ioctl_ocxl_pmem_eventfd args; + + if (copy_from_user(&args, uarg, sizeof(args))) + return -EFAULT; + + if (ocxlpmem->ev_ctx) + return -EINVAL; + + ocxlpmem->ev_ctx = eventfd_ctx_fdget(args.eventfd); + if (!ocxlpmem->ev_ctx) + return -EFAULT; + + return 0; +} + +static int ioctl_event_check(struct ocxlpmem *ocxlpmem, u64 __user *uarg) +{ + u64 val = 0; + int rc; + u64 chi = 0; + + rc = ocxlpmem_chi(ocxlpmem, &chi); + if (rc < 0) + return rc; + + if (chi & GLOBAL_MMIO_CHI_ELA) + val |= IOCTL_OCXL_PMEM_EVENT_ERROR_LOG_AVAILABLE; + + if (chi & GLOBAL_MMIO_CHI_CDA) + val |= IOCTL_OCXL_PMEM_EVENT_CONTROLLER_DUMP_AVAILABLE; + + if (chi & GLOBAL_MMIO_CHI_CFFS) + val |= IOCTL_OCXL_PMEM_EVENT_FIRMWARE_FATAL; + + if (chi & GLOBAL_MMIO_CHI_CHFS) + val |= IOCTL_OCXL_PMEM_EVENT_HARDWARE_FATAL; + + rc = copy_to_user((u64 __user *) uarg, &val, sizeof(val)); + + return rc; +} + static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) { struct ocxlpmem *ocxlpmem = file->private_data; @@ -966,6 +1028,15 @@ static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) rc = ioctl_controller_stats(ocxlpmem, (struct ioctl_ocxl_pmem_controller_stats __user *)args); break; + + case IOCTL_OCXL_PMEM_EVENTFD: + rc = ioctl_eventfd(ocxlpmem, + (struct ioctl_ocxl_pmem_eventfd __user *)args); + break; + + case IOCTL_OCXL_PMEM_EVENT_CHECK: + rc = ioctl_event_check(ocxlpmem, (u64 __user *)args); + break; } return rc; @@ -1107,6 +1178,146 @@ static void dump_error_log(struct ocxlpmem *ocxlpmem) kfree(buf); } +static irqreturn_t imn0_handler(void *private) +{ + struct ocxlpmem *ocxlpmem = private; + u64 chi = 0; + + (void)ocxlpmem_chi(ocxlpmem, &chi); + + if (chi & GLOBAL_MMIO_CHI_ELA) { + dev_warn(&ocxlpmem->dev, "Error log is available\n"); + + if (ocxlpmem->ev_ctx) + eventfd_signal(ocxlpmem->ev_ctx, 1); + } + + if (chi & GLOBAL_MMIO_CHI_CDA) { + dev_warn(&ocxlpmem->dev, "Controller dump is available\n"); + + if (ocxlpmem->ev_ctx) + eventfd_signal(ocxlpmem->ev_ctx, 1); + } + + + return IRQ_HANDLED; +} + +static irqreturn_t imn1_handler(void *private) +{ + struct ocxlpmem *ocxlpmem = private; + u64 chi = 0; + + (void)ocxlpmem_chi(ocxlpmem, &chi); + + if (chi & (GLOBAL_MMIO_CHI_CFFS | GLOBAL_MMIO_CHI_CHFS)) { + dev_err(&ocxlpmem->dev, + "Controller status is fatal, chi=0x%llx, going offline\n", chi); + + if (ocxlpmem->nvdimm_bus) { + nvdimm_bus_unregister(ocxlpmem->nvdimm_bus); + ocxlpmem->nvdimm_bus = NULL; + } + + if (ocxlpmem->ev_ctx) + eventfd_signal(ocxlpmem->ev_ctx, 1); + } + + return IRQ_HANDLED; +} + + +/** + * ocxlpmem_setup_irq() - Set up the IRQs for the OpenCAPI Persistent Memory device + * @ocxlpmem: the device metadata + * Return: 0 on success, negative on failure + */ +static int ocxlpmem_setup_irq(struct ocxlpmem *ocxlpmem) +{ + int rc; + u64 irq_addr; + + rc = ocxl_afu_irq_alloc(ocxlpmem->ocxl_context, &ocxlpmem->irq_id[0]); + if (rc) + return rc; + + rc = ocxl_irq_set_handler(ocxlpmem->ocxl_context, ocxlpmem->irq_id[0], + imn0_handler, NULL, ocxlpmem); + + irq_addr = ocxl_afu_irq_get_addr(ocxlpmem->ocxl_context, ocxlpmem->irq_id[0]); + if (!irq_addr) + return -EINVAL; + + ocxlpmem->irq_addr[0] = ioremap(irq_addr, PAGE_SIZE); + if (!ocxlpmem->irq_addr[0]) + return -EINVAL; + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_IMA0_OHP, + OCXL_LITTLE_ENDIAN, + (u64)ocxlpmem->irq_addr[0]); + if (rc) + goto out_irq0; + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_IMA0_CFP, + OCXL_LITTLE_ENDIAN, 0); + if (rc) + goto out_irq0; + + rc = ocxl_afu_irq_alloc(ocxlpmem->ocxl_context, &ocxlpmem->irq_id[1]); + if (rc) + goto out_irq0; + + + rc = ocxl_irq_set_handler(ocxlpmem->ocxl_context, ocxlpmem->irq_id[1], + imn1_handler, NULL, ocxlpmem); + if (rc) + goto out_irq0; + + irq_addr = ocxl_afu_irq_get_addr(ocxlpmem->ocxl_context, ocxlpmem->irq_id[1]); + if (!irq_addr) { + rc = -EFAULT; + goto out_irq0; + } + + ocxlpmem->irq_addr[1] = ioremap(irq_addr, PAGE_SIZE); + if (!ocxlpmem->irq_addr[1]) { + rc = -EINVAL; + goto out_irq0; + } + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_IMA1_OHP, + OCXL_LITTLE_ENDIAN, + (u64)ocxlpmem->irq_addr[1]); + if (rc) + goto out_irq1; + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_IMA1_CFP, + OCXL_LITTLE_ENDIAN, 0); + if (rc) + goto out_irq1; + + // Enable doorbells + rc = ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHIE, + OCXL_LITTLE_ENDIAN, + GLOBAL_MMIO_CHI_ELA | GLOBAL_MMIO_CHI_CDA | + GLOBAL_MMIO_CHI_CFFS | GLOBAL_MMIO_CHI_CHFS | + GLOBAL_MMIO_CHI_NSCRA); + if (rc) + goto out_irq1; + + return 0; + +out_irq1: + iounmap(ocxlpmem->irq_addr[1]); + ocxlpmem->irq_addr[1] = NULL; + +out_irq0: + iounmap(ocxlpmem->irq_addr[0]); + ocxlpmem->irq_addr[0] = NULL; + + return rc; +} + /** * probe_function0() - Set up function 0 for an OpenCAPI persistent memory device * This is important as it enables templates higher than 0 across all other functions, @@ -1216,6 +1427,11 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) goto err; } + if (ocxlpmem_setup_irq(ocxlpmem)) { + dev_err(&pdev->dev, "Could not set up OCXL IRQs\n"); + goto err; + } + if (setup_command_metadata(ocxlpmem)) { dev_err(&pdev->dev, "Could not read OCXL command matada\n"); goto err; diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h index b953ee522ed4..927690f4888f 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -103,6 +103,10 @@ struct ocxlpmem { struct pci_dev *pdev; struct cdev cdev; struct ocxl_fn *ocxl_fn; +#define SCM_IRQ_COUNT 2 + int irq_id[SCM_IRQ_COUNT]; + struct dev_pagemap irq_pgmap[SCM_IRQ_COUNT]; + void *irq_addr[SCM_IRQ_COUNT]; struct nd_interleave_set nd_set; struct nvdimm_bus_descriptor bus_desc; struct nvdimm_bus *nvdimm_bus; @@ -113,6 +117,7 @@ struct ocxlpmem { struct command_metadata ns_command; struct resource pmem_res; struct nd_region *nd_region; + struct eventfd_ctx *ev_ctx; char fw_version[8+1]; u32 timeouts[ADMIN_COMMAND_MAX+1]; diff --git a/include/uapi/nvdimm/ocxl-pmem.h b/include/uapi/nvdimm/ocxl-pmem.h index add223aa2fdb..988eb0bc413d 100644 --- a/include/uapi/nvdimm/ocxl-pmem.h +++ b/include/uapi/nvdimm/ocxl-pmem.h @@ -66,6 +66,20 @@ struct ioctl_ocxl_pmem_controller_stats { __u64 cache_write_latency; /* nanoseconds */ }; +struct ioctl_ocxl_pmem_eventfd { + __s32 eventfd; + __u32 reserved; +}; + +#ifndef BIT_ULL +#define BIT_ULL(nr) (1ULL << (nr)) +#endif + +#define IOCTL_OCXL_PMEM_EVENT_CONTROLLER_DUMP_AVAILABLE BIT_ULL(0) +#define IOCTL_OCXL_PMEM_EVENT_ERROR_LOG_AVAILABLE BIT_ULL(1) +#define IOCTL_OCXL_PMEM_EVENT_HARDWARE_FATAL BIT_ULL(2) +#define IOCTL_OCXL_PMEM_EVENT_FIRMWARE_FATAL BIT_ULL(3) + /* ioctl numbers */ #define OCXL_PMEM_MAGIC 0x5C /* SCM devices */ @@ -74,5 +88,7 @@ struct ioctl_ocxl_pmem_controller_stats { #define IOCTL_OCXL_PMEM_CONTROLLER_DUMP_DATA _IOWR(OCXL_PMEM_MAGIC, 0x03, struct ioctl_ocxl_pmem_controller_dump_data) #define IOCTL_OCXL_PMEM_CONTROLLER_DUMP_COMPLETE _IO(OCXL_PMEM_MAGIC, 0x04) #define IOCTL_OCXL_PMEM_CONTROLLER_STATS _IO(OCXL_PMEM_MAGIC, 0x05) +#define IOCTL_OCXL_PMEM_EVENTFD _IOW(OCXL_PMEM_MAGIC, 0x06, struct ioctl_ocxl_pmem_eventfd) +#define IOCTL_OCXL_PMEM_EVENT_CHECK _IOR(OCXL_PMEM_MAGIC, 0x07, __u64) #endif /* _UAPI_OCXL_SCM_H */ From patchwork Fri Feb 21 03:27:14 2020 Content-Type: text/plain; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:29:26 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SAFD49086646 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:11 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D8936AE04D; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 32941AE045; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id CA2C4A03E2; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 21/27] powerpc/powernv/pmem: Add an IOCTL to request controller health & perf data Date: Fri, 21 Feb 2020 14:27:14 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0020-0000-0000-000003AC221B X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0021-0000-0000-000022042A3E Message-Id: <20200221032720.33893-22-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 phishscore=0 adultscore=0 mlxscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxlogscore=632 suspectscore=1 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: 4UA2H7GCHVLDPL3DSTT76PJDYWYK656F X-Message-ID-Hash: 4UA2H7GCHVLDPL3DSTT76PJDYWYK656F X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva When health & performance data is requested from the controller, it responds with an error log containing the requested information. This patch allows the request to me issued via an IOCTL. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 16 ++++++++++++++++ include/uapi/nvdimm/ocxl-pmem.h | 1 + 2 files changed, 17 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index e46696d3cc36..081883a8247a 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -1000,6 +1000,18 @@ static int ioctl_event_check(struct ocxlpmem *ocxlpmem, u64 __user *uarg) return rc; } +/** + * req_controller_health_perf() - Request controller health & performance data + * @ocxlpmem: the device metadata + * Return: 0 on success, negative on failure + */ +int req_controller_health_perf(struct ocxlpmem *ocxlpmem) +{ + return ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_HCI, + OCXL_LITTLE_ENDIAN, + GLOBAL_MMIO_HCI_REQ_HEALTH_PERF); +} + static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) { struct ocxlpmem *ocxlpmem = file->private_data; @@ -1037,6 +1049,10 @@ static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) case IOCTL_OCXL_PMEM_EVENT_CHECK: rc = ioctl_event_check(ocxlpmem, (u64 __user *)args); break; + + case IOCTL_OCXL_PMEM_REQUEST_HEALTH: + rc = req_controller_health_perf(ocxlpmem); + break; } return rc; diff --git a/include/uapi/nvdimm/ocxl-pmem.h b/include/uapi/nvdimm/ocxl-pmem.h index 988eb0bc413d..0d03abb44001 100644 --- a/include/uapi/nvdimm/ocxl-pmem.h +++ b/include/uapi/nvdimm/ocxl-pmem.h @@ -90,5 +90,6 @@ struct ioctl_ocxl_pmem_eventfd { #define IOCTL_OCXL_PMEM_CONTROLLER_STATS _IO(OCXL_PMEM_MAGIC, 0x05) #define IOCTL_OCXL_PMEM_EVENTFD _IOW(OCXL_PMEM_MAGIC, 0x06, struct ioctl_ocxl_pmem_eventfd) #define IOCTL_OCXL_PMEM_EVENT_CHECK _IOR(OCXL_PMEM_MAGIC, 0x07, __u64) +#define IOCTL_OCXL_PMEM_REQUEST_HEALTH _IO(OCXL_PMEM_MAGIC, 0x08) #endif /* _UAPI_OCXL_SCM_H */ From patchwork Fri Feb 21 03:27:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395403 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9480C1395 for ; Fri, 21 Feb 2020 03:28:55 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C60B208E4 for ; Fri, 21 Feb 2020 03:28:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7C60B208E4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8602210FC36CE; Thu, 20 Feb 2020 19:29:24 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C2F3510FC360B for ; Thu, 20 Feb 2020 19:29:16 -0800 (PST) Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3KRO8014794 for ; Thu, 20 Feb 2020 22:28:24 -0500 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y8ubxwp5t-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:24 -0500 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:12 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SBMp64749690 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:11 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 78E59AE045; Fri, 21 Feb 2020 03:28:11 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C4B6BAE053; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id DE068A03E3; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 22/27] powerpc/powernv/pmem: Implement the heartbeat command Date: Fri, 21 Feb 2020 14:27:15 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-4275-0000-0000-000003A3FE66 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-4276-0000-0000-000038B80C7D Message-Id: <20200221032720.33893-23-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 suspectscore=1 malwarescore=0 mlxlogscore=876 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: 64QOM6UTXZ2JIW6KNNB656JVEGW5FETZ X-Message-ID-Hash: 64QOM6UTXZ2JIW6KNNB656JVEGW5FETZ X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva The heartbeat admin command is a simple admin command that exercises the communication mechanisms within the controller. This patch issues a heartbeat command to the card during init to ensure we can communicate with the card's controller. Signed-off-by: Alastair D'Silva Reviewed-by: Andrew Donnellan --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index 081883a8247a..e01f6f9fc180 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -306,6 +306,44 @@ static bool is_usable(const struct ocxlpmem *ocxlpmem, bool verbose) return true; } +/** + * heartbeat() - Issue a heartbeat command to the controller + * @ocxlpmem: the device metadata + * Return: 0 if the controller responded correctly, negative on error + */ +static int heartbeat(struct ocxlpmem *ocxlpmem) +{ + int rc; + + mutex_lock(&ocxlpmem->admin_command.lock); + + rc = admin_command_request(ocxlpmem, ADMIN_COMMAND_HEARTBEAT); + if (rc) + goto out; + + rc = admin_command_execute(ocxlpmem); + if (rc) + goto out; + + rc = admin_command_complete_timeout(ocxlpmem, ADMIN_COMMAND_HEARTBEAT); + if (rc < 0) { + dev_err(&ocxlpmem->dev, "Heartbeat timeout\n"); + goto out; + } + + rc = admin_response(ocxlpmem); + if (rc < 0) + goto out; + if (rc != STATUS_SUCCESS) + warn_status(ocxlpmem, "Unexpected status from heartbeat", rc); + + (void)admin_response_handled(ocxlpmem); + +out: + mutex_unlock(&ocxlpmem->admin_command.lock); + return rc; +} + /** * allocate_minor() - Allocate a minor number to use for an OpenCAPI pmem device * @ocxlpmem: the device metadata @@ -1458,6 +1496,11 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) goto err; } + if (heartbeat(ocxlpmem)) { + dev_err(&pdev->dev, "Heartbeat failed\n"); + goto err; + } + elapsed = 0; timeout = ocxlpmem->readiness_timeout + ocxlpmem->memory_available_timeout; while (!is_usable(ocxlpmem, false)) { From patchwork Fri Feb 21 03:27:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395399 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D21431580 for ; Fri, 21 Feb 2020 03:28:53 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BA69924650 for ; Fri, 21 Feb 2020 03:28:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BA69924650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 7210810FC36C7; Thu, 20 Feb 2020 19:29:24 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 80A7010FC361F for ; Thu, 20 Feb 2020 19:29:16 -0800 (PST) Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3JnaE013326 for ; Thu, 20 Feb 2020 22:28:23 -0500 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y8uc21hka-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:23 -0500 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:11 -0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SAl045154318 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:11 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DE07CA4054; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 432DBA405F; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id EF840A03E6; Fri, 21 Feb 2020 14:28:03 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 23/27] powerpc/powernv/pmem: Add debug IOCTLs Date: Fri, 21 Feb 2020 14:27:16 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0012-0000-0000-00000388D1D1 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0013-0000-0000-000021C56A72 Message-Id: <20200221032720.33893-24-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 phishscore=0 impostorscore=0 mlxscore=0 mlxlogscore=885 priorityscore=1501 lowpriorityscore=0 bulkscore=0 clxscore=1015 suspectscore=1 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: FNMTAPI7VKE7FMCKKXS5AGMZ2OKK5S7X X-Message-ID-Hash: FNMTAPI7VKE7FMCKKXS5AGMZ2OKK5S7X X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva These IOCTLs provide low level access to the card to aid in debugging controller/FPGA firmware. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/Kconfig | 6 + arch/powerpc/platforms/powernv/pmem/ocxl.c | 249 ++++++++++++++++++++ include/uapi/nvdimm/ocxl-pmem.h | 32 +++ 3 files changed, 287 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/Kconfig b/arch/powerpc/platforms/powernv/pmem/Kconfig index c5d927520920..3f44429d70c9 100644 --- a/arch/powerpc/platforms/powernv/pmem/Kconfig +++ b/arch/powerpc/platforms/powernv/pmem/Kconfig @@ -12,4 +12,10 @@ config OCXL_PMEM Select N if unsure. +config OCXL_PMEM_DEBUG + bool "OpenCAPI Persistent Memory debugging" + depends on OCXL_PMEM + help + Enables low level IOCTLs for OpenCAPI Persistent Memory firmware development + endif diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index e01f6f9fc180..d4ce5e9e0521 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -1050,6 +1050,235 @@ int req_controller_health_perf(struct ocxlpmem *ocxlpmem) GLOBAL_MMIO_HCI_REQ_HEALTH_PERF); } +#ifdef CONFIG_OCXL_PMEM_DEBUG +/** + * enable_fwdebug() - Enable FW debug on the controller + * @ocxlpmem: the device metadata + * Return: 0 on success, negative on failure + */ +static int enable_fwdebug(const struct ocxlpmem *ocxlpmem) +{ + return ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_HCI, + OCXL_LITTLE_ENDIAN, + GLOBAL_MMIO_HCI_FW_DEBUG); +} + +/** + * disable_fwdebug() - Disable FW debug on the controller + * @ocxlpmem: the device metadata + * Return: 0 on success, negative on failure + */ +static int disable_fwdebug(const struct ocxlpmem *ocxlpmem) +{ + return ocxl_global_mmio_set64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_HCIC, + OCXL_LITTLE_ENDIAN, + GLOBAL_MMIO_HCI_FW_DEBUG); +} + +static int ioctl_fwdebug(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_fwdebug __user *uarg) +{ + struct ioctl_ocxl_pmem_fwdebug args; + u64 val; + int i; + int rc; + + if (copy_from_user(&args, uarg, sizeof(args))) + return -EFAULT; + + // Buffer size must be a multiple of 8 + if ((args.buf_size & 0x07)) + return -EINVAL; + + if (args.buf_size > ocxlpmem->admin_command.data_size) + return -EINVAL; + + mutex_lock(&ocxlpmem->admin_command.lock); + + rc = enable_fwdebug(ocxlpmem); + if (rc) + goto out; + + rc = admin_command_request(ocxlpmem, ADMIN_COMMAND_FW_DEBUG); + if (rc) + goto out; + + // Write DebugAction & FunctionCode + val = ((u64)args.debug_action << 56) | ((u64)args.function_code << 40); + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.request_offset + 0x08, + OCXL_LITTLE_ENDIAN, val); + if (rc) + goto out; + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.request_offset + 0x10, + OCXL_LITTLE_ENDIAN, args.debug_parameter_1); + if (rc) + goto out; + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.request_offset + 0x18, + OCXL_LITTLE_ENDIAN, args.debug_parameter_2); + if (rc) + goto out; + + for (i = 0x20; i < 0x38; i += 0x08) + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.request_offset + i, + OCXL_LITTLE_ENDIAN, 0); + if (rc) + goto out; + + + // Populate admin command buffer + if (args.buf_size) { + for (i = 0; i < args.buf_size; i += sizeof(u64)) { + u64 val; + + if (copy_from_user(&val, &args.buf[i], sizeof(u64))) + return -EFAULT; + + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + i, + OCXL_HOST_ENDIAN, val); + if (rc) + goto out; + } + } + + rc = admin_command_execute(ocxlpmem); + if (rc) + goto out; + + rc = admin_command_complete_timeout(ocxlpmem, + ocxlpmem->timeouts[ADMIN_COMMAND_FW_DEBUG]); + if (rc < 0) + goto out; + + rc = admin_response(ocxlpmem); + if (rc < 0) + goto out; + if (rc != STATUS_SUCCESS) { + warn_status(ocxlpmem, "Unexpected status from FW Debug", rc); + goto out; + } + + if (args.buf_size) { + for (i = 0; i < args.buf_size; i += sizeof(u64)) { + u64 val; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + i, + OCXL_HOST_ENDIAN, &val); + if (rc) + goto out; + + if (copy_to_user(&args.buf[i], &val, sizeof(u64))) { + rc = -EFAULT; + goto out; + } + } + } + + rc = admin_response_handled(ocxlpmem); + if (rc) + goto out; + + rc = disable_fwdebug(ocxlpmem); + if (rc) + goto out; + +out: + mutex_unlock(&ocxlpmem->admin_command.lock); + return rc; +} + +static int ioctl_shutdown(struct ocxlpmem *ocxlpmem) +{ + int rc; + + mutex_lock(&ocxlpmem->admin_command.lock); + + rc = admin_command_request(ocxlpmem, ADMIN_COMMAND_SHUTDOWN); + if (rc) + goto out; + + rc = admin_command_execute(ocxlpmem); + if (rc) + goto out; + + rc = admin_command_complete_timeout(ocxlpmem, ADMIN_COMMAND_SHUTDOWN); + if (rc < 0) { + dev_warn(&ocxlpmem->dev, "Shutdown timed out\n"); + goto out; + } + + rc = 0; + goto out; + +out: + mutex_unlock(&ocxlpmem->admin_command.lock); + return rc; +} + +static int ioctl_mmio_write(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_mmio __user *uarg) +{ + struct scm_ioctl_mmio args; + + if (copy_from_user(&args, uarg, sizeof(args))) + return -EFAULT; + + return ocxl_global_mmio_write64(ocxlpmem->ocxl_afu, args.address, + OCXL_LITTLE_ENDIAN, args.val); +} + +static int ioctl_mmio_read(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_mmio __user *uarg) +{ + struct ioctl_ocxl_pmem_mmio args; + int rc; + + if (copy_from_user(&args, uarg, sizeof(args))) + return -EFAULT; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, args.address, + OCXL_LITTLE_ENDIAN, &args.val); + if (rc) + return rc; + + if (copy_to_user(uarg, &args, sizeof(args))) + return -EFAULT; + + return 0; +} +#else /* CONFIG_OCXL_PMEM_DEBUG */ +static int ioctl_fwdebug(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_fwdebug __user *uarg) +{ + return -EPERM; +} + +static int ioctl_shutdown(struct ocxlpmem *ocxlpmem) +{ + return -EPERM; +} + +static int ioctl_mmio_write(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_mmio __user *uarg) +{ + return -EPERM; +} + +static int ioctl_mmio_read(struct ocxlpmem *ocxlpmem, + struct ioctl_ocxl_pmem_mmio __user *uarg) +{ + return -EPERM; +} +#endif /* CONFIG_OCXL_PMEM_DEBUG */ + static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) { struct ocxlpmem *ocxlpmem = file->private_data; @@ -1091,6 +1320,26 @@ static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args) case IOCTL_OCXL_PMEM_REQUEST_HEALTH: rc = req_controller_health_perf(ocxlpmem); break; + + case IOCTL_OCXL_PMEM_FWDEBUG: + rc = ioctl_fwdebug(ocxlpmem, + (struct ioctl_ocxl_pmem_fwdebug __user *)args); + break; + + case IOCTL_OCXL_PMEM_SHUTDOWN: + rc = ioctl_shutdown(ocxlpmem); + break; + + case IOCTL_OCXL_PMEM_MMIO_WRITE: + rc = ioctl_mmio_write(ocxlpmem, + (struct ioctl_ocxl_pmem_mmio __user *)args); + break; + + case IOCTL_OCXL_PMEM_MMIO_READ: + rc = ioctl_mmio_read(ocxlpmem, + (struct ioctl_ocxl_pmem_mmio __user *)args); + break; + } return rc; diff --git a/include/uapi/nvdimm/ocxl-pmem.h b/include/uapi/nvdimm/ocxl-pmem.h index 0d03abb44001..e20a4f8be82a 100644 --- a/include/uapi/nvdimm/ocxl-pmem.h +++ b/include/uapi/nvdimm/ocxl-pmem.h @@ -6,6 +6,28 @@ #include #include +enum ocxlpmem_fwdebug_action { + OCXL_PMEM_FWDEBUG_READ_CONTROLLER_MEMORY = 0x01, + OCXL_PMEM_FWDEBUG_WRITE_CONTROLLER_MEMORY = 0x02, + OCXL_PMEM_FWDEBUG_ENABLE_FUNCTION = 0x03, + OCXL_PMEM_FWDEBUG_DISABLE_FUNCTION = 0x04, + OCXL_PMEM_FWDEBUG_GET_PEL = 0x05, // Retrieve Persistent Error Log +}; + +struct ioctl_ocxl_pmem_buffer_info { + __u32 admin_command_buffer_size; // out + __u32 near_storage_buffer_size; // out +}; + +struct ioctl_ocxl_pmem_fwdebug { // All args are inputs + enum ocxlpmem_fwdebug_action debug_action; + __u16 function_code; + __u16 buf_size; // Size of optional data buffer + __u64 debug_parameter_1; + __u64 debug_parameter_2; + __u8 *buf; // Pointer to optional in/out data buffer +}; + #define OCXL_PMEM_ERROR_LOG_ACTION_RESET (1 << (32-32)) #define OCXL_PMEM_ERROR_LOG_ACTION_CHKFW (1 << (53-32)) #define OCXL_PMEM_ERROR_LOG_ACTION_REPLACE (1 << (54-32)) @@ -66,6 +88,11 @@ struct ioctl_ocxl_pmem_controller_stats { __u64 cache_write_latency; /* nanoseconds */ }; +struct ioctl_ocxl_pmem_mmio { + __u64 address; /* Offset in global MMIO space */ + __u64 val; /* value to write/was read */ +}; + struct ioctl_ocxl_pmem_eventfd { __s32 eventfd; __u32 reserved; @@ -92,4 +119,9 @@ struct ioctl_ocxl_pmem_eventfd { #define IOCTL_OCXL_PMEM_EVENT_CHECK _IOR(OCXL_PMEM_MAGIC, 0x07, __u64) #define IOCTL_OCXL_PMEM_REQUEST_HEALTH _IO(OCXL_PMEM_MAGIC, 0x08) +#define IOCTL_OCXL_PMEM_FWDEBUG _IOWR(OCXL_PMEM_MAGIC, 0xf0, struct ioctl_ocxl_pmem_fwdebug) +#define IOCTL_OCXL_PMEM_MMIO_WRITE _IOW(OCXL_PMEM_MAGIC, 0xf1, struct ioctl_ocxl_pmem_mmio) +#define IOCTL_OCXL_PMEM_MMIO_READ _IOWR(OCXL_PMEM_MAGIC, 0xf2, struct ioctl_ocxl_pmem_mmio) +#define IOCTL_OCXL_PMEM_SHUTDOWN _IO(OCXL_PMEM_MAGIC, 0xf3) + #endif /* _UAPI_OCXL_SCM_H */ From patchwork Fri Feb 21 03:27:17 2020 Content-Type: text/plain; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:11 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SAf252232290 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:11 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CD3A552051; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 31D4E5204F; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 06839A03E7; Fri, 21 Feb 2020 14:28:04 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 24/27] powerpc/powernv/pmem: Expose SMART data via ndctl Date: Fri, 21 Feb 2020 14:27:17 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-4275-0000-0000-000003A3FE65 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-4276-0000-0000-000038B80C7B Message-Id: <20200221032720.33893-25-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 suspectscore=1 malwarescore=0 mlxlogscore=871 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: Q7JTHVE6B7QX3LZ2HFHIUTLDLOKLBEQC X-Message-ID-Hash: Q7JTHVE6B7QX3LZ2HFHIUTLDLOKLBEQC X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This patch retrieves proprietary formatted SMART data and makes it available via ndctl. A later contribution will be made to ndctl to parse this data. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl.c | 128 ++++++++++++++++++ .../platforms/powernv/pmem/ocxl_internal.h | 18 +++ include/uapi/linux/ndctl.h | 1 + 3 files changed, 147 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index d4ce5e9e0521..5cd1b6d78dd6 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -81,6 +81,129 @@ static int ndctl_config_size(struct nd_cmd_get_config_size *command) return 0; } +/** + * smart_header_parse() - Parse the first 64 bits of the SMART admin command response + * @ocxlpmem: the device metadata + * @length: out, returns the number of bytes in the response (excluding the 64 bit header) + */ +static int smart_header_parse(struct ocxlpmem *ocxlpmem, u32 *length) +{ + int rc; + u64 val; + + u16 data_identifier; + u32 data_length; + + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset, + OCXL_LITTLE_ENDIAN, &val); + if (rc) + return rc; + + data_identifier = val >> 48; + data_length = val & 0xFFFFFFFF; + + if (data_identifier != 0x534D) { // 'SM' + dev_err(&ocxlpmem->dev, + "Bad data identifier for smart data, expected 'SM', got '%-.*s'\n", + 2, (char *)&data_identifier); + return -EINVAL; + } + + *length = data_length; + return 0; +} + +static int ndctl_smart(struct ocxlpmem *ocxlpmem, struct nd_cmd_pkg *pkg) +{ + u32 length, i; + struct nd_ocxl_smart *out; + int rc; + + mutex_lock(&ocxlpmem->admin_command.lock); + + rc = admin_command_request(ocxlpmem, ADMIN_COMMAND_SMART); + if (rc) + goto out; + + rc = admin_command_execute(ocxlpmem); + if (rc) + goto out; + + rc = admin_command_complete_timeout(ocxlpmem, ADMIN_COMMAND_SMART); + if (rc < 0) { + dev_err(&ocxlpmem->dev, "SMART timeout\n"); + goto out; + } + + rc = admin_response(ocxlpmem); + if (rc < 0) + goto out; + if (rc != STATUS_SUCCESS) { + warn_status(ocxlpmem, "Unexpected status from SMART", rc); + goto out; + } + + rc = smart_header_parse(ocxlpmem, &length); + if (rc) + goto out; + + pkg->nd_fw_size = length; + + length = min(length, pkg->nd_size_out); // bytes + out = (struct nd_ocxl_smart *)pkg->nd_payload; + // Each SMART attribute is 2 * 64 bits + out->count = length / (2 * sizeof(u64)); // attributes + + for (i = 0; i < length; i += sizeof(u64)) { + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, + ocxlpmem->admin_command.data_offset + sizeof(u64) + i, + OCXL_LITTLE_ENDIAN, + &out->attribs[i/sizeof(u64)]); + if (rc) + goto out; + } + + rc = admin_response_handled(ocxlpmem); + if (rc) + goto out; + + rc = 0; + goto out; + +out: + mutex_unlock(&ocxlpmem->admin_command.lock); + return rc; +} + +static int ndctl_call(struct ocxlpmem *ocxlpmem, void *buf, unsigned int buf_len) +{ + struct nd_cmd_pkg *pkg = buf; + + if (buf_len < sizeof(struct nd_cmd_pkg)) { + dev_err(&ocxlpmem->dev, "Invalid ND_CALL size=%u\n", buf_len); + return -EINVAL; + } + + if (pkg->nd_family != NVDIMM_FAMILY_OCXL) { + dev_err(&ocxlpmem->dev, "Invalid ND_CALL family=0x%llx\n", pkg->nd_family); + return -EINVAL; + } + + switch (pkg->nd_command) { + case ND_CMD_OCXL_SMART: + ndctl_smart(ocxlpmem, pkg); + break; + + default: + dev_err(&ocxlpmem->dev, "Invalid ND_CALL command=0x%llx\n", pkg->nd_command); + return -EINVAL; + } + + + return 0; +} + static int ndctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) @@ -88,6 +211,10 @@ static int ndctl(struct nvdimm_bus_descriptor *nd_desc, struct ocxlpmem *ocxlpmem = container_of(nd_desc, struct ocxlpmem, bus_desc); switch (cmd) { + case ND_CMD_CALL: + *cmd_rc = ndctl_call(ocxlpmem, buf, buf_len); + return 0; + case ND_CMD_GET_CONFIG_SIZE: *cmd_rc = ndctl_config_size(buf); return 0; @@ -171,6 +298,7 @@ static int register_lpc_mem(struct ocxlpmem *ocxlpmem) set_bit(ND_CMD_GET_CONFIG_SIZE, &nvdimm_cmd_mask); set_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm_cmd_mask); set_bit(ND_CMD_SET_CONFIG_DATA, &nvdimm_cmd_mask); + set_bit(ND_CMD_CALL, &nvdimm_cmd_mask); set_bit(NDD_ALIASING, &nvdimm_flags); diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h index 927690f4888f..0eb7a35d24ae 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -7,6 +7,7 @@ #include #include #include +#include #define LABEL_AREA_SIZE (1UL << PA_SECTION_SHIFT) #define DEFAULT_TIMEOUT 100 @@ -98,6 +99,23 @@ struct ocxlpmem_function0 { struct ocxl_fn *ocxl_fn; }; +struct nd_ocxl_smart { + __u8 count; + __u8 reserved[7]; + __u64 attribs[0]; +} __packed; + +struct nd_pkg_ocxl { + struct nd_cmd_pkg gen; + union { + struct nd_ocxl_smart smart; + }; +}; + +enum nd_cmd_ocxl { + ND_CMD_OCXL_SMART = 1, +}; + struct ocxlpmem { struct device dev; struct pci_dev *pdev; diff --git a/include/uapi/linux/ndctl.h b/include/uapi/linux/ndctl.h index de5d90212409..2885052e7f40 100644 --- a/include/uapi/linux/ndctl.h +++ b/include/uapi/linux/ndctl.h @@ -244,6 +244,7 @@ struct nd_cmd_pkg { #define NVDIMM_FAMILY_HPE2 2 #define NVDIMM_FAMILY_MSFT 3 #define NVDIMM_FAMILY_HYPERV 4 +#define NVDIMM_FAMILY_OCXL 6 #define ND_IOCTL_CALL _IOWR(ND_IOCTL, ND_CMD_CALL,\ struct nd_cmd_pkg) From patchwork Fri Feb 21 03:27:18 2020 Content-Type: text/plain; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:12 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SBA740239416 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:11 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6D7105204E; Fri, 21 Feb 2020 03:28:11 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id C201652059; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 18E42A03E8; Fri, 21 Feb 2020 14:28:04 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 25/27] powerpc/powernv/pmem: Expose the serial number in sysfs Date: Fri, 21 Feb 2020 14:27:18 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-0016-0000-0000-000002E8CEC5 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-0017-0000-0000-0000334BED98 Message-Id: <20200221032720.33893-26-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 spamscore=0 priorityscore=1501 mlxlogscore=928 bulkscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 mlxscore=0 suspectscore=1 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: EKDRECFKL3JXN2Y3VHYWXWDMKRUOADMD X-Message-ID-Hash: EKDRECFKL3JXN2Y3VHYWXWDMKRUOADMD X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This information will be used by ndctl in userspace to help users identify the device. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/Makefile | 2 +- arch/powerpc/platforms/powernv/pmem/ocxl.c | 5 +++ .../platforms/powernv/pmem/ocxl_internal.h | 6 +++ .../platforms/powernv/pmem/ocxl_sysfs.c | 37 +++++++++++++++++++ 4 files changed, 49 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c diff --git a/arch/powerpc/platforms/powernv/pmem/Makefile b/arch/powerpc/platforms/powernv/pmem/Makefile index 4ceda25907d4..d02870806f30 100644 --- a/arch/powerpc/platforms/powernv/pmem/Makefile +++ b/arch/powerpc/platforms/powernv/pmem/Makefile @@ -4,4 +4,4 @@ ccflags-$(CONFIG_PPC_WERROR) += -Werror obj-$(CONFIG_OCXL_PMEM) += ocxlpmem.o -ocxlpmem-y := ocxl.o ocxl_internal.o +ocxlpmem-y := ocxl.o ocxl_internal.o ocxl_sysfs.o diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c b/arch/powerpc/platforms/powernv/pmem/ocxl.c index 5cd1b6d78dd6..ec73713d05ad 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c @@ -1878,6 +1878,11 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) goto err; } + if (ocxlpmem_sysfs_add(ocxlpmem)) { + dev_err(&pdev->dev, "Could not create sysfs entries\n"); + goto err; + } + elapsed = 0; timeout = ocxlpmem->readiness_timeout + ocxlpmem->memory_available_timeout; while (!is_usable(ocxlpmem, false)) { diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h index 0eb7a35d24ae..12304ceace61 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_internal.h @@ -246,3 +246,9 @@ int ns_response_handled(const struct ocxlpmem *ocxlpmem); */ void warn_status(const struct ocxlpmem *ocxlpmem, const char *message, u8 status); + +/** + * ocxlpmem_sysfs_add() - Create sysfs entries for an OpenCAPI persistent memory device + * @ocxlpmem: the device metadata + */ +int ocxlpmem_sysfs_add(struct ocxlpmem *ocxlpmem); diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c b/arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c new file mode 100644 index 000000000000..7829e4bc887d --- /dev/null +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright 2018 IBM Corp. + +#include +#include +#include +#include +#include "ocxl_internal.h" + +static ssize_t serial_show(struct device *device, struct device_attribute *attr, + char *buf) +{ + struct ocxlpmem *ocxlpmem = container_of(device, struct ocxlpmem, dev); + const struct ocxl_fn_config *fn_config = ocxl_function_config(ocxlpmem->ocxl_fn); + + return scnprintf(buf, PAGE_SIZE, "%llu\n", fn_config->serial); +} + +static struct device_attribute attrs[] = { + __ATTR_RO(serial), +}; + +int ocxlpmem_sysfs_add(struct ocxlpmem *ocxlpmem) +{ + int i, rc; + + for (i = 0; i < ARRAY_SIZE(attrs); i++) { + rc = device_create_file(&ocxlpmem->dev, &attrs[i]); + if (rc) { + for (; --i >= 0;) + device_remove_file(&ocxlpmem->dev, &attrs[i]); + + return rc; + } + } + return 0; +} From patchwork Fri Feb 21 03:27:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395357 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 30A6418EC for ; Fri, 21 Feb 2020 03:28:33 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1914C24653 for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:12 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SB1932702828 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:11 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 211175204F; Fri, 21 Feb 2020 03:28:11 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id BE8B352057; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 2E244A03E9; Fri, 21 Feb 2020 14:28:04 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 26/27] powerpc/powernv/pmem: Expose the firmware version in sysfs Date: Fri, 21 Feb 2020 14:27:19 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-4275-0000-0000-000003A3FE63 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-4276-0000-0000-000038B80C7C Message-Id: <20200221032720.33893-27-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 spamscore=0 priorityscore=1501 mlxlogscore=859 bulkscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 mlxscore=0 suspectscore=1 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: 5BLURFYJWHVJR7QHVWU74Y7LYSOLSX7S X-Message-ID-Hash: 5BLURFYJWHVJR7QHVWU74Y7LYSOLSX7S X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva This information will be used by ndctl in userspace to help users identify the device. Signed-off-by: Alastair D'Silva --- arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c b/arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c index 7829e4bc887d..84b23cc3e8b7 100644 --- a/arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c +++ b/arch/powerpc/platforms/powernv/pmem/ocxl_sysfs.c @@ -16,8 +16,17 @@ static ssize_t serial_show(struct device *device, struct device_attribute *attr, return scnprintf(buf, PAGE_SIZE, "%llu\n", fn_config->serial); } +static ssize_t fw_version_show(struct device *device, + struct device_attribute *attr, char *buf) +{ + struct ocxlpmem *ocxlpmem = container_of(device, struct ocxlpmem, dev); + + return scnprintf(buf, PAGE_SIZE, "%s\n", ocxlpmem->fw_version); +} + static struct device_attribute attrs[] = { __ATTR_RO(serial), + __ATTR_RO(fw_version), }; int ocxlpmem_sysfs_add(struct ocxlpmem *ocxlpmem) From patchwork Fri Feb 21 03:27:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alastair D'Silva X-Patchwork-Id: 11395385 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E59351580 for ; Fri, 21 Feb 2020 03:28:46 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CDD5324650 for ; Fri, 21 Feb 2020 03:28:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CDD5324650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=au1.ibm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id F3ADF10FC36C3; Thu, 20 Feb 2020 19:29:21 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=alastair@au1.ibm.com; receiver= Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0DDBE10FC3617 for ; Thu, 20 Feb 2020 19:29:15 -0800 (PST) Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01L3KCDf143866 for ; Thu, 20 Feb 2020 22:28:23 -0500 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0a-001b2d01.pphosted.com with ESMTP id 2y8ubc1962-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Feb 2020 22:28:23 -0500 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 21 Feb 2020 03:28:11 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01L3SA5u32702822 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 21 Feb 2020 03:28:10 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8B08311C04A; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3EB4C11C058; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 21 Feb 2020 03:28:10 +0000 (GMT) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 418CAA03EA; Fri, 21 Feb 2020 14:28:04 +1100 (AEDT) From: "Alastair D'Silva" To: alastair@d-silva.org Subject: [PATCH v3 27/27] MAINTAINERS: Add myself & nvdimm/ocxl to ocxl Date: Fri, 21 Feb 2020 14:27:20 +1100 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200221032720.33893-1-alastair@au1.ibm.com> References: <20200221032720.33893-1-alastair@au1.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022103-4275-0000-0000-000003A3FE64 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022103-4276-0000-0000-000038B80C7A Message-Id: <20200221032720.33893-28-alastair@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_19:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 phishscore=0 adultscore=0 mlxscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxlogscore=553 suspectscore=1 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002210020 Message-ID-Hash: VA5XMOQJV4G4OAPOASD6IT32GQQMVWR3 X-Message-ID-Hash: VA5XMOQJV4G4OAPOASD6IT32GQQMVWR3 X-MailFrom: alastair@au1.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: "Aneesh Kumar K . V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Frederic Barrat , Andrew Donnellan , Arnd Bergmann , Greg Kroah-Hartman , Andrew Morton , Mauro Carvalho Chehab , "David S. Miller" , Rob Herring , Anton Blanchard , Krzysztof Kozlowski , Mahesh Salgaonkar , Madhavan Srinivasan , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Anju T Sudhakar , Hari Bathini , Thomas Gleixner , Greg Kurz , Nicholas Piggin , Masahiro Yamada , Alexey Kardashevskiy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-nvdimm@lists.01.org, linux-mm@kvack.org X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: From: Alastair D'Silva The OpenCAPI Persistent Memory driver will be maintained as part ofi the ppc tree. I'm also adding myself as an author of the driver & contributor to the generic ocxl driver. Signed-off-by: Alastair D'Silva --- MAINTAINERS | 3 +++ 1 file changed, 3 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index f8670989ec91..3fb9a9f576a7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12064,13 +12064,16 @@ F: tools/objtool/ OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER M: Frederic Barrat M: Andrew Donnellan +M: Alastair D'Silva L: linuxppc-dev@lists.ozlabs.org S: Supported F: arch/powerpc/platforms/powernv/ocxl.c +F: arch/powerpc/platforms/powernv/pmem/* F: arch/powerpc/include/asm/pnv-ocxl.h F: drivers/misc/ocxl/ F: include/misc/ocxl* F: include/uapi/misc/ocxl.h +F: include/uapi/nvdimm/ocxl-pmem.h F: Documentation/userspace-api/accelerators/ocxl.rst OMAP AUDIO SUPPORT