From patchwork Fri Sep 28 14:45:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Grodzovsky X-Patchwork-Id: 10620095 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4DE20112B for ; Fri, 28 Sep 2018 14:45:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 36F182B948 for ; Fri, 28 Sep 2018 14:45:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B3C22B987; Fri, 28 Sep 2018 14:45:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 64F5A2B095 for ; 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@@ -290,7 +290,7 @@ amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size, request.alloc_size = size; request.phys_alignment = alignment; request.preferred_heap = heap; - request.flags = flags; + request.flags = alloc_flags; r = amdgpu_bo_alloc(dev, &request, &buf_handle); if (r) @@ -301,57 +301,20 @@ amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size, return 0; } +int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size, + unsigned alignment, unsigned heap, uint64_t alloc_flags, + uint64_t mapping_flags, amdgpu_bo_handle *bo, void **cpu, + uint64_t *mc_address, + amdgpu_va_handle *va_handle); + static inline int amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, - unsigned alignment, unsigned heap, uint64_t flags, + unsigned alignment, unsigned heap, uint64_t alloc_flags, amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address, amdgpu_va_handle *va_handle) { - struct amdgpu_bo_alloc_request request = {}; - amdgpu_bo_handle buf_handle; - amdgpu_va_handle handle; - uint64_t vmc_addr; - int r; - - request.alloc_size = size; - request.phys_alignment = alignment; - request.preferred_heap = heap; - request.flags = flags; - - r = amdgpu_bo_alloc(dev, &request, &buf_handle); - if (r) - return r; - - r = amdgpu_va_range_alloc(dev, - amdgpu_gpu_va_range_general, - size, alignment, 0, &vmc_addr, - &handle, 0); - if (r) - goto error_va_alloc; - - r = amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_MAP); - if (r) - goto error_va_map; - - r = amdgpu_bo_cpu_map(buf_handle, cpu); - if (r) - goto error_cpu_map; - - *bo = buf_handle; - *mc_address = vmc_addr; - *va_handle = handle; - - return 0; - -error_cpu_map: - amdgpu_bo_cpu_unmap(buf_handle); - -error_va_map: - amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP); - -error_va_alloc: - amdgpu_bo_free(buf_handle); - return r; + return amdgpu_bo_alloc_and_map_raw(dev, size, alignment, heap, + alloc_flags, 0, bo, cpu, mc_address, va_handle); } static inline int diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 1adbddd..cceffc7 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -33,6 +33,7 @@ #include "amdgpu_test.h" #include "amdgpu_drm.h" +#include "util_math.h" static amdgpu_device_handle device_handle; static uint32_t major_version; @@ -286,6 +287,66 @@ static uint32_t shader_bin[] = { #define DATA_OFFSET 1024 +int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size, + unsigned alignment, unsigned heap, uint64_t alloc_flags, + uint64_t mapping_flags, amdgpu_bo_handle *bo, void **cpu, + uint64_t *mc_address, + amdgpu_va_handle *va_handle) +{ + struct amdgpu_bo_alloc_request request = {}; + amdgpu_bo_handle buf_handle; + amdgpu_va_handle handle; + uint64_t vmc_addr; + int r; + + request.alloc_size = size; + request.phys_alignment = alignment; + request.preferred_heap = heap; + request.flags = alloc_flags; + + r = amdgpu_bo_alloc(dev, &request, &buf_handle); + if (r) + return r; + + r = amdgpu_va_range_alloc(dev, + amdgpu_gpu_va_range_general, + size, alignment, 0, &vmc_addr, + &handle, 0); + if (r) + goto error_va_alloc; + + r = amdgpu_bo_va_op_raw(dev, buf_handle, 0, ALIGN(size, getpagesize()), vmc_addr, + AMDGPU_VM_PAGE_READABLE | + AMDGPU_VM_PAGE_WRITEABLE | + AMDGPU_VM_PAGE_EXECUTABLE | + alloc_flags, + AMDGPU_VA_OP_MAP); + if (r) + goto error_va_map; + + r = amdgpu_bo_cpu_map(buf_handle, cpu); + if (r) + goto error_cpu_map; + + *bo = buf_handle; + *mc_address = vmc_addr; + *va_handle = handle; + + return 0; + + error_cpu_map: + amdgpu_bo_cpu_unmap(buf_handle); + + error_va_map: + amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP); + + error_va_alloc: + amdgpu_bo_free(buf_handle); + return r; +} + + + int suite_basic_tests_init(void) { struct amdgpu_gpu_info gpu_info = {0}; From patchwork Fri Sep 28 14:45:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrey Grodzovsky X-Patchwork-Id: 10620097 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D1345112B for ; Fri, 28 Sep 2018 14:46:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BFC012B8DA for ; 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Fri, 28 Sep 2018 09:45:56 -0500 From: Andrey Grodzovsky To: , Subject: [PATCH libdrm v2 2/2] amdgpu/test: Fix deadlock tests for AI and RV v2 Date: Fri, 28 Sep 2018 10:45:08 -0400 Message-ID: <1538145908-3153-2-git-send-email-andrey.grodzovsky@amd.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538145908-3153-1-git-send-email-andrey.grodzovsky@amd.com> References: <1538145908-3153-1-git-send-email-andrey.grodzovsky@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(39860400002)(136003)(346002)(376002)(396003)(2980300002)(428003)(199004)(189003)(6636002)(356003)(6666003)(336012)(5660300001)(316002)(72206003)(44832011)(105586002)(476003)(97736004)(126002)(16586007)(50466002)(48376002)(2616005)(34290500001)(426003)(11346002)(305945005)(53416004)(446003)(2906002)(450100002)(106466001)(104016004)(47776003)(86362001)(81166006)(26005)(8676002)(14444005)(186003)(50226002)(478600001)(76176011)(53936002)(486006)(110136005)(54906003)(77096007)(51416003)(8936002)(36756003)(81156014)(7696005)(68736007)(4326008); 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BN4PR12MB0740; 20:FETjwK5DccpXfen1FojpfTGwLFApaASmzmvI8+69Y0EhclhpIzdHdCJhDeORtIBYASb+U2gjepKlM9Za176yihYSNr6RxyCBT/9xtXJR6sQy5rMMTosHgpRKvIHDK7ShyyFGanz/07jT9aOcGKVrupNAeLt78TzcmlLGRgsS0mcWQ7bZFd4aQfl6fe9X0bFD6cDrGtHeTlFleNAXho9uO+2KFn8If4M08PGzrDtvCE6dIZG5PM2sT2Zqgomy2PrD X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Sep 2018 14:45:56.6524 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 081e1cfd-35cf-4ee5-76fa-08d62551196b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXCHOV01.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN4PR12MB0740 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: amd-gfx@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Seems like AI and RV requires uncashed memory mapping to be able to pickup value written to memory by CPU after the WAIT_REG_MEM command was already launched. . Enable the test for AI and RV. v2: Update commit description. Signed-off-by: Andrey Grodzovsky Reviewed-by: Marek Olšák --- tests/amdgpu/deadlock_tests.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/tests/amdgpu/deadlock_tests.c b/tests/amdgpu/deadlock_tests.c index 304482d..292ec4e 100644 --- a/tests/amdgpu/deadlock_tests.c +++ b/tests/amdgpu/deadlock_tests.c @@ -80,6 +80,8 @@ static uint32_t minor_version; static pthread_t stress_thread; static uint32_t *ptr; +int use_uc_mtype = 0; + static void amdgpu_deadlock_helper(unsigned ip_type); static void amdgpu_deadlock_gfx(void); static void amdgpu_deadlock_compute(void); @@ -92,13 +94,14 @@ CU_BOOL suite_deadlock_tests_enable(void) &minor_version, &device_handle)) return CU_FALSE; - if (device_handle->info.family_id == AMDGPU_FAMILY_AI || - device_handle->info.family_id == AMDGPU_FAMILY_SI || - device_handle->info.family_id == AMDGPU_FAMILY_RV) { + if (device_handle->info.family_id == AMDGPU_FAMILY_SI) { printf("\n\nCurrently hangs the CP on this ASIC, deadlock suite disabled\n"); enable = CU_FALSE; } + if (device_handle->info.family_id >= AMDGPU_FAMILY_AI) + use_uc_mtype = 1; + if (amdgpu_device_deinitialize(device_handle)) return CU_FALSE; @@ -183,8 +186,8 @@ static void amdgpu_deadlock_helper(unsigned ip_type) r = amdgpu_cs_ctx_create(device_handle, &context_handle); CU_ASSERT_EQUAL(r, 0); - r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096, - AMDGPU_GEM_DOMAIN_GTT, 0, + r = amdgpu_bo_alloc_and_map_raw(device_handle, 4096, 4096, + AMDGPU_GEM_DOMAIN_GTT, 0, use_uc_mtype ? AMDGPU_VM_MTYPE_UC : 0, &ib_result_handle, &ib_result_cpu, &ib_result_mc_address, &va_handle); CU_ASSERT_EQUAL(r, 0);