From patchwork Mon Feb 24 03:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 11399197 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DB2F714BC for ; Mon, 24 Feb 2020 03:14:09 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B1E0920675 for ; Mon, 24 Feb 2020 03:14:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Hl3u6ty8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B1E0920675 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:59102 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j64C8-0003e9-Pr for patchwork-qemu-devel@patchwork.kernel.org; Sun, 23 Feb 2020 22:14:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55769) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j64Bd-000364-CP for qemu-devel@nongnu.org; Sun, 23 Feb 2020 22:13:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j64Bb-0000N7-KI for qemu-devel@nongnu.org; Sun, 23 Feb 2020 22:13:36 -0500 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:49784 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j64Bb-0000Mi-6s for qemu-devel@nongnu.org; Sun, 23 Feb 2020 22:13:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1582514014; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=4CzboXwg1gWo9TZKssbatq5M6sKvMbEROQSbtSwtE1E=; b=Hl3u6ty8cERG98BXtGzdfqGI3rJiQ5sg7gCMO11Q1iaApa2Fiy8uWrvYCW56PmoXFRX9ir K5z9DEkNHwwJ1xBfVI1H7VPwtYmDuwia9GGKDGL+HgAG0dV8sj8CyZkPGFe8LN8npk/ikz wBwGWKdiQUTl/aaUoOgWj2KiIm0AeYA= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-190-xNNXLyR8OymBEgbmArWC2g-1; Sun, 23 Feb 2020 22:13:32 -0500 X-MC-Unique: xNNXLyR8OymBEgbmArWC2g-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B3E6A13E2; Mon, 24 Feb 2020 03:13:31 +0000 (UTC) Received: from localhost.localdomain.com (vpn2-54-48.bne.redhat.com [10.64.54.48]) by smtp.corp.redhat.com (Postfix) with ESMTP id 70C9F60BF4; Mon, 24 Feb 2020 03:13:26 +0000 (UTC) From: Gavin Shan To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH v2] hw/char/pl011: Enable TxFIFO and async transmission Date: Mon, 24 Feb 2020 14:13:19 +1100 Message-Id: <20200224031319.84392-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, philmd@redhat.com, shan.gavin@gmail.com, marcandre.lureau@redhat.com, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is disabled when its depth is 1. It's nice to have TxFIFO enabled if possible because more characters can be piled and transmitted at once, which would have less overhead. Besides, we can be blocked because of qemu_chr_fe_write_all(), which isn't nice. This enables TxFIFO if possible. On ther other hand, the asynchronous transmission is enabled if needed, as we did in hw/char/cadence_uart.c Signed-off-by: Gavin Shan --- v2: Put write_{count,fifo} into migration subsection Don't start async IO handle if it has been started, to avoid race Update with PL011_FLAG_{TXFF,TXFE} on changing write_count --- hw/char/pl011.c | 105 +++++++++++++++++++++++++++++++++++++--- include/hw/char/pl011.h | 3 ++ 2 files changed, 102 insertions(+), 6 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 13e784f9d9..de5c4254fe 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -169,6 +169,73 @@ static void pl011_set_read_trigger(PL011State *s) s->read_trigger = 1; } +static gboolean pl011_xmit(GIOChannel *chan, GIOCondition cond, void *opaque) +{ + PL011State *s = (PL011State *)opaque; + int ret; + + /* Drain FIFO if there is no backend */ + if (!qemu_chr_fe_backend_connected(&s->chr)) { + s->write_count = 0; + s->flags &= ~PL011_FLAG_TXFF; + s->flags |= PL011_FLAG_TXFE; + return FALSE; + } + + /* Nothing to do */ + if (!s->write_count) { + return FALSE; + } + + ret = qemu_chr_fe_write(&s->chr, s->write_fifo, s->write_count); + if (ret > 0) { + s->write_count -= ret; + memmove(s->write_fifo, s->write_fifo + ret, s->write_count); + s->flags &= ~PL011_FLAG_TXFF; + if (!s->write_count) { + s->flags |= PL011_FLAG_TXFE; + } + } + + if (s->write_count) { + s->watch_tag = qemu_chr_fe_add_watch(&s->chr, G_IO_OUT | G_IO_HUP, + pl011_xmit, s); + if (!s->watch_tag) { + s->write_count = 0; + s->flags &= ~PL011_FLAG_TXFF; + s->flags |= PL011_FLAG_TXFE; + return FALSE; + } + } + + s->int_level |= PL011_INT_TX; + pl011_update(s); + return FALSE; +} + +static void pl011_write_fifo(void *opaque, const unsigned char *buf, int size) +{ + PL011State *s = (PL011State *)opaque; + int depth = (s->lcr & 0x10) ? 16 : 1; + + if (size >= (depth - s->write_count)) { + size = depth - s->write_count; + } + + if (size > 0) { + memcpy(s->write_fifo + s->write_count, buf, size); + s->write_count += size; + if (s->write_count >= depth) { + s->flags |= PL011_FLAG_TXFF; + } + s->flags &= ~PL011_FLAG_TXFE; + } + + if (!s->watch_tag) { + pl011_xmit(NULL, G_IO_OUT, s); + } +} + static void pl011_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { @@ -179,13 +246,8 @@ static void pl011_write(void *opaque, hwaddr offset, switch (offset >> 2) { case 0: /* UARTDR */ - /* ??? Check if transmitter is enabled. */ ch = value; - /* XXX this blocks entire thread. Rewrite to use - * qemu_chr_fe_write and background I/O callbacks */ - qemu_chr_fe_write_all(&s->chr, &ch, 1); - s->int_level |= PL011_INT_TX; - pl011_update(s); + pl011_write_fifo(opaque, &ch, 1); break; case 1: /* UARTRSR/UARTECR */ s->rsr = 0; @@ -207,7 +269,16 @@ static void pl011_write(void *opaque, hwaddr offset, if ((s->lcr ^ value) & 0x10) { s->read_count = 0; s->read_pos = 0; + + if (s->watch_tag) { + g_source_remove(s->watch_tag); + s->watch_tag = 0; + } + s->write_count = 0; + s->flags &= ~PL011_FLAG_TXFF; + s->flags |= PL011_FLAG_TXFE; } + s->lcr = value; pl011_set_read_trigger(s); break; @@ -292,6 +363,24 @@ static const MemoryRegionOps pl011_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; +static bool pl011_write_fifo_needed(void *opaque) +{ + PL011State *s = (PL011State *)opaque; + return s->write_count > 0; +} + +static const VMStateDescription vmstate_pl011_write_fifo = { + .name = "pl011/write_fifo", + .version_id = 1, + .minimum_version_id = 1, + .needed = pl011_write_fifo_needed, + .fields = (VMStateField[]) { + VMSTATE_INT32(write_count, PL011State), + VMSTATE_UINT8_ARRAY(write_fifo, PL011State, 16), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_pl011 = { .name = "pl011", .version_id = 2, @@ -314,6 +403,10 @@ static const VMStateDescription vmstate_pl011 = { VMSTATE_INT32(read_count, PL011State), VMSTATE_INT32(read_trigger, PL011State), VMSTATE_END_OF_LIST() + }, + .subsections = (const VMStateDescription * []) { + &vmstate_pl011_write_fifo, + NULL } }; diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index 14187165c6..9d1c24db48 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -38,6 +38,7 @@ typedef struct PL011State { uint32_t int_enabled; uint32_t int_level; uint32_t read_fifo[16]; + uint8_t write_fifo[16]; uint32_t ilpr; uint32_t ibrd; uint32_t fbrd; @@ -45,6 +46,8 @@ typedef struct PL011State { int read_pos; int read_count; int read_trigger; + int write_count; + guint watch_tag; CharBackend chr; qemu_irq irq[6]; const unsigned char *id;