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Tue, 25 Feb 2020 08:12:04 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:03 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Subject: [PATCH v2 1/6] dt-bindings: crypto: fsl-sec4: add snvs clock to pwrkey Date: Tue, 25 Feb 2020 16:11:56 +0000 Message-Id: <20200225161201.1975-1-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200225_081207_210320_2771EE9F X-CRM114-Status: GOOD ( 13.62 ) X-Spam-Score: 0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.128.66 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.128.66 listed in wl.mailspike.net] 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [andre.draszik[at]gmail.com] 0.0 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , Aymen Sghaier , Herbert Xu , =?utf-8?q?Horia_Geant=C4=83?= , Anson Huang , =?utf-8?q?Andr=C3=A9_Draszik?= , Sascha Hauer , Dmitry Torokhov , Fabio Estevam , devicetree@vger.kernel.org, Rob Herring , NXP Linux Team , Pengutronix Kernel Team , linux-input@vger.kernel.org, Robin Gong , Shawn Guo , "David S. Miller" , linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On i.MX7 and i.MX8M, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik Acked-by: Rob Herring Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org Reviewed-by: Horia Geantă --- v2: * split documentation and i.MX7 dts update into two patches * remove stray RTC references from documentation (copy/paste error) --- .../devicetree/bindings/crypto/fsl-sec4.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt index 2fe245ca816a..a73722c58fab 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt @@ -449,6 +449,19 @@ System ON/OFF key driver Value type: Definition: this is phandle to the register map node. + - clocks + Usage: optional, required if SNVS LP requires explicit + enablement of clocks + Value type: + Definition: a clock specifier describing the clock required for + enabling and disabling SNVS LP. + + - clock-names + Usage: optional, required if SNVS LP requires explicit + enablement of clocks + Value type: + Definition: clock name string should be "snvs-pwrkey". + EXAMPLE: snvs-pwrkey@020cc000 { compatible = "fsl,sec-v4.0-pwrkey"; @@ -456,6 +469,8 @@ EXAMPLE: interrupts = <0 4 0x4> linux,keycode = <116>; /* KEY_POWER */ wakeup-source; + clocks = <&clks IMX7D_SNVS_CLK>; + clock-names = "snvs-pwrkey"; }; ===================================================================== @@ -547,6 +562,8 @@ FULL EXAMPLE interrupts = <0 4 0x4>; linux,keycode = <116>; /* KEY_POWER */ wakeup-source; + clocks = <&clks IMX7D_SNVS_CLK>; + clock-names = "snvs-pwrkey"; }; }; From patchwork Tue Feb 25 16:11:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404193 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 68593138D for ; Tue, 25 Feb 2020 16:12:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 459AD21744 for ; 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Tue, 25 Feb 2020 08:12:05 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:05 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Subject: [PATCH v2 2/6] ARM: dts: imx7s: add snvs clock to pwrkey Date: Tue, 25 Feb 2020 16:11:57 +0000 Message-Id: <20200225161201.1975-2-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200225_081207_570915_E855DB34 X-CRM114-Status: GOOD ( 14.89 ) X-Spam-Score: 0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.128.67 listed in list.dnswl.org] 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [andre.draszik[at]gmail.com] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.128.67 listed in wl.mailspike.net] 0.0 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , Aymen Sghaier , Herbert Xu , =?utf-8?q?Horia_Geant=C4=83?= , Anson Huang , =?utf-8?q?Andr=C3=A9_Draszik?= , Sascha Hauer , Dmitry Torokhov , Fabio Estevam , devicetree@vger.kernel.org, Rob Herring , NXP Linux Team , Pengutronix Kernel Team , linux-input@vger.kernel.org, Robin Gong , Shawn Guo , "David S. Miller" , linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On i.MX7, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik Acked-by: Rob Herring Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org --- v2: * split documentation and i.MX7 dts update into two patches --- arch/arm/boot/dts/imx7s.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 139ab9b98472..edc8c542da7e 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -611,6 +611,8 @@ compatible = "fsl,sec-v4.0-pwrkey"; regmap = <&snvs>; interrupts = ; + clocks = <&clks IMX7D_SNVS_CLK>; + clock-names = "snvs-pwrkey"; linux,keycode = ; wakeup-source; status = "disabled"; From patchwork Tue Feb 25 16:11:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404213 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 49377138D for ; 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Tue, 25 Feb 2020 08:12:06 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Subject: [PATCH v2 3/6] arm64: dts: imx8mm: add snvs clock to pwrkey Date: Tue, 25 Feb 2020 16:11:58 +0000 Message-Id: <20200225161201.1975-3-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200225_081209_216728_98C2AE46 X-CRM114-Status: GOOD ( 14.74 ) X-Spam-Score: 0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.221.66 listed in list.dnswl.org] 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [andre.draszik[at]gmail.com] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.221.66 listed in wl.mailspike.net] 0.0 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Aymen Sghaier , Herbert Xu , =?utf-8?q?Horia_Geant=C4=83?= , Anson Huang , =?utf-8?q?Andr=C3=A9_Draszik?= , Sascha Hauer , Dmitry Torokhov , Fabio Estevam , Rob Herring , NXP Linux Team , Pengutronix Kernel Team , linux-input@vger.kernel.org, Robin Gong , Shawn Guo , "David S. Miller" , linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On i.MX8MM, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org --- v2: new patch --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 3d95b66a2d71..804031010a8a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -460,6 +460,8 @@ compatible = "fsl,sec-v4.0-pwrkey"; regmap = <&snvs>; interrupts = ; + clocks = <&clk IMX8MM_CLK_SNVS_ROOT>; + clock-names = "snvs-pwrkey"; linux,keycode = ; wakeup-source; status = "disabled"; From patchwork Tue Feb 25 16:11:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404215 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5F70E1395 for ; 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Tue, 25 Feb 2020 08:12:07 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Subject: [PATCH v2 4/6] arm64: dts: imx8mq: add snvs clock to pwrkey Date: Tue, 25 Feb 2020 16:11:59 +0000 Message-Id: <20200225161201.1975-4-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200225_081209_526901_AF466692 X-CRM114-Status: GOOD ( 14.74 ) X-Spam-Score: 0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.221.65 listed in list.dnswl.org] 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.221.65 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [andre.draszik[at]gmail.com] 0.0 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Aymen Sghaier , Herbert Xu , =?utf-8?q?Horia_Geant=C4=83?= , Anson Huang , =?utf-8?q?Andr=C3=A9_Draszik?= , Sascha Hauer , Dmitry Torokhov , Fabio Estevam , Rob Herring , NXP Linux Team , Pengutronix Kernel Team , linux-input@vger.kernel.org, Robin Gong , Shawn Guo , "David S. Miller" , linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On i.MX8MM, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org --- v2: new patch --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 7f9319452b58..e4ab037183d7 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -501,6 +501,8 @@ compatible = "fsl,sec-v4.0-pwrkey"; regmap = <&snvs>; interrupts = ; + clocks = <&clk IMX8MQ_CLK_SNVS_ROOT>; + clock-names = "snvs-pwrkey"; linux,keycode = ; wakeup-source; status = "disabled"; From patchwork Tue Feb 25 16:12:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404217 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 06889138D for ; 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Tue, 25 Feb 2020 08:12:08 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Subject: [PATCH v2 5/6] Input: snvs_pwrkey - enable snvs clock as needed Date: Tue, 25 Feb 2020 16:12:00 +0000 Message-Id: <20200225161201.1975-5-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200225_081210_072834_1F10AD7B X-CRM114-Status: GOOD ( 18.82 ) X-Spam-Score: 0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.221.66 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.221.66 listed in wl.mailspike.net] 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [andre.draszik[at]gmail.com] 0.0 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Aymen Sghaier , Herbert Xu , =?utf-8?q?Horia_Geant=C4=83?= , Anson Huang , =?utf-8?q?Andr=C3=A9_Draszik?= , Sascha Hauer , Dmitry Torokhov , Fabio Estevam , Rob Herring , NXP Linux Team , Pengutronix Kernel Team , linux-input@vger.kernel.org, Robin Gong , Shawn Guo , "David S. Miller" , linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org At the moment, enabling this driver without the SNVS RTC driver being active will hang the kernel as soon as the power button is pressed. The reason is that in that case the SNVS isn't enabled, and any attempt to read the SNVS registers will simply hang forever. Ensure the clock is enabled (during the interrupt handler) to make this driver work. Also see commit 7f8993995410 ("drivers/rtc/rtc-snvs: add clock support") and commit edb190cb1734 ("rtc: snvs: make sure clock is enabled for interrupt handle") for similar updates to the snvs rtc driver. Signed-off-by: André Draszik Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org --- v2: * drop redundant tests and simplify error handling by using devm_clk_get_optional() * add clock handling to imx_imx_snvs_check_for_events() --- drivers/input/keyboard/snvs_pwrkey.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pwrkey.c index 2f5e3ab5ed63..382d2ae82c9b 100644 --- a/drivers/input/keyboard/snvs_pwrkey.c +++ b/drivers/input/keyboard/snvs_pwrkey.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -38,6 +39,7 @@ struct pwrkey_drv_data { int wakeup; struct timer_list check_timer; struct input_dev *input; + struct clk *clk; u8 minor_rev; }; @@ -47,7 +49,10 @@ static void imx_imx_snvs_check_for_events(struct timer_list *t) struct input_dev *input = pdata->input; u32 state; + clk_enable(pdata->clk); regmap_read(pdata->snvs, SNVS_HPSR_REG, &state); + clk_disable(pdata->clk); + state = state & SNVS_HPSR_BTN ? 1 : 0; /* only report new event if status changed */ @@ -74,11 +79,13 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) pm_wakeup_event(input->dev.parent, 0); + clk_enable(pdata->clk); + regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); if (lp_status & SNVS_LPSR_SPO) { if (pdata->minor_rev == 0) { /* - * The first generation i.MX6 SoCs only sends an + * The first generation i.MX[6|7] SoCs only send an * interrupt on button release. To mimic power-key * usage, we'll prepend a press event. */ @@ -96,6 +103,8 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) /* clear SPO status */ regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); + clk_disable(pdata->clk); + return IRQ_HANDLED; } @@ -140,6 +149,23 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev) if (pdata->irq < 0) return -EINVAL; + pdata->clk = devm_clk_get_optional(&pdev->dev, "snvs-pwrkey"); + if (IS_ERR(pdata->clk)) + return PTR_ERR(pdata->clk); + + error = clk_prepare(pdata->clk); + if (error) { + dev_err(&pdev->dev, "failed to prepare the snvs clock\n"); + return error; + } + error = devm_add_action_or_reset(&pdev->dev, + (void(*)(void *))clk_unprepare, + pdata->clk); + if (error) { + dev_err(&pdev->dev, "failed to add reset action on 'snvs-pwrkey'"); + return error; + } + regmap_read(pdata->snvs, SNVS_HPVIDR1_REG, &vid); pdata->minor_rev = vid & 0xff; From patchwork Tue Feb 25 16:12:01 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 08:12:09 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:09 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Subject: [PATCH v2 6/6] Input: snvs_pwrkey - only IRQ_HANDLED for our own events Date: Tue, 25 Feb 2020 16:12:01 +0000 Message-Id: <20200225161201.1975-6-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200225_081211_609593_3B943108 X-CRM114-Status: GOOD ( 15.61 ) X-Spam-Score: 0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.221.67 listed in list.dnswl.org] 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [andre.draszik[at]gmail.com] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.221.67 listed in wl.mailspike.net] 0.0 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Aymen Sghaier , Herbert Xu , =?utf-8?q?Horia_Geant=C4=83?= , Anson Huang , =?utf-8?q?Andr=C3=A9_Draszik?= , Sascha Hauer , Dmitry Torokhov , Fabio Estevam , Rob Herring , NXP Linux Team , Pengutronix Kernel Team , linux-input@vger.kernel.org, Robin Gong , Shawn Guo , "David S. Miller" , linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The snvs_pwrkey shares the SNVS LPSR status register with the snvs_rtc. This driver here should only return IRQ_HANDLED if the status register indicates that the event we're handling in the irq handler was genuinely intended for this driver. Otheriwse the interrupt subsystem will assume the interrupt was handled successfully even though it wasn't at all. Signed-off-by: André Draszik Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org Reviewed-by: Robin Gong Reviewed-by: Horia Geantă --- v2: * no changes --- drivers/input/keyboard/snvs_pwrkey.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pwrkey.c index 382d2ae82c9b..980867886b34 100644 --- a/drivers/input/keyboard/snvs_pwrkey.c +++ b/drivers/input/keyboard/snvs_pwrkey.c @@ -82,7 +82,9 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) clk_enable(pdata->clk); regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); - if (lp_status & SNVS_LPSR_SPO) { + lp_status &= SNVS_LPSR_SPO; + + if (lp_status) { if (pdata->minor_rev == 0) { /* * The first generation i.MX[6|7] SoCs only send an @@ -98,14 +100,14 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) mod_timer(&pdata->check_timer, jiffies + msecs_to_jiffies(DEBOUNCE_TIME)); } - } - /* clear SPO status */ - regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); + /* clear SPO status */ + regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); + } clk_disable(pdata->clk); - return IRQ_HANDLED; + return lp_status ? IRQ_HANDLED : IRQ_NONE; } static void imx_snvs_pwrkey_act(void *pdata)