From patchwork Tue Feb 25 20:46:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404581 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 21578930 for ; Tue, 25 Feb 2020 20:47:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 012E624673 for ; Tue, 25 Feb 2020 20:47:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Ut9PFhHN" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729765AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47388 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728847AbgBYUq6 (ORCPT ); Tue, 25 Feb 2020 15:46:58 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuW6117213; Tue, 25 Feb 2020 14:46:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663616; bh=IBcnW0j8YJKkAvVMwDo1qdY20Qq2L6G9BlQ+7hZpKMA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Ut9PFhHNrfXtWVws7xzEdhlSQmIm014xhwQVfdKLX92zKA2yielA+dVgRqDp04ewg YsP2Ue4TGECxXswKEBqSD1HADMJH6cacFOcKGKTuJ4tLvTt/UGYk7HOKv9lBTrO2Xq IqvX2D9wzO3WpNsAk9A1uLevI6t+01ihiB2qMs8k= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01PKkugm022016 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Feb 2020 14:46:56 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:56 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKktZj108197; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKktGK025460; Tue, 25 Feb 2020 14:46:55 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 01/12] dt-bindings: bus: ti-sysc: Add support for PRUSS SYSC type Date: Tue, 25 Feb 2020 14:46:38 -0600 Message-ID: <20200225204649.28220-2-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Roger Quadros The PRUSS module has a SYSCFG which is unique. The SYSCFG has two additional unique fields called STANDBY_INIT and SUB_MWAIT in addition to regular IDLE_MODE and STANDBY_MODE fields. Add the bindings for this new sysc type. Signed-off-by: Roger Quadros Signed-off-by: Suman Anna --- Documentation/devicetree/bindings/bus/ti-sysc.txt | 1 + include/dt-bindings/bus/ti-sysc.h | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/bus/ti-sysc.txt b/Documentation/devicetree/bindings/bus/ti-sysc.txt index 233eb8294204..c984143d08d2 100644 --- a/Documentation/devicetree/bindings/bus/ti-sysc.txt +++ b/Documentation/devicetree/bindings/bus/ti-sysc.txt @@ -38,6 +38,7 @@ Required standard properties: "ti,sysc-dra7-mcasp" "ti,sysc-usb-host-fs" "ti,sysc-dra7-mcan" + "ti,sysc-pruss" - reg shall have register areas implemented for the interconnect target module in question such as revision, sysc and syss diff --git a/include/dt-bindings/bus/ti-sysc.h b/include/dt-bindings/bus/ti-sysc.h index babd08a1d226..76b07826ed05 100644 --- a/include/dt-bindings/bus/ti-sysc.h +++ b/include/dt-bindings/bus/ti-sysc.h @@ -18,6 +18,10 @@ #define SYSC_DRA7_MCAN_ENAWAKEUP (1 << 4) +/* PRUSS sysc found on AM33xx/AM43xx/AM57xx */ +#define SYSC_PRUSS_SUB_MWAIT (1 << 5) +#define SYSC_PRUSS_STANDBY_INIT (1 << 4) + /* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */ #define SYSC_IDLE_FORCE 0 #define SYSC_IDLE_NO 1 From patchwork Tue Feb 25 20:46:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404573 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2188D930 for ; Tue, 25 Feb 2020 20:47:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0154821744 for ; Tue, 25 Feb 2020 20:47:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="kWc6D2gL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728367AbgBYUrN (ORCPT ); Tue, 25 Feb 2020 15:47:13 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47396 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729789AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKku6X117211; Tue, 25 Feb 2020 14:46:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663616; bh=Tp90w0IEl218hkkzqSpcDlCsDJ8tJyC4viJV6iXIrGg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=kWc6D2gLB2FXc7pZfeZvl4iL2tJtGxetfHF49g72OhYEkWyHMqZfKbQ1Dc4/Ealqc 6OmBwMYR3bcOq8WsiXb7xcTGKVPzWFHpL0rO2Q58T1jU5AhgOn8dlfCoph6dzjBpgY JDxGIK442rKgf/sD/Jb04tK2dkLWzTB5Vdn49Asc= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01PKkuYG017973 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Feb 2020 14:46:56 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:55 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:55 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkugf059183; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKktQq025464; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 02/12] bus: ti-sysc: Add support for PRUSS SYSC type Date: Tue, 25 Feb 2020 14:46:39 -0600 Message-ID: <20200225204649.28220-3-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS present on AM33xx/AM43xx/AM57xx has a very unique SYSCFG register. The register follows the OMAP4-style SYSC_TYPE3 for Master Standby and Slave Idle, but also has two additional unique fields - STANDBY_INIT and SUB_MWAIT. The STANDBY_INIT is a control bit that is used to initiate a Standby sequence (when set) and trigger a MStandby request to the SoC's PRCM module. This same bit is also used to enable the OCP master ports (when cleared) to allow the PRU cores to access any peripherals or memory beyond the PRU subsystem. The SUB_MWAIT is a ready status field for the external access. Add support for this SYSC type. The STANDBY_INIT has to be set during suspend, without which it results in a hang in the resume sequence on AM33xx/AM43xx boards and requires a board reset to come out of the hang. Any PRU applications requiring external access are supposed to clear the STANDBY_INIT bit. Note that the PRUSS context is lost during a suspend sequence because the PRUSS module is reset and/or disabled. Signed-off-by: Suman Anna Signed-off-by: Roger Quadros --- drivers/bus/ti-sysc.c | 27 +++++++++++++++++++++++++++ include/linux/platform_data/ti-sysc.h | 2 ++ 2 files changed, 29 insertions(+) diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c index f702c85c81b6..855f851e99be 100644 --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -1272,6 +1272,9 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, SYSC_MODULE_QUIRK_WDT), + /* PRUSS on am3, am4 and am5 */ + SYSC_QUIRK("pruss", 0, 0x26000, 0x26004, -1, 0x47000000, 0xff000000, + SYSC_MODULE_QUIRK_PRUSS), /* Watchdog on am3 and am4 */ SYSC_QUIRK("wdt", 0x44e35000, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, SYSC_MODULE_QUIRK_WDT | SYSC_QUIRK_SWSUP_SIDLE), @@ -1482,6 +1485,16 @@ static void sysc_reset_done_quirk_wdt(struct sysc *ddata) dev_warn(ddata->dev, "wdt disable step2 failed\n"); } +/* PRUSS needs to set MSTANDBY_INIT inorder to idle properly */ +static void sysc_module_disable_quirk_pruss(struct sysc *ddata) +{ + u32 reg; + + reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]); + reg |= SYSC_PRUSS_STANDBY_INIT; + sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); +} + static void sysc_init_module_quirks(struct sysc *ddata) { if (ddata->legacy_mode || !ddata->name) @@ -1510,6 +1523,9 @@ static void sysc_init_module_quirks(struct sysc *ddata) ddata->reset_done_quirk = sysc_reset_done_quirk_wdt; ddata->module_disable_quirk = sysc_reset_done_quirk_wdt; } + + if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_PRUSS) + ddata->module_disable_quirk = sysc_module_disable_quirk_pruss; } static int sysc_clockdomain_init(struct sysc *ddata) @@ -2313,6 +2329,16 @@ static const struct sysc_capabilities sysc_dra7_mcan = { .mod_quirks = SYSS_QUIRK_RESETDONE_INVERTED, }; +/* + * PRUSS found on some AM33xx, AM437x and AM57xx SoCs + */ +static const struct sysc_capabilities sysc_pruss = { + .type = TI_SYSC_PRUSS, + .sysc_mask = SYSC_PRUSS_STANDBY_INIT | SYSC_PRUSS_SUB_MWAIT, + .regbits = &sysc_regbits_omap4_simple, + .mod_quirks = SYSC_MODULE_QUIRK_PRUSS, +}; + static int sysc_init_pdata(struct sysc *ddata) { struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev); @@ -2538,6 +2564,7 @@ static const struct of_device_id sysc_match[] = { { .compatible = "ti,sysc-usb-host-fs", .data = &sysc_omap4_usb_host_fs, }, { .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, }, + { .compatible = "ti,sysc-pruss", .data = &sysc_pruss, }, { }, }; MODULE_DEVICE_TABLE(of, sysc_match); diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h index 2cbde6542849..b04575fb9f73 100644 --- a/include/linux/platform_data/ti-sysc.h +++ b/include/linux/platform_data/ti-sysc.h @@ -17,6 +17,7 @@ enum ti_sysc_module_type { TI_SYSC_OMAP4_MCASP, TI_SYSC_OMAP4_USB_HOST_FS, TI_SYSC_DRA7_MCAN, + TI_SYSC_PRUSS, }; struct ti_sysc_cookie { @@ -49,6 +50,7 @@ struct sysc_regbits { s8 emufree_shift; }; +#define SYSC_MODULE_QUIRK_PRUSS BIT(22) #define SYSC_QUIRK_CLKDM_NOAUTO BIT(21) #define SYSC_QUIRK_FORCE_MSTANDBY BIT(20) #define SYSC_MODULE_QUIRK_AESS BIT(19) From patchwork Tue Feb 25 20:46:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404575 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 536D513A4 for ; Tue, 25 Feb 2020 20:47:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3420824653 for ; Tue, 25 Feb 2020 20:47:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ATYrR1uX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729796AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:39066 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729681AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuHb045201; 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Tue, 25 Feb 2020 14:46:55 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuZ0059186; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKkuYF025467; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 03/12] ARM: dts: AM33xx-l4: Update PRUSS interconnect target-module node Date: Tue, 25 Feb 2020 14:46:40 -0600 Message-ID: <20200225204649.28220-4-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS present on some AM33xx SoCs has a very unique SYSC register. The IP also uses a hard-reset line, and requires this PRCM reset to be deasserted to be able to access any registers. Update the existing PRUSS interconnect target-module with all the required properties. The PRUSS device itself shall be added as a child node to this interconnect node in the future. PRU-ICSS is not supported on AM3352 SoC though in the AM33xx family, so the target module node should be enabled in only those derivative board files that use a SoC containing PRU-ICSS. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am33xx-l4.dtsi | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index 4e2986f0c604..5ed7f3c58c0f 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -759,12 +759,27 @@ ranges = <0x0 0x200000 0x80000>; }; - target-module@300000 { /* 0x4a300000, ap 9 04.0 */ - compatible = "ti,sysc"; - status = "disabled"; + pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */ + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x326000 0x4>, + <0x326004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | + SYSC_PRUSS_SUB_MWAIT)>; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + ; + clocks = <&pruss_ocp_clkctrl AM3_PRUSS_OCP_PRUSS_CLKCTRL 0>; + clock-names = "fck"; + resets = <&prm_per 1>; + reset-names = "rstctrl"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x300000 0x80000>; + status = "disabled"; }; }; }; From patchwork Tue Feb 25 20:46:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404591 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 159AF930 for ; Tue, 25 Feb 2020 20:47:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E932324650 for ; Tue, 25 Feb 2020 20:47:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ureUBOEf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730175AbgBYUrq (ORCPT ); Tue, 25 Feb 2020 15:47:46 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:39056 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729048AbgBYUq6 (ORCPT ); Tue, 25 Feb 2020 15:46:58 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkus6045207; Tue, 25 Feb 2020 14:46:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663616; bh=8gUHCC8lERL7o2usz9p3+V++I32vD0RNtScbEJOJDUI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ureUBOEfyTXFbA7KeofTI9OyP60BBE7jvy4l6mh0mi9F/R+4QUKO7on73Sa/T3kPE 8BY+p3vcMDHVYZbpuaXE9ypilEqAL6n7JhNgYWFf6RbY+ERJbmRag9hrH//afWlkU2 zegCvWE+fMAPApieozvtqWaONDRhUuzrZ3a7lmKw= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01PKkuwu023140 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Feb 2020 14:46:56 -0600 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost.localdomain (10.64.41.19) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:55 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by localhost.localdomain (8.15.2/8.15.2) with ESMTP id 01PKkuDE128891; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKkuHA025470; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 04/12] ARM: dts: AM4372: Add the PRU-ICSS interconnect target-module node Date: Tue, 25 Feb 2020 14:46:41 -0600 Message-ID: <20200225204649.28220-5-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The AM437x family of SoCs contains two dissimilar PRU-ICSS instances, but leverage a common reset line and SYSCFG from the larger PRU-ICSS1 instance. This SYSC register has also very unique bit-fields. Both the IPs require the PRCM reset to be deasserted to be able to access any registers. Add a common PRUSS interconnect target-module with all the required properties. The PRUSS devices themselves shall be added as child nodes to this interconnect node in the future. The PRU-ICSS instances are not supported on AM4372 SoC though in the AM437x family, so the target module node should be enabled in only those derivative board files that use a SoC containing the PRU-ICSS IPs. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am4372.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index faa14dc0faff..979fa7f67825 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -344,6 +344,29 @@ }; }; + pruss_tm: target-module@54400000 { + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x54426000 0x4>, + <0x54426004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | + SYSC_PRUSS_SUB_MWAIT)>; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + ; + clocks = <&pruss_ocp_clkctrl AM4_PRUSS_OCP_PRUSS_CLKCTRL 0>; + clock-names = "fck"; + resets = <&prm_per 1>; + reset-names = "rstctrl"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x54400000 0x80000>; + status = "disabled"; + }; + gpmc: gpmc@50000000 { compatible = "ti,am3352-gpmc"; ti,hwmods = "gpmc"; From patchwork Tue Feb 25 20:46:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404593 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 19721930 for ; Tue, 25 Feb 2020 20:47:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E335C2465D for ; Tue, 25 Feb 2020 20:47:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ETpzN5aN" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730187AbgBYUrq (ORCPT ); Tue, 25 Feb 2020 15:47:46 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:42472 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728787AbgBYUq6 (ORCPT ); Tue, 25 Feb 2020 15:46:58 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuX0088220; Tue, 25 Feb 2020 14:46:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663616; bh=o8slxYM1QhLjUyeJve1zrqkh0SfEPrjIONEDdLMtEtY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ETpzN5aNlJb91JG3rJ83qwTjvnmS6HjP86Ysjh+avhnshRDwzHOLJYySjHXT/KeZA BttMRiGar7i0/+POUaClveFLVKMteiq1pN5IQfCh+2+gh53z6ZWeSnmkik87cCFQwH 0FYZq2oWk8T1Zaj4K8+DlzDUmW6Yfx3JJk2UZN/Y= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKku4x033119; Tue, 25 Feb 2020 14:46:56 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:56 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkucW059192; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKkumV025473; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 05/12] ARM: dts: dra7: Add PRU-ICSS interconnect target-module nodes Date: Tue, 25 Feb 2020 14:46:42 -0600 Message-ID: <20200225204649.28220-6-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The AM57xx family of SoCs contains two identical PRU-ICSS instances that have a very unique SYSC register. The IPs do not have any PRCM reset lines unlike those on AM33xx/AM437x SoCs. Add the PRUSS interconnect target-module nodes with all the required properties. Each of the PRUSS devices themselves shall be added as child nodes to the corresponding interconnect node in the future. The PRU-ICSS instances are only available on AM57xx family of SoCs and are not supported on DRA7xx family of SoCs in general, so the target module nodes are added in a separate dtsi file. This new dtsi file is included in all the AM57xx SoC dtsi files, so the nodes are automatically inherited and enabled on all AM57xx boards. Signed-off-by: Suman Anna Signed-off-by: Roger Quadros --- arch/arm/boot/dts/am57-pruss.dtsi | 50 +++++++++++++++++++++++++++++++ arch/arm/boot/dts/am5718.dtsi | 1 + arch/arm/boot/dts/am5728.dtsi | 1 + arch/arm/boot/dts/am5748.dtsi | 1 + arch/arm/boot/dts/dra7.dtsi | 2 +- 5 files changed, 54 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/am57-pruss.dtsi diff --git a/arch/arm/boot/dts/am57-pruss.dtsi b/arch/arm/boot/dts/am57-pruss.dtsi new file mode 100644 index 000000000000..b1c583dee10b --- /dev/null +++ b/arch/arm/boot/dts/am57-pruss.dtsi @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + * + * Common PRUSS data for TI AM57xx platforms + */ + +&ocp { + pruss1_tm: target-module@4b226000 { + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x4b226000 0x4>, + <0x4b226004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | + SYSC_PRUSS_SUB_MWAIT)>; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + ; + /* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */ + clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x4b200000 0x80000>; + }; + + pruss2_tm: target-module@4b2a6000 { + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x4b2a6000 0x4>, + <0x4b2a6004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | + SYSC_PRUSS_SUB_MWAIT)>; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + ; + /* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */ + clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS2_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x4b280000 0x80000>; + }; +}; diff --git a/arch/arm/boot/dts/am5718.dtsi b/arch/arm/boot/dts/am5718.dtsi index d51007c3e8c4..a80c2e3eee2e 100644 --- a/arch/arm/boot/dts/am5718.dtsi +++ b/arch/arm/boot/dts/am5718.dtsi @@ -4,6 +4,7 @@ */ #include "dra72x.dtsi" +#include "am57-pruss.dtsi" / { compatible = "ti,am5718", "ti,dra7"; diff --git a/arch/arm/boot/dts/am5728.dtsi b/arch/arm/boot/dts/am5728.dtsi index 82e5427ef6a9..9a3810f5adcc 100644 --- a/arch/arm/boot/dts/am5728.dtsi +++ b/arch/arm/boot/dts/am5728.dtsi @@ -4,6 +4,7 @@ */ #include "dra74x.dtsi" +#include "am57-pruss.dtsi" / { compatible = "ti,am5728", "ti,dra7"; diff --git a/arch/arm/boot/dts/am5748.dtsi b/arch/arm/boot/dts/am5748.dtsi index 5e129759d04a..2b65317b1513 100644 --- a/arch/arm/boot/dts/am5748.dtsi +++ b/arch/arm/boot/dts/am5748.dtsi @@ -4,6 +4,7 @@ */ #include "dra76x.dtsi" +#include "am57-pruss.dtsi" / { compatible = "ti,am5748", "ti,dra762", "ti,dra7"; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index d78b684e7fca..f2e44c0dcd1e 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -143,7 +143,7 @@ * the moment, just use a fake OCP bus entry to represent the whole bus * hierarchy. */ - ocp { + ocp: ocp { compatible = "ti,dra7-l3-noc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; From patchwork Tue Feb 25 20:46:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404589 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9E920930 for ; Tue, 25 Feb 2020 20:47:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7431F24656 for ; Tue, 25 Feb 2020 20:47:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="bKK4GioN" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729702AbgBYUq6 (ORCPT ); Tue, 25 Feb 2020 15:46:58 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47386 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727624AbgBYUq6 (ORCPT ); Tue, 25 Feb 2020 15:46:58 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuAi117219; 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Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkui2059195; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKkuTe025476; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 06/12] ARM: dts: am335x-bone-common: Enable PRU-ICSS interconnect node Date: Tue, 25 Feb 2020 14:46:43 -0600 Message-ID: <20200225204649.28220-7-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. Enable this node on all the AM335x beaglebone boards as they mostly use a AM3358 or a AM3359 SoC which do contain the PRU-ICSS IP. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am335x-bone-common.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 6c9187bc0f17..e507ef74d8e6 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -397,3 +397,7 @@ clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; clock-names = "ext-clk", "int-clk"; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Tue Feb 25 20:46:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404587 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7416317D5 for ; Tue, 25 Feb 2020 20:47:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4A31821744 for ; Tue, 25 Feb 2020 20:47:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="qht1JgVC" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729018AbgBYUrf (ORCPT ); Tue, 25 Feb 2020 15:47:35 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:39064 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729675AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkumW045211; Tue, 25 Feb 2020 14:46:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663616; bh=01bLPUO+zYIFLkUZyIMzYAy4Wf89i7b/YusHJoxlnhg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qht1JgVCidULgeQwQ1kkGmiJHhqgA9GzoLj8SE0BYvcuf75Oq4VnsSmblLEj3e6Y3 piqwp3p/tKq1SbHQML7N5ITmKOPi5A2y6Xw/ykfpWUFnPYIQe2xnpvvRneXEOUZ7l/ gwCgrJGyoIKfMAlXY4DMPcwvDJLALejX2XcmYIzc= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01PKku1b017976 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Feb 2020 14:46:56 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost.localdomain (10.64.41.19) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by localhost.localdomain (8.15.2/8.15.2) with ESMTP id 01PKkuqV128900; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKkumP025479; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 07/12] ARM: dts: am335x-evm: Enable PRU-ICSS interconnect node Date: Tue, 25 Feb 2020 14:46:44 -0600 Message-ID: <20200225204649.28220-8-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x EVM, so enable this node on the AM335x EVM. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am335x-evm.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 68252dab32c3..e8c0ae0ccbef 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -776,3 +776,7 @@ clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; clock-names = "ext-clk", "int-clk"; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Tue Feb 25 20:46:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404571 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 41DF7930 for ; Tue, 25 Feb 2020 20:47:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 21B6320675 for ; Tue, 25 Feb 2020 20:47:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="cJHecR48" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729992AbgBYUrN (ORCPT ); Tue, 25 Feb 2020 15:47:13 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:39068 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729760AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKku4t045220; Tue, 25 Feb 2020 14:46:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663616; bh=jt1b9+pwL+VDoUt+ggAPbWiuUp8lXp87zn9gGt4fxns=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=cJHecR48TlOvrVp2VeMcycRAUwnsTqtysXr5o9fMTR3uiZRzE65hWiFiDyYCBRXUB O43JwZe8S0sPW7OaVWXtgATyDGZPv1+e19CXugldpUTnEc/qZDAY8a2Hgbg+0uD63r P39TroCRmzB5/km9Bm5fooy245IvR71Bs0mwjEvc= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuQd033125; Tue, 25 Feb 2020 14:46:56 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuSa094912; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKkuVK025482; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 08/12] ARM: dts: am335x-evmsk: Enable PRU-ICSS interconnect node Date: Tue, 25 Feb 2020 14:46:45 -0600 Message-ID: <20200225204649.28220-9-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x SK EVM board, so enable this node to support PRUSS on this board. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am335x-evmsk.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 32f515a295ee..f0dd66649877 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -717,3 +717,7 @@ clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; clock-names = "ext-clk", "int-clk"; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Tue Feb 25 20:46:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404579 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8D40B17D5 for ; Tue, 25 Feb 2020 20:47:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 631A421744 for ; Tue, 25 Feb 2020 20:47:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="F8b4KChV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730059AbgBYUrY (ORCPT ); Tue, 25 Feb 2020 15:47:24 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47394 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729771AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuUo117224; Tue, 25 Feb 2020 14:46:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663616; bh=KTC7Fr+zrTKR77MiUYvs3kJO5IudiUCCubLVZqXAU00=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=F8b4KChVGJ3YMCxzRp56ucL0VuUmVuotQOZzTTwpLQC4agaLnUHyWhI2AuOjeEwgK VW2iDlrOVhinJPYiuPRPukpzwcCTrEWIEzv0mzqiiDnqLAooYxzQE8iKxFeI4O91cE hdmDXFCPocZyL4FrK0Ej3W37B80QiMqOo9loHqsA= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKku3C033129; Tue, 25 Feb 2020 14:46:56 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKku6J094915; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKkuPv025485; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 09/12] ARM: dts: am335x-icev2: Enable PRU-ICSS interconnect node Date: Tue, 25 Feb 2020 14:46:46 -0600 Message-ID: <20200225204649.28220-10-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x ICEv2 board, so enable this node to support PRUSS on this board. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am335x-icev2.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts index 021eb57261fe..83b4bd91a44c 100644 --- a/arch/arm/boot/dts/am335x-icev2.dts +++ b/arch/arm/boot/dts/am335x-icev2.dts @@ -510,3 +510,7 @@ reg = <3>; }; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Tue Feb 25 20:46:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404577 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 59B0B930 for ; Tue, 25 Feb 2020 20:47:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3963621744 for ; Tue, 25 Feb 2020 20:47:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="WrsvdHgg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727624AbgBYUrX (ORCPT ); Tue, 25 Feb 2020 15:47:23 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:46458 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729787AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuNJ029873; Tue, 25 Feb 2020 14:46:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663616; bh=bQ+hAPfCvyy9MsFC0lqj9vYw6F8X9hetzYmudKLF2ek=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=WrsvdHgghdSXBew539Ow3kaWmmHYNGvXLWSbLm0i6kmXh5ZX/W5Y9cvbZJBBYNdKU iNg1pUUdmowN44mI4GrTYb6/ecWo3uN8+E2N/FHHr4L9L8DEGGGk7OCyUlWUBha/7T wNAfCSIMARkd80YlA3eaU+vjd3oDYaZB+w3TVmK8= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuNq033138; Tue, 25 Feb 2020 14:46:56 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:56 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuGE059199; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKku3C025488; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 10/12] ARM: dts: am437x-gp-evm: Enable PRU-ICSS interconnect node Date: Tue, 25 Feb 2020 14:46:47 -0600 Message-ID: <20200225204649.28220-11-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The AM437x GP EVM board uses a AM437x SoC that supports two PRU-ICSS instances. The PRU-ICSS target module node was left in disabled state in the base am4372.dtsi file. Enable the PRU-ICSS target module node on this board. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am437x-gp-evm.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts index 811c8cae315b..537686688a8b 100644 --- a/arch/arm/boot/dts/am437x-gp-evm.dts +++ b/arch/arm/boot/dts/am437x-gp-evm.dts @@ -1128,3 +1128,7 @@ &cpu { cpu0-supply = <&dcdc2>; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Tue Feb 25 20:46:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404583 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A82CF930 for ; Tue, 25 Feb 2020 20:47:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7E60E222C2 for ; Tue, 25 Feb 2020 20:47:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="TWV6MWJQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730134AbgBYUrf (ORCPT ); Tue, 25 Feb 2020 15:47:35 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:46450 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729694AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkvEU029877; Tue, 25 Feb 2020 14:46:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663617; bh=dr8lrN2jSIfBtxZt3TIJ7e4JnRag5Dwzk0e2nmGK6KA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TWV6MWJQRLxUm03AnCLejNMfY9Sctn0qgVqGVMCQFq0ry7YYC2ioFG+NNmV12x858 mPnoZXuBSXc3cgUuztNHJpfa1xnjLbB+N70Mwehd8eyo4QKSW8DNq6bkWbPQYpcSUo Bk+x8RJnElA7etfYuZ/Nw9lBQoSC2zPCO2ZNfOGs= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01PKkv2s017979 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Feb 2020 14:46:57 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:56 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkucp108213; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKkuL4025491; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 11/12] ARM: dts: am437x-sk: Enable PRU-ICSS interconnect node Date: Tue, 25 Feb 2020 14:46:48 -0600 Message-ID: <20200225204649.28220-12-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The AM437x SK EVM board uses a AM437x SoC that supports two PRU-ICSS instances. The PRU-ICSS target module node was left in disabled state in the base am4372.dtsi file. Enable the PRU-ICSS target module node on this board. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am437x-sk-evm.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 25222497f828..9fafb01e0521 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -910,3 +910,7 @@ }; }; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Tue Feb 25 20:46:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11404585 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 418A3930 for ; Tue, 25 Feb 2020 20:47:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2063124673 for ; Tue, 25 Feb 2020 20:47:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="D0DMqq/e" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729729AbgBYUq7 (ORCPT ); Tue, 25 Feb 2020 15:46:59 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:46448 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729686AbgBYUq6 (ORCPT ); Tue, 25 Feb 2020 15:46:58 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkvSX029881; Tue, 25 Feb 2020 14:46:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582663617; bh=roR2+dI29hDxJzMZw9KmRKSOVmd/g4KDiOfEovDX9Vo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=D0DMqq/eS8hhg8G+zHRglKv2TXg+P6vEX0L1dpjF36rIlkAMcMqXAvmYnlSjDA7g9 T1x/g4v+LdWk9FsOiyHuUczzA9xzrek9gLvwWwzRtPEo9nDkmjQCmjtl0ytp3i7H3Q KAYAyy0vSWC4aDPuwwRsXoBczbOgKk2j9K4lptno= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01PKkvJh023151 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Feb 2020 14:46:57 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 25 Feb 2020 14:46:56 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 25 Feb 2020 14:46:56 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01PKkuLL059202; Tue, 25 Feb 2020 14:46:56 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01PKkuCh025494; Tue, 25 Feb 2020 14:46:56 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH 12/12] ARM: dts: am437x-idk: Enable PRU-ICSS interconnect node Date: Tue, 25 Feb 2020 14:46:49 -0600 Message-ID: <20200225204649.28220-13-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200225204649.28220-1-s-anna@ti.com> References: <20200225204649.28220-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The AM437x IDK EVM board uses a AM437x SoC that supports two PRU-ICSS instances. The PRU-ICSS target module node was left in disabled state in the base am4372.dtsi file. Enable the PRU-ICSS target module node on this board. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am437x-idk-evm.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts index f3ced6df0c9b..380fbb52ebd4 100644 --- a/arch/arm/boot/dts/am437x-idk-evm.dts +++ b/arch/arm/boot/dts/am437x-idk-evm.dts @@ -534,3 +534,7 @@ opp-suspend; }; }; + +&pruss_tm { + status = "okay"; +};