From patchwork Sat Sep 29 15:01:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 10620843 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0DA526CB for ; Sat, 29 Sep 2018 15:01:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA17329F8C for ; Sat, 29 Sep 2018 15:01:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CBDE529F96; Sat, 29 Sep 2018 15:01:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3FD7529F8C for ; Sat, 29 Sep 2018 15:01:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728197AbeI2VaP (ORCPT ); Sat, 29 Sep 2018 17:30:15 -0400 Received: from mail.bootlin.com ([62.4.15.54]:55287 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728242AbeI2VaP (ORCPT ); Sat, 29 Sep 2018 17:30:15 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 451772075C; Sat, 29 Sep 2018 17:01:27 +0200 (CEST) Received: from localhost (unknown [212.145.226.70]) by mail.bootlin.com (Postfix) with ESMTPSA id 065D8203DA; Sat, 29 Sep 2018 17:01:26 +0200 (CEST) Date: Sat, 29 Sep 2018 17:01:27 +0200 From: Maxime Ripard To: Mike Turquette , Stephen Boyd Cc: Chen-Yu Tsai , Maxime Ripard , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [GIT PULL] Allwinner clock changes for 4.20 Message-ID: <20180929150127.aky3bijls3ncyunt@flea> MIME-Version: 1.0 Content-Disposition: inline User-Agent: NeoMutt/20180716 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Mike, Stephen, Here are our usual set of changes for the next merge window. Thanks! Maxime The following changes since commit 5b394b2ddf0347bef56e50c69a58773c94343ff3: Linux 4.19-rc1 (2018-08-26 14:11:59 -0700) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git tags/sunxi-clk-for-4.20 for you to fetch changes up to 8b2a37870419f4aa6e6f837aa8ec627eae984010: dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro (2018-09-05 09:19:59 +0200) ---------------------------------------------------------------- Allwinner clock changes for 4.20 Our usual set of changes for the Allwinner SoCs clock support. The most notable changes are: - A bunch of changes and fixes to support the A64 display engine - Some fixes to support the A83t display engine ---------------------------------------------------------------- Icenowy Zheng (3): clk: sunxi-ng: h6: fix bus clocks' divider position clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks clk: sunxi-ng: a64: Add max. rate constraint to video PLLs Jagan Teki (2): clk: sunxi-ng: a64: Add minimal rate for video PLLs dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro Jernej Skrabec (5): clk: sunxi-ng: Add maximum rate constraint to NM PLLs clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video clk: sunxi-ng: r40: Add max. rate constraint to video PLLs clk: sunxi-ng: nkmp: Add constraint for maximum rate clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs Rongyi Chen (1): clk: sunxi-ng: h6: fix PWM gate/reset offset drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 48 ++++++++++++++------------- drivers/clk/sunxi-ng/ccu-sun50i-a64.h | 4 ++- drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 49 +++++++++++++++------------- drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 2 ++ drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 25 +++++++------- drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 52 +++++++++++++++--------------- drivers/clk/sunxi-ng/ccu_nkmp.c | 7 ++++ drivers/clk/sunxi-ng/ccu_nkmp.h | 1 + drivers/clk/sunxi-ng/ccu_nm.c | 7 ++++ drivers/clk/sunxi-ng/ccu_nm.h | 30 +++++++++++++++++ include/dt-bindings/clock/sun50i-a64-ccu.h | 1 + 11 files changed, 142 insertions(+), 84 deletions(-)