From patchwork Tue Mar 3 13:59:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 11418153 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 258AB174A for ; Tue, 3 Mar 2020 13:59:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E70F420675 for ; Tue, 3 Mar 2020 13:59:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1583243977; bh=n5eLoOtL72gKFNBY2Rei8OO/i/tfcHqYg2Jcx94B2HA=; h=From:Cc:Subject:Date:In-Reply-To:References:To:List-ID:From; b=NYJvP0Sc0ZlefELaKCU3/VHgcw6vThVojC47Oxy9PMwkIGgrLaLWAGsTpHmzquQUb rliJde/T2jaYuSjrDC+h0KceD+/EC3b2a0povP8iLTdo12zAzJbzUI6nkVsntCGezQ kTplsHxJeNX/NdY87x/ksgtk1j7iS0xPDuK3UiqY= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725796AbgCCN7g (ORCPT ); Tue, 3 Mar 2020 08:59:36 -0500 Received: from mail.kernel.org ([198.145.29.99]:45728 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729364AbgCCN7g (ORCPT ); Tue, 3 Mar 2020 08:59:36 -0500 Received: from mail.kernel.org (ip-109-40-2-133.web.vodafone.de [109.40.2.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C792821775; Tue, 3 Mar 2020 13:59:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1583243974; bh=n5eLoOtL72gKFNBY2Rei8OO/i/tfcHqYg2Jcx94B2HA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UrfO4at/0uNiyedR7AS/oeWUA1qJLf6AxVxedDPCBEDpo7WHk/rh7HSIAcqU1Uj8Y R5ZtyK/9kLB1TaDMYIcz4OzYus1pAEHV39w29N1oJETSBjnSSqHzHsT86GsN8ppZWi vgM6XqxktTLz00L/OW4nTeFgWsQW88et5bfulXao= Received: from mchehab by mail.kernel.org with local (Exim 4.92.3) (envelope-from ) id 1j9850-001Ydv-J3; Tue, 03 Mar 2020 14:59:26 +0100 From: Mauro Carvalho Chehab Cc: Mauro Carvalho Chehab , Yoshinori Sato , Rich Felker , Jonathan Corbet , linux-sh@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH v3 15/18] docs: sh: convert new-machine.txt to ReST Date: Tue, 3 Mar 2020 14:59:22 +0100 Message-Id: <504eee30e551469d3475bf1bc080abeb21fa7871.1583243826.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: References: MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org - Add a SPDX header; - Adjust document title to follow ReST style; - Mark literal blocks as such; - Mark a table as such; - Add it to sh/index.rst. Signed-off-by: Mauro Carvalho Chehab --- Documentation/sh/index.rst | 5 + .../sh/{new-machine.txt => new-machine.rst} | 195 +++++++++--------- 2 files changed, 106 insertions(+), 94 deletions(-) rename Documentation/sh/{new-machine.txt => new-machine.rst} (73%) diff --git a/Documentation/sh/index.rst b/Documentation/sh/index.rst index bc8db7ba894a..56c08790265d 100644 --- a/Documentation/sh/index.rst +++ b/Documentation/sh/index.rst @@ -4,6 +4,11 @@ SuperH Interfaces Guide :Author: Paul Mundt +.. toctree:: + :maxdepth: 1 + + new-machine + Memory Management ================= diff --git a/Documentation/sh/new-machine.txt b/Documentation/sh/new-machine.rst similarity index 73% rename from Documentation/sh/new-machine.txt rename to Documentation/sh/new-machine.rst index e0961a66130b..e501c52b3b30 100644 --- a/Documentation/sh/new-machine.txt +++ b/Documentation/sh/new-machine.rst @@ -1,6 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0 - Adding a new board to LinuxSH - ================================ +============================= +Adding a new board to LinuxSH +============================= Paul Mundt @@ -19,65 +21,67 @@ include/asm-sh/. For the new kernel, things are broken out by board type, companion chip type, and CPU type. Looking at a tree view of this directory hierarchy looks like the following: -Board-specific code: +Board-specific code:: -. -|-- arch -| `-- sh -| `-- boards -| |-- adx -| | `-- board-specific files -| |-- bigsur -| | `-- board-specific files -| | -| ... more boards here ... -| -`-- include - `-- asm-sh - |-- adx - | `-- board-specific headers - |-- bigsur - | `-- board-specific headers - | - .. more boards here ... + . + |-- arch + | `-- sh + | `-- boards + | |-- adx + | | `-- board-specific files + | |-- bigsur + | | `-- board-specific files + | | + | ... more boards here ... + | + `-- include + `-- asm-sh + |-- adx + | `-- board-specific headers + |-- bigsur + | `-- board-specific headers + | + .. more boards here ... -Next, for companion chips: -. -`-- arch - `-- sh - `-- cchips - `-- hd6446x - `-- hd64461 - `-- cchip-specific files +Next, for companion chips:: + + . + `-- arch + `-- sh + `-- cchips + `-- hd6446x + `-- hd64461 + `-- cchip-specific files ... and so on. Headers for the companion chips are treated the same way as board-specific headers. Thus, include/asm-sh/hd64461 is home to all of the hd64461-specific headers. -Finally, CPU family support is also abstracted: -. -|-- arch -| `-- sh -| |-- kernel -| | `-- cpu -| | |-- sh2 -| | | `-- SH-2 generic files -| | |-- sh3 -| | | `-- SH-3 generic files -| | `-- sh4 -| | `-- SH-4 generic files -| `-- mm -| `-- This is also broken out per CPU family, so each family can -| have their own set of cache/tlb functions. -| -`-- include - `-- asm-sh - |-- cpu-sh2 - | `-- SH-2 specific headers - |-- cpu-sh3 - | `-- SH-3 specific headers - `-- cpu-sh4 - `-- SH-4 specific headers +Finally, CPU family support is also abstracted:: + + . + |-- arch + | `-- sh + | |-- kernel + | | `-- cpu + | | |-- sh2 + | | | `-- SH-2 generic files + | | |-- sh3 + | | | `-- SH-3 generic files + | | `-- sh4 + | | `-- SH-4 generic files + | `-- mm + | `-- This is also broken out per CPU family, so each family can + | have their own set of cache/tlb functions. + | + `-- include + `-- asm-sh + |-- cpu-sh2 + | `-- SH-2 specific headers + |-- cpu-sh3 + | `-- SH-3 specific headers + `-- cpu-sh4 + `-- SH-4 specific headers It should be noted that CPU subtypes are _not_ abstracted. Thus, these still need to be dealt with by the CPU family specific code. @@ -110,33 +114,33 @@ arch/sh/boards and the include/asm-sh/ hierarchy. In order to better explain this, we use some examples for adding an imaginary board. For setup code, we're required at the very least to provide definitions for get_system_type() and platform_setup(). For our imaginary board, this -might look something like: +might look something like:: -/* - * arch/sh/boards/vapor/setup.c - Setup code for imaginary board - */ -#include + /* + * arch/sh/boards/vapor/setup.c - Setup code for imaginary board + */ + #include -const char *get_system_type(void) -{ - return "FooTech Vaporboard"; -} + const char *get_system_type(void) + { + return "FooTech Vaporboard"; + } -int __init platform_setup(void) -{ - /* - * If our hardware actually existed, we would do real - * setup here. Though it's also sane to leave this empty - * if there's no real init work that has to be done for - * this board. - */ + int __init platform_setup(void) + { + /* + * If our hardware actually existed, we would do real + * setup here. Though it's also sane to leave this empty + * if there's no real init work that has to be done for + * this board. + */ - /* Start-up imaginary PCI ... */ + /* Start-up imaginary PCI ... */ - /* And whatever else ... */ + /* And whatever else ... */ - return 0; -} + return 0; + } Our new imaginary board will also have to tie into the machvec in order for it to be of any use. @@ -172,16 +176,16 @@ sufficient. vector. Note that these prototypes are generated automatically by setting - __IO_PREFIX to something sensible. A typical example would be: + __IO_PREFIX to something sensible. A typical example would be:: #define __IO_PREFIX vapor - #include + #include somewhere in the board-specific header. Any boards being ported that still have a legacy io.h should remove it entirely and switch to the new model. - Add machine vector definitions to the board's setup.c. At a bare minimum, - this must be defined as something like: + this must be defined as something like:: struct sh_machine_vector mv_vapor __initmv = { .mv_name = "vapor", @@ -202,20 +206,20 @@ Large portions of the build system are now entirely dynamic, and merely require the proper entry here and there in order to get things done. The first thing to do is to add an entry to arch/sh/Kconfig, under the -"System type" menu: +"System type" menu:: -config SH_VAPOR - bool "Vapor" - help - select Vapor if configuring for a FooTech Vaporboard. + config SH_VAPOR + bool "Vapor" + help + select Vapor if configuring for a FooTech Vaporboard. next, this has to be added into arch/sh/Makefile. All boards require a machdir-y entry in order to be built. This entry needs to be the name of the board directory as it appears in arch/sh/boards, even if it is in a sub-directory (in which case, all parent directories below arch/sh/boards/ -need to be listed). For our new board, this entry can look like: +need to be listed). For our new board, this entry can look like:: -machdir-$(CONFIG_SH_VAPOR) += vapor + machdir-$(CONFIG_SH_VAPOR) += vapor provided that we've placed everything in the arch/sh/boards/vapor/ directory. @@ -230,7 +234,7 @@ This is done by adding an entry to the end of the arch/sh/tools/mach-types list. The method for doing this is self explanatory, and so we won't waste space restating it here. After this is done, you will be able to use implicit checks for your board if you need this somewhere throughout the -common code, such as: +common code, such as:: /* Make sure we're on the FooTech Vaporboard */ if (!mach_is_vapor()) @@ -253,16 +257,19 @@ build target, and it will be implicitly listed as such in the help text. Looking at the 'make help' output, you should now see something like: Architecture specific targets (sh): - zImage - Compressed kernel image (arch/sh/boot/zImage) - adx_defconfig - Build for adx - cqreek_defconfig - Build for cqreek - dreamcast_defconfig - Build for dreamcast -... - vapor_defconfig - Build for vapor -which then allows you to do: + ======================= ============================================= + zImage Compressed kernel image (arch/sh/boot/zImage) + adx_defconfig Build for adx + cqreek_defconfig Build for cqreek + dreamcast_defconfig Build for dreamcast + ... + vapor_defconfig Build for vapor + ======================= ============================================= -$ make ARCH=sh CROSS_COMPILE=sh4-linux- vapor_defconfig vmlinux +which then allows you to do:: + + $ make ARCH=sh CROSS_COMPILE=sh4-linux- vapor_defconfig vmlinux which will in turn copy the defconfig for this board, run it through oldconfig (prompting you for any new options since the time of creation), From patchwork Tue Mar 3 13:59:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 11418161 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 547CC174A for ; Tue, 3 Mar 2020 13:59:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 34FD620675 for ; Tue, 3 Mar 2020 13:59:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1583243978; bh=38DXsbkZYmqOhYk1K5sLCRkUW+WnqbLtqwa6rshpzak=; h=From:Cc:Subject:Date:In-Reply-To:References:To:List-ID:From; b=u4UsDufU9ArHTERfBrY3ATZGsQYl4j8DwBE3BW4i8vtoRIqvosKCslf0gvJolM8S5 QkdBLlxc9nF8HT1svpyyXAV+xgwoEqXB4SeCCKkzU0UkSFH8FbH3t/keHewLkcyF1R BE5cNr8P2IzgR1QFY3srdLyc9ChU/ad/IrnZOTsQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729386AbgCCN7f (ORCPT ); Tue, 3 Mar 2020 08:59:35 -0500 Received: from mail.kernel.org ([198.145.29.99]:45730 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725796AbgCCN7f (ORCPT ); Tue, 3 Mar 2020 08:59:35 -0500 Received: from mail.kernel.org (ip-109-40-2-133.web.vodafone.de [109.40.2.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DB39022522; Tue, 3 Mar 2020 13:59:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1583243974; bh=38DXsbkZYmqOhYk1K5sLCRkUW+WnqbLtqwa6rshpzak=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Emi4SSzApCSJ0u9pPCjQNN91Bunihpa8oSagAUY+KnR5ODkkdiHE8CTMVGNAYdcaY Osta5d8Xz/v/WUf5B1YGTmgFO1LxdzxzctmYZg4dDKM9kOV5yi9vJ4Z51rkFvxVsj6 nvxu2ZsMiqy6J0VvuOomMji/WLAy6nbRM6wr48EQ= Received: from mchehab by mail.kernel.org with local (Exim 4.92.3) (envelope-from ) id 1j9850-001Ye0-K6; Tue, 03 Mar 2020 14:59:26 +0100 From: Mauro Carvalho Chehab Cc: Mauro Carvalho Chehab , Yoshinori Sato , Rich Felker , Jonathan Corbet , linux-sh@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH v3 16/18] docs: sh: convert register-banks.txt to ReST Date: Tue, 3 Mar 2020 14:59:23 +0100 Message-Id: <8095ea8e231bb75d66e343491880a8561c8dc043.1583243826.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: References: MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org - Add a SPDX header; - Adjust document title to follow ReST style; - Add blank lines to make ReST markup happy - Add it to sh/index.rst. Signed-off-by: Mauro Carvalho Chehab --- Documentation/sh/index.rst | 1 + .../sh/{register-banks.txt => register-banks.rst} | 13 ++++++++++--- arch/sh/Kconfig.cpu | 2 +- 3 files changed, 12 insertions(+), 4 deletions(-) rename Documentation/sh/{register-banks.txt => register-banks.rst} (88%) diff --git a/Documentation/sh/index.rst b/Documentation/sh/index.rst index 56c08790265d..580f3b17e841 100644 --- a/Documentation/sh/index.rst +++ b/Documentation/sh/index.rst @@ -8,6 +8,7 @@ SuperH Interfaces Guide :maxdepth: 1 new-machine + register-banks Memory Management ================= diff --git a/Documentation/sh/register-banks.txt b/Documentation/sh/register-banks.rst similarity index 88% rename from Documentation/sh/register-banks.txt rename to Documentation/sh/register-banks.rst index a6719f2f6594..2bef5c8fcbbc 100644 --- a/Documentation/sh/register-banks.txt +++ b/Documentation/sh/register-banks.rst @@ -1,5 +1,8 @@ - Notes on register bank usage in the kernel - ========================================== +.. SPDX-License-Identifier: GPL-2.0 + +========================================== +Notes on register bank usage in the kernel +========================================== Introduction ------------ @@ -23,11 +26,15 @@ Presently the kernel uses several of these registers. - r0_bank, r1_bank (referenced as k0 and k1, used for scratch registers when doing exception handling). + - r2_bank (used to track the EXPEVT/INTEVT code) + - Used by do_IRQ() and friends for doing irq mapping based off of the interrupt exception vector jump table offset + - r6_bank (global interrupt mask) + - The SR.IMASK interrupt handler makes use of this to set the interrupt priority level (used by local_irq_enable()) + - r7_bank (current) - diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu index 4a4edc7e03d4..07ad7597cbe7 100644 --- a/arch/sh/Kconfig.cpu +++ b/arch/sh/Kconfig.cpu @@ -94,7 +94,7 @@ config CPU_HAS_SR_RB that are lacking this bit must have another method in place for accomplishing what is taken care of by the banked registers. - See for further + See for further information on SR.RB and register banking in the kernel in general. config CPU_HAS_PTEAEX