From patchwork Thu Mar 5 12:56:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11421807 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7370517EF for ; Thu, 5 Mar 2020 12:56:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4B91D208C3 for ; Thu, 5 Mar 2020 12:56:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="x/GCpm+r" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726359AbgCEM4y (ORCPT ); Thu, 5 Mar 2020 07:56:54 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:40012 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726251AbgCEM4x (ORCPT ); Thu, 5 Mar 2020 07:56:53 -0500 Received: by mail-pf1-f194.google.com with SMTP id l184so2738545pfl.7 for ; Thu, 05 Mar 2020 04:56:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dP34NIY3vUcrPIJjDeu/Blhnqm3Xgj1V/x7fdPviNVM=; b=x/GCpm+r1h1NoS7Eud+OL0RUercw7svJlacWGmfEqgaDRzhtpKleikRLx7oJb0+4NX 63XT1bn1EE1MPiLj1eAkPqpPSWjsKw1VjNep3qZToeZvkig3l5dcbPrc6LPyMyVIaswj OuhiETItkz1V2Jz50M/7N5ROtoerhySQ8tuU0MygcECub83bxBWOgSE58OXGA1DlLgec p0v3tRQUnoQ9gsZ/VjNwr4JuRdD8Yo8w5fmIM/y+QlcZw4O7He4iIHXu1tY6bWoBmIBc eBKlThF/7rGYpksUFIdxHwd/Cq8G5Yq/qzZkCjp6GKFgrY7VJ2nf6FxMA4mfZbOUuF5z FJvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dP34NIY3vUcrPIJjDeu/Blhnqm3Xgj1V/x7fdPviNVM=; b=WA2DVyCtFPfS5AOD0w5XT35O4AMWq0+h1Q1VJiMbM13LDBNv8iRDbqn+hEfeX/K0a2 0rantx7GXtwFcNSj0AvVYdBW6cMrFbb+r30KeaIlj0ETmWJMei5HxsZwWAwe6Er/3ZYq EKAjxXhl6C+xFpEAJ789Wq4sg4x95AH9X4F4hcuC55Extpmys3CAveqbQtxlK1KVAtSs bD0IeqJUrjjRiQro1GDlBXGwCtxMRJoc+R+Q+qroJuBJctzXyPQAJdbwpX+F6QpsfNnw Modrk9XlVK4iY3zaOsqbs7/5B1nQ1OL4p+ASUNa4ftSGLSdW9Q4pcyZ1r8HN7jopgz0V njFw== X-Gm-Message-State: ANhLgQ3Osk29+7V0EukmOtI6u5N1+ButXGbt4UkqxIBgsaskDQZBnY/F XcT8J4PKxQF2nkUbraWLOXApjg== X-Google-Smtp-Source: ADFU+vuoCqdaiaMQfZ9881Jq92A8L39XbWt2O3FasIp11VKMI8ZgvI/QGHj3wFpE7kQHPwy2HudSOw== X-Received: by 2002:a62:7890:: with SMTP id t138mr8314473pfc.8.1583413012677; Thu, 05 Mar 2020 04:56:52 -0800 (PST) Received: from localhost ([103.195.202.216]) by smtp.gmail.com with ESMTPSA id j12sm16697389pga.78.2020.03.05.04.56.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Mar 2020 04:56:51 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, swboyd@chromium.org, mka@chromium.org, daniel.lezcano@linaro.org, Amit Kucheria , Zhang Rui Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/3] dt-bindings: thermal: Add yaml bindings for thermal sensors Date: Thu, 5 Mar 2020 18:26:41 +0530 Message-Id: <93466e6c031c0084de09bd6b448556a6c5080880.1583412540.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org As part of moving the thermal bindings to YAML, split it up into 3 bindings: thermal sensors, cooling devices and thermal zones. The property #thermal-sensor-cells is required in each device that acts as a thermal sensor. It is used to uniquely identify the instance of the thermal sensor inside the system. Signed-off-by: Amit Kucheria --- .../bindings/thermal/thermal-sensor.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/thermal-sensor.yaml diff --git a/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml b/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml new file mode 100644 index 0000000000000..920ee7667591d --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0) +# Copyright 2020 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/thermal-sensor.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Thermal sensor binding + +maintainers: + - Amit Kucheria + +description: | + Thermal management is achieved in devicetree by describing the sensor hardware + and the software abstraction of thermal zones required to take appropriate + action to mitigate thermal overloads. + + The following node types are used to completely describe a thermal management + system in devicetree: + - thermal-sensor: device that measures temperature, has SoC-specific bindings + - cooling-device: device used to dissipate heat either passively or artively + - thermal-zones: a container of the following node types used to describe all + thermal data for the platform + + This binding describes the thermal-sensor. + + Thermal sensor devices provide temperature sensing capabilities on thermal + zones. Typical devices are I2C ADC converters and bandgaps. Thermal sensor + devices may control one or more internal sensors. + +properties: + "#thermal-sensor-cells": + description: + Used to uniquely identify a thermal sensor instance within an IC. Will be + 0 on sensor nodes with only a single sensor and at least 1 on nodes + containing several internal sensors. + enum: [0, 1] + +examples: + - | + #include + + // Example 1: SDM845 TSENS + soc: soc@0 { + #address-cells = <2>; + #size-cells = <2>; + + /* ... */ + + tsens0: thermal-sensor@c263000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0 0x0c263000 0 0x1ff>, /* TM */ + <0 0x0c222000 0 0x1ff>; /* SROT */ + #qcom,sensors = <13>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal-sensor@c265000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0 0x0c265000 0 0x1ff>, /* TM */ + <0 0x0c223000 0 0x1ff>; /* SROT */ + #qcom,sensors = <8>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + }; +... From patchwork Thu Mar 5 12:56:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11421811 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 45F4192A for ; Thu, 5 Mar 2020 12:57:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1C0BF208C3 for ; Thu, 5 Mar 2020 12:57:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="EHt4DAgG" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726222AbgCEM47 (ORCPT ); Thu, 5 Mar 2020 07:56:59 -0500 Received: from mail-pj1-f67.google.com ([209.85.216.67]:51667 "EHLO mail-pj1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726162AbgCEM47 (ORCPT ); Thu, 5 Mar 2020 07:56:59 -0500 Received: by mail-pj1-f67.google.com with SMTP id l8so2468995pjy.1 for ; Thu, 05 Mar 2020 04:56:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YPje9xcPYfIamEpUGoSH/TcUKQBJFPYwji3i7uk9SdI=; b=EHt4DAgGtc8ZWbbUms/Azd5KsSQkQH56Vwm8e9HTZaNCV+GsiFiy3wkfP5ymusF9FR q0c9pXbn2AcjIXTcxk2jNH4DAbYGqdRx2oQNY5Amh84vt9TRg/0GNanxvEUn4tb2YIKM +dvpOYTDs70oZiZ7dRe6W63hbHfh1nue/w/p0hUj8vX+qNLcFnQu6Ad5iGdPp4/IPGAf pjxLSUBkWc761aiD10tMXEOSFPCW5SE7O4WB5Qyc8eqtWIrLpK+K1TxFV4gk4qgKlZHU JAoj7XtOgIATfwwruZ8DQD4qWdT8URKd+LIsSbLG+59717l7WjnfhsnyEGzj1WK0DgIT 5sXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YPje9xcPYfIamEpUGoSH/TcUKQBJFPYwji3i7uk9SdI=; b=kt44f53PVB7twiyMDGojTO7eHYujIZDs03vO1gR2HB7lQLAdCtJPZh0XbqeVmScEJ4 LVuOCI8ZdLg5Ay4dc72afrj/8IbELDCzqr8PUcvv2gjxpi5b+2JlsQY8eZQjmzVIXgxu N9A2fgNE9Firus7PYxbcy3lMLFCTlfchQIf2AcyhuQAfIE8VSVzldLiFCqqPygwMle98 cbb2X8RVpjm1rTwt+VASWCFriPyEwn02Mpx5OXGP8+VKKhe2snLdJU7wJgpNjnqXM9xa RPBeE0g43RtUJetdelBw2wQMwjaDVn/smN+0ED3AFidW80dgjqGZmnkXj1n0PEE+LgTv 7Aqg== X-Gm-Message-State: ANhLgQ2wxhuRq2q93NYKwZIr79eOfqO0qLqqXkYFIzKkqNQqEpXOal7O DSWue0XoiSzEUyU8845Jd3GNIzEuM9Y= X-Google-Smtp-Source: ADFU+vvPYdi7ZwmB0U0Sj6BPoR9D3pE/yA0/hXZrIVssSPjgpFaycsmnvIxiOf3TYBYNpoG36JlFLg== X-Received: by 2002:a17:90a:bf09:: with SMTP id c9mr7953201pjs.96.1583413016741; Thu, 05 Mar 2020 04:56:56 -0800 (PST) Received: from localhost ([103.195.202.216]) by smtp.gmail.com with ESMTPSA id r12sm32030259pgu.93.2020.03.05.04.56.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Mar 2020 04:56:55 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, swboyd@chromium.org, mka@chromium.org, daniel.lezcano@linaro.org, Amit Kucheria , Zhang Rui Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 2/3] dt-bindings: thermal: Add yaml bindings for thermal cooling-devices Date: Thu, 5 Mar 2020 18:26:42 +0530 Message-Id: <9a2052ee2afa43048bd4e2594d015fca6bbf5116.1583412540.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org As part of moving the thermal bindings to YAML, split it up into 3 bindings: thermal sensors, cooling devices and thermal zones. The property #cooling-cells is required in each device that acts as a cooling device - whether active or passive. So any device that can throttle its performance to passively reduce heat dissipation (e.g. cpus, gpus) and any device that can actively dissipate heat at different levels (e.g. fans) will contain this property. Signed-off-by: Amit Kucheria --- .../thermal/thermal-cooling-devices.yaml | 114 ++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml diff --git a/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml b/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml new file mode 100644 index 0000000000000..4745ea4b41ae7 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0) +# Copyright 2020 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Thermal cooling device binding + +maintainers: + - Amit Kucheria + +description: | + Thermal management is achieved in devicetree by describing the sensor hardware + and the software abstraction of cooling devices and thermal zones required to + take appropriate action to mitigate thermal overload. + + The following node types are used to completely describe a thermal management + system in devicetree: + - thermal-sensor: device that measures temperature, has SoC-specific bindings + - cooling-device: device used to dissipate heat either passively or artively + - thermal-zones: a container of the following node types used to describe all + thermal data for the platform + + This binding describes the cooling devices. + + There are essentially two ways to provide control on power dissipation: + - Passive cooling: by means of regulating device performance. A typical + passive cooling mechanism is a CPU that has dynamic voltage and frequency + scaling (DVFS), and uses lower frequencies as cooling states. + - Active cooling: by means of activating devices in order to remove the + dissipated heat, e.g. regulating fan speeds. + + Any cooling device has a range of cooling states (i.e. different levels of + heat dissipation). They also have a way to determine the state of cooling in + which the device is. For example, a fan's cooling states correspond to the + different fan speeds possible. Cooling states are referred to by single + unsigned integers, where larger numbers mean greater heat dissipation. The + precise set of cooling states associated with a device should be defined in + a particular device's binding. + +properties: + "#cooling-cells": + description: + Must be 2, in order to specify minimum and maximum cooling state used in + the cooling-maps reference. The first cell is the minimum cooling state + and the second cell is the maximum cooling state requested. + const: 2 + +examples: + - | + #include + #include + + // Example 1: Cpufreq cooling device on CPU0 + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x0>; + enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 + &LITTLE_CPU_SLEEP_1 + &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <607>; + dynamic-power-coefficient = <100>; + qcom,freq-domain = <&cpufreq_hw 0>; + #cooling-cells = <2>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + L3_0: l3-cache { + compatible = "cache"; + }; + }; + }; + + /* ... */ + + }; + + /* ... */ + + thermal-zones { + cpu0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 1>; + + trips { + cpu0_alert0: trip-point0 { + temperature = <90000>; + hysteresis = <2000>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + /* ... */ + }; +... From patchwork Thu Mar 5 12:56:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11421813 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5548C18B8 for ; Thu, 5 Mar 2020 12:57:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1BEAB2072D for ; Thu, 5 Mar 2020 12:57:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="p86SMEFr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726702AbgCEM5D (ORCPT ); Thu, 5 Mar 2020 07:57:03 -0500 Received: from mail-pj1-f67.google.com ([209.85.216.67]:53142 "EHLO mail-pj1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726676AbgCEM5C (ORCPT ); Thu, 5 Mar 2020 07:57:02 -0500 Received: by mail-pj1-f67.google.com with SMTP id lt1so2467763pjb.2 for ; Thu, 05 Mar 2020 04:57:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jRlUncaH+JbfpzbykeZUqo1ECa5C+qSIDXtQ4Uv6t6U=; b=p86SMEFrZyVIA/egXTcVNPeHiuo9PQHR5U4x5w1koSHSJ0eMmrWDwwhYuyF1Grjlnf Sgn5u1mp7wZGOIhLBmMR7qSactHvwoQ9X1L9uRuaENEx91owCXbRxZOarzWdPXjwskP9 CYbgyuKwD/+lUvhDOuf3ZLd+LrWlVHD9Dy/QkECPIwRMm9vf2NIbfR/qS+ay+zfBTjyq rxOBu1xV0BrHJxdr7Kt5rpAdhT8E//KAn8p7162GsjgPBeYzlhlOH6EgWTXSxJzUHDkY RvvTd7sPOH7byyAuonwNUvdOiNSrItRFQ7r9oHW1QTHZ2VYoVlb+in80RCToKi4xPXGo BkZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jRlUncaH+JbfpzbykeZUqo1ECa5C+qSIDXtQ4Uv6t6U=; b=PHy0rjvKzc2A/vjC5lqO3S26b5ni2KXYy9+8oFV4hr3viBzeQEO1eXIAOJtrYgNN0Q nZfwBAqWpUDv3y4x3bq8FG9w6YROQEAvSjdEjKvYZOEl+jayLgdKucyc5Edbfw0oQIlj 8f/rQrgWXEcgzaM9qvEJKGVKjD0gsvvq6P1nHalOoqhov8+PZ4bxWIgcWyyH91oVTVVh zLpEu8OVtavWd/yrVDQu5dEbEgPHZhbEiaXPjSaXAnYtfldDhEdj1E6iuq0J/nF4H6Cn kQfSKIoCxN5FGQBudvD8krNnfU/IJ70Fqr6zmGNljgJFHNW3oEHFZ02s0ZDFxTb0NyRc fiiw== X-Gm-Message-State: ANhLgQ3gsAv2I6ps2vbsZzhxvb0wPIUzOEAAzyMvYofo1iRpmJ46lr4m iImdzBxKcQqw67lJWApCmWUfRQ== X-Google-Smtp-Source: ADFU+vs8Qha1XeeXZZA19WT2v6N385wbYLD4vydtcleubJ7KnAHk1Hsb8SexOspFuxRmA6UDqdDRDQ== X-Received: by 2002:a17:90a:d104:: with SMTP id l4mr8913840pju.60.1583413021112; Thu, 05 Mar 2020 04:57:01 -0800 (PST) Received: from localhost ([103.195.202.216]) by smtp.gmail.com with ESMTPSA id gc22sm6459965pjb.0.2020.03.05.04.56.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Mar 2020 04:57:00 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, swboyd@chromium.org, mka@chromium.org, daniel.lezcano@linaro.org, Amit Kucheria , Zhang Rui Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 3/3] dt-bindings: thermal: Add yaml bindings for thermal zones Date: Thu, 5 Mar 2020 18:26:43 +0530 Message-Id: <8a0cfe9e3018f7996c1563035bee76048941beb4.1583412540.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org As part of moving the thermal bindings to YAML, split it up into 3 bindings: thermal sensors, cooling devices and thermal zones. The thermal-zone binding is a software abstraction to capture the properties of each zone - how often they should be checked, the temperature thresholds (trips) at which mitigation actions need to be taken and the level of mitigation needed at those thresholds. Signed-off-by: Amit Kucheria --- .../bindings/thermal/thermal-zones.yaml | 325 ++++++++++++++++++ 1 file changed, 325 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/thermal-zones.yaml diff --git a/Documentation/devicetree/bindings/thermal/thermal-zones.yaml b/Documentation/devicetree/bindings/thermal/thermal-zones.yaml new file mode 100644 index 0000000000000..f8f3b72bc3119 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/thermal-zones.yaml @@ -0,0 +1,325 @@ +# SPDX-License-Identifier: (GPL-2.0) +# Copyright 2020 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/thermal-zones.yaml# +$schema: http://devicetree.org/meta-schemas/base.yaml# + +title: Thermal zone binding + +maintainers: + - Amit Kucheria + +description: | + Thermal management is achieved in devicetree by describing the sensor hardware + and the software abstraction of cooling devices and thermal zones required to + take appropriate action to mitigate thermal overloads. + + The following node types are used to completely describe a thermal management + system in devicetree: + - thermal-sensor: device that measures temperature, has SoC-specific bindings + - cooling-device: device used to dissipate heat either passively or actively + - thermal-zones: a container of the following node types used to describe all + thermal data for the platform + + This binding describes the thermal-zones. + + The polling-delay properties of a thermal-zone are bound to the maximum dT/dt + (temperature derivative over time) in two situations for a thermal zone: + 1. when passive cooling is activated (polling-delay-passive) + 2. when the zone just needs to be monitored (polling-delay) or when + active cooling is activated. + + The maximum dT/dt is highly bound to hardware power consumption and + dissipation capability. The delays should be chosen to account for said + max dT/dt, such that a device does not cross several trip boundaries + unexpectedly between polls. Choosing the right polling delays shall avoid + having the device in temperature ranges that may damage the silicon structures + and reduce silicon lifetime. + +properties: + thermal-zones: + type: object + description: + A /thermal-zones node is required in order to use the thermal framework to + manage input from the various thermal zones in the system in order to + mitigate thermal overload conditions. It does not represent a real device + in the system, but acts as a container to link thermal sensor devices, + platform-data regarding temperature thresholds and the mitigation actions + to take when the temperature crosses those thresholds. + + properties: + $nodename: + pattern: "^[a-zA-Z][a-zA-Z0-9,\\-]{1,12}-thermal$" + type: object + description: + Each thermal zone node contains information about how frequently it + must be checked, the sensor responsible for reporting temperature for + this zone, one sub-node containing the various trip points for this + zone and one sub-node containing all the zone cooling-maps. + + properties: + polling-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + description: + The maximum number of milliseconds to wait between polls when + checking this thermal zone. Setting this to 0 disables the polling + timers setup by the thermal framework and assumes that the thermal + sensors in this zone support interrupts. + + polling-delay-passive: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + description: + The maximum number of milliseconds to wait between polls when + checking this thermal zone while doing passive cooling. Setting + this to 0 disables the polling timers setup by the thermal + framework and assumes that the thermal sensors in this zone + support interrupts. + + thermal-sensors: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A list of thermal sensor phandles and sensor specifiers used to + monitor this thermal zone. + + trips: + type: object + description: + This node describes a set of points in the temperature domain at + which the thermal framework needs to takes action. The actions to + be taken are defined in another node called cooling-maps. + + patternProperties: + "^[a-zA-Z][a-zA-Z0-9,+\\._]{0,63}$": + type: object + + properties: + temperature: + $ref: /schemas/types.yaml#/definitions/int32 + minimum: -273000 + maximum: 200000 + description: + An integer expressing the trip temperature in millicelsius. + + hysteresis: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + An unsigned integer expressing the hysteresis delta with + respect to the trip temperature property above, also in + millicelsius. + + type: + enum: + # active: enable active cooling e.g. fans + - active + # passive: enable passive cooling e.g. throttling cpu + - passive + # hot: send notification to driver if .notify + # callback registered + - hot + # critical: send notification to driver if .notify + # callback registered and trigger a shutdown + - critical + description: | + There are four valid trip types: active, passive, hot, + critical. + + The critical trip type is used to set the maximum + temperature threshold above which the HW becomes + unstable and underlying firmware might even trigger a + reboot. Hitting the critical threshold triggers a system + shutdown. + + The hot trip type can be used to send a notification to + the thermal driver (if a .notify callback is registered). + The action to be taken is left to the driver. + + The passive trip type can be used to slow down HW e.g. run + the CPU, GPU, bus at a lower frequency. + + The active trip type can be used to control other HW to + help in cooling e.g. fans can be sped up or slowed down + + required: + - temperature + - hysteresis + - type + + additionalProperties: false + + cooling-maps: + type: object + description: + This node describes the action to be taken when a thermal zone + crosses one of the temperature thresholds described in the trips + node. The action takes the form of a mapping relation between a + trip and the target cooling device state. + + patternProperties: + "^map[0-9][-a-zA-Z0-9]*$": + type: object + + properties: + trip: + $ref: /schemas/types.yaml#/definitions/phandle + description: + A phandle of a trip point node within this thermal zone. + + cooling-device: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A list of cooling device phandles along with the minimum + and maximum cooling state specifiers for each cooling + device. Using the THERMAL_NO_LIMIT (-1UL) constant in the + cooling-device phandle limit specifier lets the framework + use the minimum and maximum cooling state for that cooling + device automatically. + + contribution: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 100 + description: + The contribution of the cooling devices at the trip + temperature, both referenced in this map, to this thermal + zone as a percentage. + + required: + - trip + - cooling-device + + additionalProperties: false + +examples: + - | + #include + #include + + // Example 1: SDM845 TSENS + soc: soc@0 { + #address-cells = <2>; + #size-cells = <2>; + + /* ... */ + + tsens0: thermal-sensor@c263000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0 0x0c263000 0 0x1ff>, /* TM */ + <0 0x0c222000 0 0x1ff>; /* SROT */ + #qcom,sensors = <13>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal-sensor@c265000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0 0x0c265000 0 0x1ff>, /* TM */ + <0 0x0c223000 0 0x1ff>; /* SROT */ + #qcom,sensors = <8>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + }; + + /* ... */ + + thermal-zones { + cpu0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 1>; + + trips { + cpu0_alert0: trip-point0 { + temperature = <90000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_alert1: trip-point1 { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_crit: cpu_crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + + map1 { + trip = <&cpu0_alert1>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + /* ... */ + + cluster0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 5>; + + trips { + cluster0_alert0: trip-point0 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + cluster0_crit: cluster0_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + /* ... */ + + gpu-thermal-top { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 11>; + + trips { + gpu1_alert0: trip-point0 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + }; + }; + }; +...