From patchwork Fri Jul 27 15:28:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 10547367 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1D6749093 for ; Fri, 27 Jul 2018 15:28:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0C7052BF2B for ; Fri, 27 Jul 2018 15:28:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F2B342BF28; Fri, 27 Jul 2018 15:28:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 977C82BF28 for ; Fri, 27 Jul 2018 15:28:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388768AbeG0Quu (ORCPT ); Fri, 27 Jul 2018 12:50:50 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:57692 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732143AbeG0Qut (ORCPT ); Fri, 27 Jul 2018 12:50:49 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 51B9960481; Fri, 27 Jul 2018 15:28:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1532705304; bh=ufMeDiTiQBILFJ97ut1Zwrka7u4qNQCX/o+I6+AiyaA=; h=From:To:Cc:Subject:Date:From; b=AmdcHxULHSy7y46uscfpF1xzsHrFb7ku9a2NDzHwr+KiUAWSxZjBLLmYQ9UDsvjD3 ZOkzDc9mUQ/O3bv1Z6JvXxL3XU5zCNdsEpTVpPnQJaChNI4nFwlPoMXzEkwRLtyPut MHqjyURgWVXFEDvpFaTmqJkyJ0NdTfyDCX8cDG4Q= Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 36FF460481; Fri, 27 Jul 2018 15:28:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1532705303; bh=ufMeDiTiQBILFJ97ut1Zwrka7u4qNQCX/o+I6+AiyaA=; h=From:To:Cc:Subject:Date:From; b=MbxQKX8/jCFkXNgqmAs0pz5b4XiyerV7V1bOy/RBqK/coQwDTsMKK19QCMiDxrhyw 7pxIPO7Kn0aXNPFV3E6VZTnISTWVVYvoAS+So8Mgd8E/qVoEjYjE7pFTTNnJrUDgox A/PNHPlCKEDnTOjbRxKz+QtfQ7yoAkj+PAuvBXMc= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 36FF460481 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: bjorn.andersson@linaro.org, p.zabel@pengutronix.de, robh+dt@kernel.org Cc: linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ohad@wizery.com, mark.rutland@arm.com, sricharan@codeaurora.org, akdwived@codeaurora.org, linux-arm-msm@vger.kernel.org, tsoni@codeaurora.org, Sibi Sankar Subject: [PATCH 1/4] dt-bindings: reset: Add PDC reset binding for SDM845 SoCs Date: Fri, 27 Jul 2018 20:58:08 +0530 Message-Id: <20180727152811.15258-1-sibis@codeaurora.org> X-Mailer: git-send-email 2.17.0 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add SDM845 PDC (Power Domain Controller) reset controller binding Signed-off-by: Sibi Sankar --- .../bindings/reset/qcom,pdc-reset.txt | 52 +++++++++++++++++++ include/dt-bindings/reset/qcom,sdm845-pdc.h | 20 +++++++ 2 files changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt create mode 100644 include/dt-bindings/reset/qcom,sdm845-pdc.h diff --git a/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt b/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt new file mode 100644 index 000000000000..85e159962e08 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt @@ -0,0 +1,52 @@ +PDC Reset Controller +====================================== + +This binding describes a reset-controller found on PDC-Global(Power Domain +Controller) block for Qualcomm Technologies Inc SDM845 SoCs. + +Required properties: +- compatible: + Usage: required + Value type: + Definition: must be: + "qcom,sdm845-pdc-global" + +- reg: + Usage: required + Value type: + Definition: must specify the base address and size of the register + space. + +- #reset-cells: + Usage: required + Value type: + Definition: must be 1; cell entry represents the reset index. + +Example: + +pdc_reset: reset-controller@b2e0000 { + compatible = "qcom,sdm845-pdc-global"; + reg = <0xb2e0000 0x20000>; + #reset-cells = <1>; +}; + +PDC reset clients +====================================== + +Device nodes that need access to reset lines should +specify them as a reset phandle in their corresponding node as +specified in reset.txt. + +For list of all valid reset indicies see + + +Example: + +modem-pil@4080000 { + ... + + resets = <&pdc_reset PDC_MODEM_SYNC_RESET>; + reset-names = "pdc_restart"; + + ... +}; diff --git a/include/dt-bindings/reset/qcom,sdm845-pdc.h b/include/dt-bindings/reset/qcom,sdm845-pdc.h new file mode 100644 index 000000000000..53c37f9c319a --- /dev/null +++ b/include/dt-bindings/reset/qcom,sdm845-pdc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_RESET_PDC_SDM_845_H +#define _DT_BINDINGS_RESET_PDC_SDM_845_H + +#define PDC_APPS_SYNC_RESET 0 +#define PDC_SP_SYNC_RESET 1 +#define PDC_AUDIO_SYNC_RESET 2 +#define PDC_SENSORS_SYNC_RESET 3 +#define PDC_AOP_SYNC_RESET 4 +#define PDC_DEBUG_SYNC_RESET 5 +#define PDC_GPU_SYNC_RESET 6 +#define PDC_DISPLAY_SYNC_RESET 7 +#define PDC_COMPUTE_SYNC_RESET 8 +#define PDC_MODEM_SYNC_RESET 9 + +#endif From patchwork Fri Jul 27 15:28:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 10547381 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C4372A635 for ; Fri, 27 Jul 2018 15:28:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B2F9B2BF28 for ; Fri, 27 Jul 2018 15:28:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A73142BF2F; Fri, 27 Jul 2018 15:28:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 160F32BF28 for ; Fri, 27 Jul 2018 15:28:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732167AbeG0Qu4 (ORCPT ); Fri, 27 Jul 2018 12:50:56 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:57958 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732059AbeG0Quz (ORCPT ); Fri, 27 Jul 2018 12:50:55 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id B797360500; Fri, 27 Jul 2018 15:28:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1532705310; bh=LqwCyfXwsI+pReiheiD9HRSM4x7dh9ACT18cYfmvGPA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=of5Tqjq+fMFwpcSub3H5qjJxMVzGiWBlhbS4VfUCA3fLPv7XueRRtBP2pXPOidd6J dZLgHHbvWt8DLIAb/QcFC+HyxLAQz1HK/nf0BEojBJNf/fHguoz6Duc2bd+FZYwIUd ZeX5EXFMKe0DhXTSYIin+LeOq8hOw7VKrQ+zfUto= Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E218860B62; Fri, 27 Jul 2018 15:28:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1532705309; bh=LqwCyfXwsI+pReiheiD9HRSM4x7dh9ACT18cYfmvGPA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hh7khMsmLRbLeFerdOmivJPlak12/DAQ5pTxbVLYWA9rkbm2VUdTivGOWmofMX1+A ByM55l2cxKPB1y3Zxw5FKlCZzNsP7YiS9oGTh39xbVZU0DGpIO7CrK3aFp1aiwY69V hkeZlzHlzVranJYzsOcXJkrIHAwpsVnhY6+b3jOo= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E218860B62 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: bjorn.andersson@linaro.org, p.zabel@pengutronix.de, robh+dt@kernel.org Cc: linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ohad@wizery.com, mark.rutland@arm.com, sricharan@codeaurora.org, akdwived@codeaurora.org, linux-arm-msm@vger.kernel.org, tsoni@codeaurora.org, Sibi Sankar Subject: [PATCH 2/4] reset: qcom: PDC (Power Domain Controller) reset controller Date: Fri, 27 Jul 2018 20:58:09 +0530 Message-Id: <20180727152811.15258-2-sibis@codeaurora.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180727152811.15258-1-sibis@codeaurora.org> References: <20180727152811.15258-1-sibis@codeaurora.org> Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add reset controller for SDM845 SoC to control reset signals provided by PDC for Modem, Compute, Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS Signed-off-by: Sibi Sankar --- drivers/reset/Kconfig | 9 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-qcom-pdc.c | 139 +++++++++++++++++++++++++++++++++ 3 files changed, 149 insertions(+) create mode 100644 drivers/reset/reset-qcom-pdc.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 13d28fdbdbb5..5344e202a630 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -98,6 +98,15 @@ config RESET_QCOM_AOSS reset signals provided by AOSS for Modem, Venus, ADSP, GPU, Camera, Wireless, Display subsystem. Otherwise, say N. +config RESET_QCOM_PDC + bool "Qcom PDC Reset Driver" + depends on ARCH_QCOM || COMPILE_TEST + help + This enables the PDC (Power Domain Controller) reset driver + for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want + to control reset signals provided by PDC for Modem, Compute, + Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS. + config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 4243c38228e2..d08e8b90046a 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o +obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o obj-$(CONFIG_RESET_STM32MP157) += reset-stm32mp1.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o diff --git a/drivers/reset/reset-qcom-pdc.c b/drivers/reset/reset-qcom-pdc.c new file mode 100644 index 000000000000..64a0041e3452 --- /dev/null +++ b/drivers/reset/reset-qcom-pdc.c @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include + +struct qcom_pdc_reset_map { + u8 bit; +}; + +struct qcom_pdc_desc { + const struct regmap_config *config; + const struct qcom_pdc_reset_map *resets; + size_t num_resets; +}; + +struct qcom_pdc_reset_data { + struct reset_controller_dev rcdev; + struct regmap *regmap; + const struct qcom_pdc_desc *desc; +}; + +static const struct regmap_config sdm845_pdc_regmap_config = { + .name = "pdc-reset", + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = 0x20000, + .fast_io = true, +}; + +static const struct qcom_pdc_reset_map sdm845_pdc_resets[] = { + [PDC_APPS_SYNC_RESET] = {0}, + [PDC_SP_SYNC_RESET] = {1}, + [PDC_AUDIO_SYNC_RESET] = {2}, + [PDC_SENSORS_SYNC_RESET] = {3}, + [PDC_AOP_SYNC_RESET] = {4}, + [PDC_DEBUG_SYNC_RESET] = {5}, + [PDC_GPU_SYNC_RESET] = {6}, + [PDC_DISPLAY_SYNC_RESET] = {7}, + [PDC_COMPUTE_SYNC_RESET] = {8}, + [PDC_MODEM_SYNC_RESET] = {9}, +}; + +static const struct qcom_pdc_desc sdm845_pdc_desc = { + .config = &sdm845_pdc_regmap_config, + .resets = sdm845_pdc_resets, + .num_resets = ARRAY_SIZE(sdm845_pdc_resets), +}; + +static inline struct qcom_pdc_reset_data *to_qcom_pdc_reset_data( + struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct qcom_pdc_reset_data, rcdev); +} + +static int qcom_pdc_control_assert(struct reset_controller_dev *rcdev, + unsigned long idx) +{ + struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev); + const struct qcom_pdc_reset_map *map = &data->desc->resets[idx]; + + return regmap_update_bits(data->regmap, 0x100, + BIT(map->bit), BIT(map->bit)); +} + +static int qcom_pdc_control_deassert(struct reset_controller_dev *rcdev, + unsigned long idx) +{ + struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev); + const struct qcom_pdc_reset_map *map = &data->desc->resets[idx]; + + return regmap_update_bits(data->regmap, 0x100, BIT(map->bit), 0); +} + +static const struct reset_control_ops qcom_pdc_reset_ops = { + .assert = qcom_pdc_control_assert, + .deassert = qcom_pdc_control_deassert, +}; + +static int qcom_pdc_reset_probe(struct platform_device *pdev) +{ + struct qcom_pdc_reset_data *data; + struct device *dev = &pdev->dev; + const struct qcom_pdc_desc *desc; + void __iomem *base; + struct resource *res; + + desc = of_device_get_match_data(dev); + if (!desc) + return -EINVAL; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->desc = desc; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + data->regmap = devm_regmap_init_mmio(dev, base, desc->config); + if (IS_ERR(data->regmap)) { + dev_err(dev, "Unable to get pdc-global regmap"); + return PTR_ERR(data->regmap); + } + + data->rcdev.owner = THIS_MODULE; + data->rcdev.ops = &qcom_pdc_reset_ops; + data->rcdev.nr_resets = desc->num_resets; + data->rcdev.of_node = dev->of_node; + + return devm_reset_controller_register(dev, &data->rcdev); +} + +static const struct of_device_id qcom_pdc_reset_of_match[] = { + { .compatible = "qcom,sdm845-pdc-global", .data = &sdm845_pdc_desc }, + {} +}; + +static struct platform_driver qcom_pdc_reset_driver = { + .probe = qcom_pdc_reset_probe, + .driver = { + .name = "qcom_pdc_reset", + .of_match_table = qcom_pdc_reset_of_match, + }, +}; + +builtin_platform_driver(qcom_pdc_reset_driver); + +MODULE_DESCRIPTION("Qualcomm PDC Reset Driver"); +MODULE_LICENSE("GPL v2"); From patchwork Fri Jul 27 15:28:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 10547373 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 64DF514E0 for ; Fri, 27 Jul 2018 15:28:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 54B9C2BF28 for ; Fri, 27 Jul 2018 15:28:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 48C4E2BF2F; Fri, 27 Jul 2018 15:28:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EA7502BF28 for ; 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Fri, 27 Jul 2018 15:28:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1532705314; bh=F6IxRdGIUz/uMtIv7OPwXJgS2VXKumXWKuh3T9rSLu8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PxD/4Ws9tyxzHEIRitYbQTFBGZbjCSF2ouwM4nCYmr12wyXMtEl9cEEHgsgwXswjv vmT1NJduvWZR8IxE+oaoKvvRl7W9DZ2Kse+0cGrDfi1LPnnC4zgAT/C8ZxgS4Jk50O uhFe5XVvyPvdlMSaptDLCu0x8egs1bJZxmxxsSBg= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org F36D260BB2 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: bjorn.andersson@linaro.org, p.zabel@pengutronix.de, robh+dt@kernel.org Cc: linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ohad@wizery.com, mark.rutland@arm.com, sricharan@codeaurora.org, akdwived@codeaurora.org, linux-arm-msm@vger.kernel.org, tsoni@codeaurora.org, Sibi Sankar Subject: [PATCH 3/4] remoteproc: qcom: q6v5-pil: Explicitly get mss_restart line Date: Fri, 27 Jul 2018 20:58:10 +0530 Message-Id: <20180727152811.15258-3-sibis@codeaurora.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180727152811.15258-1-sibis@codeaurora.org> References: <20180727152811.15258-1-sibis@codeaurora.org> Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Explicitly get mss_restart to facilitate adding PDC restart line for modem on SDM845 SoCs Signed-off-by: Sibi Sankar --- drivers/remoteproc/qcom_q6v5_pil.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c index b1296d614b8b..d57fdb34e3dd 100644 --- a/drivers/remoteproc/qcom_q6v5_pil.c +++ b/drivers/remoteproc/qcom_q6v5_pil.c @@ -1176,8 +1176,7 @@ static int q6v5_init_clocks(struct device *dev, struct clk **clks, static int q6v5_init_reset(struct q6v5 *qproc) { - qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev, - NULL); + qproc->mss_restart = devm_reset_control_get(qproc->dev, "mss_restart"); if (IS_ERR(qproc->mss_restart)) { dev_err(qproc->dev, "failed to acquire mss restart\n"); return PTR_ERR(qproc->mss_restart); From patchwork Fri Jul 27 15:28:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 10547377 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6FA1FA635 for ; Fri, 27 Jul 2018 15:28:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5B7152BF26 for ; Fri, 27 Jul 2018 15:28:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4F98B2BF2B; Fri, 27 Jul 2018 15:28:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C4DE52BF28 for ; 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Fri, 27 Jul 2018 15:28:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1532705319; bh=i4h1ZO925eZkFZT+DmUMvFxOS80S10ooZwtqH6hbaeQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UWtrdPmx1wAZRPONU7zexD0R+zG3/ZquQ14FdtSo5ZvGTVwWEritW5+6gBfbq6o3x ngLGvfy1od9K2jrRtZipnK8ccNp6vt58tgwnJXCf0JjQ6rahuFfiP8h9y05W3aNv22 RNXVOS3PlZuI35iIXn3Lvi30yQfdu+ofahuHP9/8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0114F60481 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: bjorn.andersson@linaro.org, p.zabel@pengutronix.de, robh+dt@kernel.org Cc: linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ohad@wizery.com, mark.rutland@arm.com, sricharan@codeaurora.org, akdwived@codeaurora.org, linux-arm-msm@vger.kernel.org, tsoni@codeaurora.org, Sibi Sankar Subject: [PATCH 4/4] remoteproc: qcom: q6v5-pil: Add PDC restart for modem on SDM845 SoCs Date: Fri, 27 Jul 2018 20:58:11 +0530 Message-Id: <20180727152811.15258-4-sibis@codeaurora.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180727152811.15258-1-sibis@codeaurora.org> References: <20180727152811.15258-1-sibis@codeaurora.org> Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In the presence of a PDC block working with subsystem RSC, assert/deassert PDC restart in modem start/stop path. Signed-off-by: Sibi Sankar --- .../bindings/remoteproc/qcom,q6v5.txt | 4 +++ drivers/remoteproc/qcom_q6v5_pil.c | 27 ++++++++++++++++--- 2 files changed, 27 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 601dd9f389aa..124fb1dc6fb8 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -51,6 +51,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: reference to the reset-controller for the modem sub-system + reference to the list of 2 reset-controllers for the modem + sub-system on SDM845 SoCs reference to the list of 3 reset-controllers for the wcss sub-system @@ -58,6 +60,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must be "mss_restart" for the modem sub-system + Definition: must be "mss_restart", "pdc_restart" for the modem + sub-system on SDM845 SoCs Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" for the wcss syb-system diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c index d57fdb34e3dd..5be794639fc3 100644 --- a/drivers/remoteproc/qcom_q6v5_pil.c +++ b/drivers/remoteproc/qcom_q6v5_pil.c @@ -149,6 +149,7 @@ struct q6v5 { u32 halt_nc; struct reset_control *mss_restart; + struct reset_control *pdc_restart; struct qcom_q6v5 q6v5; @@ -349,10 +350,17 @@ static int q6v5_load(struct rproc *rproc, const struct firmware *fw) static int q6v5_reset_assert(struct q6v5 *qproc) { - if (qproc->has_alt_reset) - return reset_control_reset(qproc->mss_restart); - else - return reset_control_assert(qproc->mss_restart); + int ret; + + if (qproc->has_alt_reset) { + reset_control_assert(qproc->pdc_restart); + ret = reset_control_reset(qproc->mss_restart); + reset_control_deassert(qproc->pdc_restart); + } else { + ret = reset_control_assert(qproc->mss_restart); + } + + return ret; } static int q6v5_reset_deassert(struct q6v5 *qproc) @@ -360,9 +368,11 @@ static int q6v5_reset_deassert(struct q6v5 *qproc) int ret; if (qproc->has_alt_reset) { + reset_control_assert(qproc->pdc_restart); writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET); ret = reset_control_reset(qproc->mss_restart); writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET); + reset_control_deassert(qproc->pdc_restart); } else { ret = reset_control_deassert(qproc->mss_restart); } @@ -1182,6 +1192,15 @@ static int q6v5_init_reset(struct q6v5 *qproc) return PTR_ERR(qproc->mss_restart); } + if (qproc->has_alt_reset) { + qproc->pdc_restart = devm_reset_control_get(qproc->dev, + "pdc_restart"); + if (IS_ERR(qproc->pdc_restart)) { + dev_err(qproc->dev, "failed to acquire pdc restart\n"); + return PTR_ERR(qproc->pdc_restart); + } + } + return 0; }