From patchwork Mon Oct 1 12:31:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 10622065 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E28A116B1 for ; Mon, 1 Oct 2018 12:38:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D34482918D for ; Mon, 1 Oct 2018 12:38:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C58D3291AB; Mon, 1 Oct 2018 12:38:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F8812918D for ; Mon, 1 Oct 2018 12:38:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729325AbeJATQT (ORCPT ); Mon, 1 Oct 2018 15:16:19 -0400 Received: from condef-06.nifty.com ([202.248.20.71]:17477 "EHLO condef-06.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729243AbeJATQS (ORCPT ); Mon, 1 Oct 2018 15:16:18 -0400 X-Greylist: delayed 304 seconds by postgrey-1.27 at vger.kernel.org; Mon, 01 Oct 2018 15:16:16 EDT Received: from conuserg-12.nifty.com ([10.126.8.75])by condef-06.nifty.com with ESMTP id w91CVn7d010772; Mon, 1 Oct 2018 21:31:52 +0900 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w91CVGk9019301; Mon, 1 Oct 2018 21:31:17 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w91CVGk9019301 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1538397078; bh=Sjv0GqAg1u9MaHqXEyE3e7KrbWnbyDjHI+QmDJzfk9w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l2ePuxY49+91wZjt8aCx6rWICoTaVV0RD4bSaOHda5/7OgU//AKm9MxhVPTbzaWeT D8CDtE2jxXDz+Vs98x0nLygXWRUDtevSHf1MItWE3ut0ELE2UdwFloPp0Iy3fYE8vT VlPdkRdWJ1Hlu16tl3UB8mtppVQKvtEmYjUNJ/Eb54XBC6tm6GrClRmKSQJrlbBgZ0 ZjngOT9uFKZT37r/NSoL/kW72FyzVPs7OEaNjNTZI7Zp9RMwf2Xc/zaDhQaPzHQqO1 ugjI+PI0/cZSbMxURmTj7XBW7630L0LKRLf/HVrjctKDCOHqioqrdRbwlQ/fRUrv3g 3JI5emzxqwFqw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Wolfram Sang , linux-mmc@vger.kernel.org Cc: Ulf Hansson , linux-renesas-soc@vger.kernel.org, Masahiro Yamada , linux-kernel@vger.kernel.org Subject: [PATCH 1/2] mmc: tmio: move MFD variant reset to a platform hook Date: Mon, 1 Oct 2018 21:31:01 +0900 Message-Id: <1538397062-19162-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538397062-19162-1-git-send-email-yamada.masahiro@socionext.com> References: <1538397062-19162-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP CTL_RESET_SDIO register is specific to the TMIO MFD (tmio_mmc.c). Add a new hook host->reset for performing a platform-specific reset sequence, and move CTL_RESET_SDIO over there. Signed-off-by: Masahiro Yamada --- drivers/mmc/host/tmio_mmc.c | 9 +++++++++ drivers/mmc/host/tmio_mmc.h | 1 + drivers/mmc/host/tmio_mmc_core.c | 7 +++---- 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c index e04c322..c8e90cf 100644 --- a/drivers/mmc/host/tmio_mmc.c +++ b/drivers/mmc/host/tmio_mmc.c @@ -78,6 +78,14 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, tmio_mmc_clk_start(host); } +static void tmio_mmc_reset(struct tmio_mmc_host *host) +{ + sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); + usleep_range(10000, 11000); + sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); + usleep_range(10000, 11000); +} + #ifdef CONFIG_PM_SLEEP static int tmio_mmc_suspend(struct device *dev) { @@ -156,6 +164,7 @@ static int tmio_mmc_probe(struct platform_device *pdev) /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ host->bus_shift = resource_size(res) >> 10; host->set_clock = tmio_mmc_set_clock; + host->reset = tmio_mmc_reset; host->mmc->f_max = pdata->hclk; host->mmc->f_min = pdata->hclk / 512; diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index e6aa13a..a1a661b 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -176,6 +176,7 @@ struct tmio_mmc_host { int (*multi_io_quirk)(struct mmc_card *card, unsigned int direction, int blk_size); int (*write16_hook)(struct tmio_mmc_host *host, int addr); + void (*reset)(struct tmio_mmc_host *host); void (*hw_reset)(struct tmio_mmc_host *host); void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap); bool (*check_scc_error)(struct tmio_mmc_host *host); diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c index 0611824..fad840a 100644 --- a/drivers/mmc/host/tmio_mmc_core.c +++ b/drivers/mmc/host/tmio_mmc_core.c @@ -164,14 +164,13 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host) { /* FIXME - should we set stop clock reg here */ sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); - if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) - sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); usleep_range(10000, 11000); sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); - if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) - sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); usleep_range(10000, 11000); + if (host->reset) + host->reset(host); + if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); From patchwork Mon Oct 1 12:31:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 10622081 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1D27816B1 for ; Mon, 1 Oct 2018 12:39:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0C78F291D3 for ; Mon, 1 Oct 2018 12:39:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 001E02924C; Mon, 1 Oct 2018 12:39:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 99D9C29190 for ; Mon, 1 Oct 2018 12:39:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729244AbeJATRB (ORCPT ); Mon, 1 Oct 2018 15:17:01 -0400 Received: from condef-07.nifty.com ([202.248.20.72]:47814 "EHLO condef-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729334AbeJATRB (ORCPT ); Mon, 1 Oct 2018 15:17:01 -0400 Received: from conuserg-12.nifty.com ([10.126.8.75])by condef-07.nifty.com with ESMTP id w91CVtsI027058; Mon, 1 Oct 2018 21:31:55 +0900 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w91CVGkA019301; Mon, 1 Oct 2018 21:31:18 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w91CVGkA019301 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1538397079; bh=PEzsMrwJXw0LoSxVFtwvUIo6tex365qXteYhXs9PfIk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Lad5CemXH1TEKWVzTN3q9QYbYm53l3Vm3ZFvZye54fdMX2IOAOWcEB9fTB78/Ixfd h0EenAumHtagTjLB+uWRIPL8ZQ5Ilig653TE78yKF3qKRoDXLTrZ081t8HX+rPQizo /3rgn8ggoMX5RolQtQ3JOqoWVgmvMCS3pVb674wsaFzn80fjlnxZOqGKTHeM8UrAuL MyNnpcOBg9e0ZZzZ9vTldsQdB38bK7Z2CA2C4cz1QtyZ3SjCwoQBmqZ2v/wxmJ6QuG qumaiX6nAoxsL7Fo9UE9KFsLfW/aTJMF1efsC4QrGfcPinuYQlXMMqCv76gTk3HpFy 1RrEs31REDJTQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Wolfram Sang , linux-mmc@vger.kernel.org Cc: Ulf Hansson , linux-renesas-soc@vger.kernel.org, Masahiro Yamada , Lee Jones , linux-kernel@vger.kernel.org Subject: [PATCH 2/2] mmc: tmio: remove TMIO_MMC_HAVE_HIGH_REG flag Date: Mon, 1 Oct 2018 21:31:02 +0900 Message-Id: <1538397062-19162-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538397062-19162-1-git-send-email-yamada.masahiro@socionext.com> References: <1538397062-19162-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP TMIO_MMC_HAVE_HIGH_REG is confusing due to its counter-intuitive name. All the TMIO MMC variants (TMIO MMC, Renesas SDHI, UniPhier SD) actually have high registers. It is just that each of them implements its own registers there. The original IP from Panasonic only defines registers 0x00-0xff in the bus_shift=1 review. The register area above them is platform-dependent. In fact, TMIO_MMC_HAVE_HIGH_REG is set only by tmio-mmc.c and used to test the accessibility of CTL_SDIO_REGS. Because it is specific to the TMIO MFD variant, the right thing to do is to move such registers to tmio_mmc.c and delete the TMIO_MMC_HAVE_HIGH_REG flag. Signed-off-by: Masahiro Yamada --- drivers/mmc/host/tmio_mmc.c | 7 +++++-- drivers/mmc/host/tmio_mmc.h | 3 --- include/linux/mfd/tmio.h | 7 ------- 3 files changed, 5 insertions(+), 12 deletions(-) diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c index c8e90cf..9348608 100644 --- a/drivers/mmc/host/tmio_mmc.c +++ b/drivers/mmc/host/tmio_mmc.c @@ -24,6 +24,11 @@ #include "tmio_mmc.h" +/* Registers specific to this variant */ +#define CTL_SDIO_REGS 0x100 +#define CTL_CLK_AND_WAIT_CTL 0x138 +#define CTL_RESET_SDIO 0x1e0 + static void tmio_mmc_clk_start(struct tmio_mmc_host *host) { sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN | @@ -153,8 +158,6 @@ static int tmio_mmc_probe(struct platform_device *pdev) goto cell_disable; } - pdata->flags |= TMIO_MMC_HAVE_HIGH_REG; - host = tmio_mmc_host_alloc(pdev, pdata); if (IS_ERR(host)) { ret = PTR_ERR(host); diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index a1a661b..18b4308 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -47,9 +47,6 @@ #define CTL_RESET_SD 0xe0 #define CTL_VERSION 0xe2 #define CTL_SDIF_MODE 0xe6 -#define CTL_SDIO_REGS 0x100 -#define CTL_CLK_AND_WAIT_CTL 0x138 -#define CTL_RESET_SDIO 0x1e0 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ #define TMIO_STOP_STP BIT(0) diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 7786621..1e70060 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -62,13 +62,6 @@ #define TMIO_MMC_USE_GPIO_CD BIT(5) /* - * Some controllers doesn't have over 0x100 register. - * it is used to checking accessibility of - * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL - */ -#define TMIO_MMC_HAVE_HIGH_REG BIT(6) - -/* * Some controllers have CMD12 automatically * issue/non-issue register */