From patchwork Fri Mar 13 21:12:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 11437853 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D08F91392 for ; Fri, 13 Mar 2020 21:12:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B19662074F for ; Fri, 13 Mar 2020 21:12:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726637AbgCMVMt (ORCPT ); Fri, 13 Mar 2020 17:12:49 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:8667 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726681AbgCMVMt (ORCPT ); Fri, 13 Mar 2020 17:12:49 -0400 X-IronPort-AV: E=Sophos;i="5.70,550,1574089200"; d="scan'208";a="41620048" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 14 Mar 2020 06:12:47 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 79AFD40E09D5; Sat, 14 Mar 2020 06:12:43 +0900 (JST) From: Lad Prabhakar To: Mauro Carvalho Chehab , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Rob Herring , Mark Rutland , Sakari Ailus , NXP Linux Team , Magnus Damm , Ezequiel Garcia , Laurent Pinchart , Geert Uytterhoeven Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Lad Prabhakar , Fabio Estevam , linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/4] media: dt-bindings: media: i2c: Switch to assigned-clock-rates Date: Fri, 13 Mar 2020 21:12:31 +0000 Message-Id: <1584133954-6953-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584133954-6953-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <1584133954-6953-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Use assigned-clock-rates to specify the clock rate. Also mark clock-frequency property as deprecated. Signed-off-by: Lad Prabhakar Reviewed-by: Laurent Pinchart --- Documentation/devicetree/bindings/media/i2c/ov5645.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/i2c/ov5645.txt b/Documentation/devicetree/bindings/media/i2c/ov5645.txt index 72ad992..e62fe82 100644 --- a/Documentation/devicetree/bindings/media/i2c/ov5645.txt +++ b/Documentation/devicetree/bindings/media/i2c/ov5645.txt @@ -8,7 +8,7 @@ Required Properties: - compatible: Value should be "ovti,ov5645". - clocks: Reference to the xclk clock. - clock-names: Should be "xclk". -- clock-frequency: Frequency of the xclk clock. +- clock-frequency (deprecated): Frequency of the xclk clock. - enable-gpios: Chip enable GPIO. Polarity is GPIO_ACTIVE_HIGH. This corresponds to the hardware pin PWDNB which is physically active low. - reset-gpios: Chip reset GPIO. Polarity is GPIO_ACTIVE_LOW. This corresponds to @@ -37,7 +37,8 @@ Example: clocks = <&clks 200>; clock-names = "xclk"; - clock-frequency = <24000000>; + assigned-clocks = <&clks 200>; + assigned-clock-rates = <24000000>; vdddo-supply = <&camera_dovdd_1v8>; vdda-supply = <&camera_avdd_2v8>; From patchwork Fri Mar 13 21:12:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 11437861 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A96171392 for ; Fri, 13 Mar 2020 21:12:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 93AE420754 for ; Fri, 13 Mar 2020 21:12:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727414AbgCMVMx (ORCPT ); Fri, 13 Mar 2020 17:12:53 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:33087 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726681AbgCMVMx (ORCPT ); Fri, 13 Mar 2020 17:12:53 -0400 X-IronPort-AV: E=Sophos;i="5.70,550,1574089200"; d="scan'208";a="41835038" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 14 Mar 2020 06:12:52 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 1541B40E09D5; Sat, 14 Mar 2020 06:12:47 +0900 (JST) From: Lad Prabhakar To: Mauro Carvalho Chehab , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Rob Herring , Mark Rutland , Sakari Ailus , NXP Linux Team , Magnus Damm , Ezequiel Garcia , Laurent Pinchart , Geert Uytterhoeven Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Lad Prabhakar , Fabio Estevam , linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/4] media: i2c: ov5645: Switch to assigned-clock-rates Date: Fri, 13 Mar 2020 21:12:32 +0000 Message-Id: <1584133954-6953-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584133954-6953-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <1584133954-6953-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org This patch switches to assigned-clock-rates for specifying the clock rate. The clk-conf.c internally handles setting the clock rate when assigned-clock-rates is passed. The driver now sets the clock frequency only if the deprecated property clock-frequency is defined instead assigned-clock-rates, this is to avoid breakage with existing DT binaries. Signed-off-by: Lad Prabhakar Reviewed-by: Laurent Pinchart --- drivers/media/i2c/ov5645.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/media/i2c/ov5645.c b/drivers/media/i2c/ov5645.c index a6c17d1..4fbabf3 100644 --- a/drivers/media/i2c/ov5645.c +++ b/drivers/media/i2c/ov5645.c @@ -1055,6 +1055,7 @@ static int ov5645_probe(struct i2c_client *client) struct device_node *endpoint; struct ov5645 *ov5645; u8 chip_id_high, chip_id_low; + bool set_clk = false; unsigned int i; u32 xclk_freq; int ret; @@ -1094,12 +1095,18 @@ static int ov5645_probe(struct i2c_client *client) return PTR_ERR(ov5645->xclk); } - ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq); - if (ret) { - dev_err(dev, "could not get xclk frequency\n"); - return ret; + /* check if deprecated property clock-frequency is defined */ + ret = of_property_read_u32(dev->of_node, "clock-frequency", + &xclk_freq); + if (!ret) { + ret = clk_set_rate(ov5645->xclk, xclk_freq); + if (ret) { + dev_err(dev, "could not set xclk frequency\n"); + return ret; + } } + xclk_freq = clk_get_rate(ov5645->xclk); /* external clock must be 24MHz, allow 1% tolerance */ if (xclk_freq < 23760000 || xclk_freq > 24240000) { dev_err(dev, "external clock frequency %u is not supported\n", @@ -1107,12 +1114,6 @@ static int ov5645_probe(struct i2c_client *client) return -EINVAL; } - ret = clk_set_rate(ov5645->xclk, xclk_freq); - if (ret) { - dev_err(dev, "could not set xclk frequency\n"); - return ret; - } - for (i = 0; i < OV5645_NUM_SUPPLIES; i++) ov5645->supplies[i].supply = ov5645_supply_name[i]; From patchwork Fri Mar 13 21:12:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 11437871 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9229492A for ; Fri, 13 Mar 2020 21:13:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7325F20767 for ; Fri, 13 Mar 2020 21:13:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727474AbgCMVM7 (ORCPT ); Fri, 13 Mar 2020 17:12:59 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:35305 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726681AbgCMVM6 (ORCPT ); Fri, 13 Mar 2020 17:12:58 -0400 X-IronPort-AV: E=Sophos;i="5.70,550,1574089200"; d="scan'208";a="41620062" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 14 Mar 2020 06:12:56 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id A780D40E09DA; Sat, 14 Mar 2020 06:12:52 +0900 (JST) From: Lad Prabhakar To: Mauro Carvalho Chehab , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Rob Herring , Mark Rutland , Sakari Ailus , NXP Linux Team , Magnus Damm , Ezequiel Garcia , Laurent Pinchart , Geert Uytterhoeven Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Lad Prabhakar , Fabio Estevam , linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 3/4] media: i2c: ov5645: Set maximum leverage of external clock frequency to 24480000 Date: Fri, 13 Mar 2020 21:12:33 +0000 Message-Id: <1584133954-6953-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584133954-6953-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <1584133954-6953-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org While testing on Renesas RZ/G2E platform, noticed the clock frequency to be 24242424 as a result the probe failed. However increasing the maximum leverage of external clock frequency to 24480000 fixes this issue. Since this difference is small enough and is insignificant set the same in the driver. Signed-off-by: Lad Prabhakar --- drivers/media/i2c/ov5645.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/ov5645.c b/drivers/media/i2c/ov5645.c index 4fbabf3..b49359b 100644 --- a/drivers/media/i2c/ov5645.c +++ b/drivers/media/i2c/ov5645.c @@ -1107,8 +1107,10 @@ static int ov5645_probe(struct i2c_client *client) } xclk_freq = clk_get_rate(ov5645->xclk); - /* external clock must be 24MHz, allow 1% tolerance */ - if (xclk_freq < 23760000 || xclk_freq > 24240000) { + /* external clock must be 24MHz, allow a minimum 1% and a maximum of 2% + * tolerance + */ + if (xclk_freq < 23760000 || xclk_freq > 24480000) { dev_err(dev, "external clock frequency %u is not supported\n", xclk_freq); return -EINVAL; From patchwork Fri Mar 13 21:12:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 11437867 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ACCA31392 for ; Fri, 13 Mar 2020 21:13:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 96BD82074F for ; Fri, 13 Mar 2020 21:13:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727508AbgCMVND (ORCPT ); Fri, 13 Mar 2020 17:13:03 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:35305 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726681AbgCMVNC (ORCPT ); Fri, 13 Mar 2020 17:13:02 -0400 X-IronPort-AV: E=Sophos;i="5.70,550,1574089200"; d="scan'208";a="41620068" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 14 Mar 2020 06:13:01 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 44CD940E09DA; Sat, 14 Mar 2020 06:12:57 +0900 (JST) From: Lad Prabhakar To: Mauro Carvalho Chehab , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Rob Herring , Mark Rutland , Sakari Ailus , NXP Linux Team , Magnus Damm , Ezequiel Garcia , Laurent Pinchart , Geert Uytterhoeven Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Lad Prabhakar , Fabio Estevam , linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 4/4] ARM: dts: imx6qdl-wandboard: Switch to assigned-clock-rates for ov5645 node Date: Fri, 13 Mar 2020 21:12:34 +0000 Message-Id: <1584133954-6953-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584133954-6953-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <1584133954-6953-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org clock-frequency property is now marked as deprecated in ov5645 binding, so switch to assigned-clock-rates for specifying xclk clock frequency. Signed-off-by: Lad Prabhakar Reviewed-by: Laurent Pinchart --- arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi index c070893..71f5f75 100644 --- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi +++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi @@ -126,7 +126,8 @@ reg = <0x3c>; clocks = <&clks IMX6QDL_CLK_CKO2>; clock-names = "xclk"; - clock-frequency = <24000000>; + assigned-clocks = <&clks IMX6QDL_CLK_CKO2>; + assigned-clock-rates = <24000000>; vdddo-supply = <®_1p8v>; vdda-supply = <®_2p8v>; vddd-supply = <®_1p5v>;