From patchwork Fri Mar 20 03:26:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11448339 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3DA3892A for ; Fri, 20 Mar 2020 03:33:44 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 18A2720714 for ; Fri, 20 Mar 2020 03:33:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="VnRiqwIH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 18A2720714 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=3FowYU4bStsxZ8JRvdQHgQzhHNETruVfEpklrQ/SXuI=; b=VnR iqwIHrljU5hkYIY3I5t3VP/8FqwwEbzSLlV9XDUHZMDhkHWJ4OqHkLfihep65vWCjRPe3iUXW8Pg2 T5ngz4dSmwjy6tZJZyrSi/TD8KNSuexRsiCrzJ4Cpacdbw+7aUymBXl8YmbFCZ74GO3TbwdLvCDr7 JUZJNpts8uNCa6OuzYQc7YqvpFPYgLWSjws0SE1F7OTtymw3g69FDAvB+0GTHta/F8BIHcMOJzAdF JR2CZ/POZZt7L8VZPKr35OjCE/Zzgqr/9xAlh5DUZHu3ohc/VQ6ohIUql5Y9W2R/eVkS2I5iR8N98 PF155K8TmF+zM3yqU34zCJUDLoUx6sw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jF8Pk-0003xo-43; Fri, 20 Mar 2020 03:33:40 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jF8Pf-0003wW-NG for linux-arm-kernel@lists.infradead.org; Fri, 20 Mar 2020 03:33:38 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 6FA3E1A034C; Fri, 20 Mar 2020 04:33:32 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E738D1A0340; Fri, 20 Mar 2020 04:33:24 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id C18D9402E4; Fri, 20 Mar 2020 11:33:15 +0800 (SGT) From: Anson Huang To: rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, horia.geanta@nxp.com, peng.fan@nxp.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 1/3] dt-bindings: thermal: imx8mm-thermal: Add support for i.MX8MP Date: Fri, 20 Mar 2020 11:26:29 +0800 Message-Id: <1584674791-9717-1-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200319_203335_896825_A687793A X-CRM114-Status: UNSURE ( 6.94 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.13 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux-imx@nxp.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add thermal binding doc for Freescale's i.MX8MP Thermal Monitoring Unit. Signed-off-by: Anson Huang --- No change. --- Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt index d09ae82..3629d3c 100644 --- a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt @@ -1,10 +1,10 @@ * Thermal Monitoring Unit (TMU) on Freescale i.MX8MM SoC Required properties: -- compatible : Must be "fsl,imx8mm-tmu". +- compatible : Must be "fsl,imx8mm-tmu" or "fsl,imx8mp-tmu". - reg : Address range of TMU registers. - clocks : TMU's clock source. -- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description. +- #thermal-sensor-cells : Should be 0 or 1. See ./thermal.txt for a description. Example: tmu: tmu@30260000 { From patchwork Fri Mar 20 03:26:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11448347 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2DC0D92A for ; Fri, 20 Mar 2020 03:34:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0C27D2072C for ; Fri, 20 Mar 2020 03:34:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="i1KVNAOx" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0C27D2072C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=Qmo164h0ltGLggWsh2T1XLDF6MruEPmfjHcUCOV2mcI=; b=i1KVNAOxDL+zr9wcSk3XS9taMm VBpcmD1fEJvkiNvdjnUF3q+H1L8M0cQIBONRVgs5uKUr+Jjrrf4Z2gvBY3TirmcvIMalwO3UoXliO oCcYSjUd3v578KGwlPoXfhKBw0U6aZtz80adWu7dW07C07h8OftZSboAVY+jUOA86kfHH+jYmz52p p9LtT8ozr7ZHcOu6XOoT3/U8xzAkn7VzaF72J6XhQe+x3Vg1X+HR6GuZZ7hgeeVkV4++ZBI90c+2i ZOi2kXm0gOAMNI4VPj93Luosf+Bj8vy+nI20pF3g39C1NDoaTFmMKJ/eDXJPMaGkqN1yXLSDsMhZR YMHgZAZw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jF8Q7-0004KY-Vh; Fri, 20 Mar 2020 03:34:04 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jF8Pi-0003wX-BC for linux-arm-kernel@lists.infradead.org; Fri, 20 Mar 2020 03:33:40 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D9BD9200322; Fri, 20 Mar 2020 04:33:33 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 262E0200316; Fri, 20 Mar 2020 04:33:26 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 0BC29402EE; Fri, 20 Mar 2020 11:33:16 +0800 (SGT) From: Anson Huang To: rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, horia.geanta@nxp.com, peng.fan@nxp.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 2/3] thermal: imx8mm: Add i.MX8MP support Date: Fri, 20 Mar 2020 11:26:30 +0800 Message-Id: <1584674791-9717-2-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584674791-9717-1-git-send-email-Anson.Huang@nxp.com> References: <1584674791-9717-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200319_203338_662173_5248FCE5 X-CRM114-Status: GOOD ( 15.69 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.21 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux-imx@nxp.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org i.MX8MP shares same TMU with i.MX8MM, the only difference is i.MX8MP has two thermal sensors while i.MX8MM ONLY has one, add multiple sensors support for i.MX8MM TMU driver. Signed-off-by: Anson Huang --- Change since V1: - Use bitops operation to simplify the code logic; - Add helper function for TMU enable realted operations; - Add .get_temp function in socdata to simplify the common .get_temp function. --- drivers/thermal/imx8mm_thermal.c | 154 +++++++++++++++++++++++++++++++++------ 1 file changed, 130 insertions(+), 24 deletions(-) diff --git a/drivers/thermal/imx8mm_thermal.c b/drivers/thermal/imx8mm_thermal.c index d597ceb..c32308b 100644 --- a/drivers/thermal/imx8mm_thermal.c +++ b/drivers/thermal/imx8mm_thermal.c @@ -5,59 +5,143 @@ * Author: Anson Huang */ +#include #include #include #include #include #include -#include +#include #include #include #include "thermal_core.h" #define TER 0x0 /* TMU enable */ +#define TPS 0x4 #define TRITSR 0x20 /* TMU immediate temp */ #define TER_EN BIT(31) -#define TRITSR_VAL_MASK 0xff +#define TRITSR_TEMP0_VAL_MASK 0xff +#define TRITSR_TEMP1_VAL_MASK 0xff0000 -#define TEMP_LOW_LIMIT 10 +#define PROBE_SEL_ALL GENMASK(31, 30) -struct imx8mm_tmu { +#define probe_status_offset(x) (30 + x) +#define SIGN_BIT BIT(7) +#define TEMP_VAL_MASK GENMASK(6, 0) + +#define VER1_TEMP_LOW_LIMIT 10000 +#define VER2_TEMP_LOW_LIMIT -40000 +#define VER2_TEMP_HIGH_LIMIT 125000 + +#define TMU_VER1 0x1 +#define TMU_VER2 0x2 + +struct thermal_soc_data { + u32 num_sensors; + u32 version; + int (*get_temp)(void *, int *); +}; + +struct tmu_sensor { + struct imx8mm_tmu *priv; + u32 hw_id; struct thermal_zone_device *tzd; +}; + +struct imx8mm_tmu { void __iomem *base; struct clk *clk; + const struct thermal_soc_data *socdata; + struct tmu_sensor sensors[0]; }; -static int tmu_get_temp(void *data, int *temp) +static int imx8mm_tmu_get_temp(void *data, int *temp) { - struct imx8mm_tmu *tmu = data; + struct tmu_sensor *sensor = data; + struct imx8mm_tmu *tmu = sensor->priv; u32 val; - val = readl_relaxed(tmu->base + TRITSR) & TRITSR_VAL_MASK; - if (val < TEMP_LOW_LIMIT) + val = readl_relaxed(tmu->base + TRITSR) & TRITSR_TEMP0_VAL_MASK; + *temp = val * 1000; + if (*temp < VER1_TEMP_LOW_LIMIT) return -EAGAIN; + return 0; +} + +static int imx8mp_tmu_get_temp(void *data, int *temp) +{ + struct tmu_sensor *sensor = data; + struct imx8mm_tmu *tmu = sensor->priv; + bool ready; + u32 val; + + ready = test_bit(probe_status_offset(sensor->hw_id), + tmu->base + TRITSR); + if (!ready) + return -EAGAIN; + + val = readl_relaxed(tmu->base + TRITSR); + val = sensor->hw_id ? FIELD_GET(TRITSR_TEMP1_VAL_MASK, val) : + FIELD_GET(TRITSR_TEMP0_VAL_MASK, val); + if (val & SIGN_BIT) /* negative */ + val = (~(val & TEMP_VAL_MASK) + 1); + *temp = val * 1000; + if (*temp < VER2_TEMP_LOW_LIMIT || *temp > VER2_TEMP_HIGH_LIMIT) + return -EAGAIN; return 0; } +static int tmu_get_temp(void *data, int *temp) +{ + struct tmu_sensor *sensor = data; + struct imx8mm_tmu *tmu = sensor->priv; + + return tmu->socdata->get_temp(data, temp); +} + static struct thermal_zone_of_device_ops tmu_tz_ops = { .get_temp = tmu_get_temp, }; +static void imx8mm_tmu_enable(struct imx8mm_tmu *tmu, bool enable) +{ + u32 val; + + val = readl_relaxed(tmu->base + TER); + val = enable ? (val | TER_EN) : (val & ~TER_EN); + writel_relaxed(val, tmu->base + TER); +} + +static void imx8mm_tmu_probe_sel_all(struct imx8mm_tmu *tmu) +{ + u32 val; + + val = readl_relaxed(tmu->base + TPS); + val |= PROBE_SEL_ALL; + writel_relaxed(val, tmu->base + TPS); +} + static int imx8mm_tmu_probe(struct platform_device *pdev) { + const struct thermal_soc_data *data; struct imx8mm_tmu *tmu; - u32 val; int ret; + int i; + + data = of_device_get_match_data(&pdev->dev); - tmu = devm_kzalloc(&pdev->dev, sizeof(struct imx8mm_tmu), GFP_KERNEL); + tmu = devm_kzalloc(&pdev->dev, struct_size(tmu, sensors, + data->num_sensors), GFP_KERNEL); if (!tmu) return -ENOMEM; + tmu->socdata = data; + tmu->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(tmu->base)) return PTR_ERR(tmu->base); @@ -77,20 +161,32 @@ static int imx8mm_tmu_probe(struct platform_device *pdev) return ret; } - tmu->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, - tmu, &tmu_tz_ops); - if (IS_ERR(tmu->tzd)) { - dev_err(&pdev->dev, - "failed to register thermal zone sensor: %d\n", ret); - return PTR_ERR(tmu->tzd); + /* disable the monitor during initialization */ + imx8mm_tmu_enable(tmu, false); + + for (i = 0; i < data->num_sensors; i++) { + tmu->sensors[i].priv = tmu; + tmu->sensors[i].tzd = + devm_thermal_zone_of_sensor_register(&pdev->dev, i, + &tmu->sensors[i], + &tmu_tz_ops); + if (IS_ERR(tmu->sensors[i].tzd)) { + dev_err(&pdev->dev, + "failed to register thermal zone sensor[%d]: %d\n", + i, ret); + return PTR_ERR(tmu->sensors[i].tzd); + } + tmu->sensors[i].hw_id = i; } platform_set_drvdata(pdev, tmu); + /* enable all the probes for V2 TMU */ + if (tmu->socdata->version == TMU_VER2) + imx8mm_tmu_probe_sel_all(tmu); + /* enable the monitor */ - val = readl_relaxed(tmu->base + TER); - val |= TER_EN; - writel_relaxed(val, tmu->base + TER); + imx8mm_tmu_enable(tmu, true); return 0; } @@ -98,12 +194,9 @@ static int imx8mm_tmu_probe(struct platform_device *pdev) static int imx8mm_tmu_remove(struct platform_device *pdev) { struct imx8mm_tmu *tmu = platform_get_drvdata(pdev); - u32 val; /* disable TMU */ - val = readl_relaxed(tmu->base + TER); - val &= ~TER_EN; - writel_relaxed(val, tmu->base + TER); + imx8mm_tmu_enable(tmu, false); clk_disable_unprepare(tmu->clk); platform_set_drvdata(pdev, NULL); @@ -111,8 +204,21 @@ static int imx8mm_tmu_remove(struct platform_device *pdev) return 0; } +static struct thermal_soc_data imx8mm_tmu_data = { + .num_sensors = 1, + .version = TMU_VER1, + .get_temp = imx8mm_tmu_get_temp, +}; + +static struct thermal_soc_data imx8mp_tmu_data = { + .num_sensors = 2, + .version = TMU_VER2, + .get_temp = imx8mp_tmu_get_temp, +}; + static const struct of_device_id imx8mm_tmu_table[] = { - { .compatible = "fsl,imx8mm-tmu", }, + { .compatible = "fsl,imx8mm-tmu", .data = &imx8mm_tmu_data, }, + { .compatible = "fsl,imx8mp-tmu", .data = &imx8mp_tmu_data, }, { }, }; From patchwork Fri Mar 20 03:26:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11448345 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D6B192A for ; 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Fri, 20 Mar 2020 04:33:27 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 3FAD7402F3; Fri, 20 Mar 2020 11:33:18 +0800 (SGT) From: Anson Huang To: rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, horia.geanta@nxp.com, peng.fan@nxp.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 3/3] arm64: dts: imx8mp: Add thermal zones support Date: Fri, 20 Mar 2020 11:26:31 +0800 Message-Id: <1584674791-9717-3-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584674791-9717-1-git-send-email-Anson.Huang@nxp.com> References: <1584674791-9717-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200319_203336_701348_773AD5DC X-CRM114-Status: UNSURE ( 7.93 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.13 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux-imx@nxp.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org i.MX8MP has a TMU inside which supports two thermal zones, add support for them. Signed-off-by: Anson Huang --- No change. --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 63 +++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 9b1616e..175165b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include #include "imx8mp-pinfunc.h" @@ -43,6 +44,7 @@ clocks = <&clk IMX8MP_CLK_ARM>; enable-method = "psci"; next-level-cache = <&A53_L2>; + #cooling-cells = <2>; }; A53_1: cpu@1 { @@ -53,6 +55,7 @@ clocks = <&clk IMX8MP_CLK_ARM>; enable-method = "psci"; next-level-cache = <&A53_L2>; + #cooling-cells = <2>; }; A53_2: cpu@2 { @@ -63,6 +66,7 @@ clocks = <&clk IMX8MP_CLK_ARM>; enable-method = "psci"; next-level-cache = <&A53_L2>; + #cooling-cells = <2>; }; A53_3: cpu@3 { @@ -73,6 +77,7 @@ clocks = <&clk IMX8MP_CLK_ARM>; enable-method = "psci"; next-level-cache = <&A53_L2>; + #cooling-cells = <2>; }; A53_L2: l2-cache0 { @@ -127,6 +132,57 @@ method = "smc"; }; + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; + polling-delay = <2000>; + thermal-sensors = <&tmu 0x0>; + trips { + cpu_alert0: trip0 { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit0: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + soc-thermal { + polling-delay-passive = <250>; + polling-delay = <2000>; + thermal-sensors = <&tmu 0x1>; + trips { + soc_alert0: trip0 { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + soc_crit0: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = , @@ -215,6 +271,13 @@ gpio-ranges = <&iomuxc 0 114 30>; }; + tmu: tmu@30260000 { + compatible = "fsl,imx8mp-tmu"; + reg = <0x30260000 0x10000>; + clocks = <&clk IMX8MP_CLK_TSENSOR_ROOT>; + #thermal-sensor-cells = <1>; + }; + wdog1: watchdog@30280000 { compatible = "fsl,imx8mp-wdt", "fsl,imx21-wdt"; reg = <0x30280000 0x10000>;