From patchwork Mon Mar 23 12:15:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Kao X-Patchwork-Id: 11452797 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E6EFC174A for ; Mon, 23 Mar 2020 12:16:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C5F902080C for ; Mon, 23 Mar 2020 12:16:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="m4wa/aWu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727447AbgCWMPp (ORCPT ); Mon, 23 Mar 2020 08:15:45 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:54031 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727377AbgCWMPo (ORCPT ); Mon, 23 Mar 2020 08:15:44 -0400 X-UUID: df17da0d8b6345b7aeef52b08729b011-20200323 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=t4KDU3gSGbmIBW1rfyL1Ets87sk3PSbQi3QOVB4Qbp0=; b=m4wa/aWu/KVS6/eZ2BS+RbH2oPKQiHlKWukwP93/jOan0aFMkJFqWdRHEE05Z+qilQgu/Jn2hSP/q7rf1DM0r220s4TOsF+Kx35YugPkp0hdDU1Rf7j3vpvvO4Ds3q7geOnJeLNxkHQhOxP831NbO8vdtnvjfcyAGvXk/QQhLyo=; X-UUID: df17da0d8b6345b7aeef52b08729b011-20200323 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1546018266; Mon, 23 Mar 2020 20:15:40 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 23 Mar 2020 20:14:29 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 23 Mar 2020 20:15:38 +0800 From: Michael Kao To: Matthias Brugger , Zhang Rui , Eduardo Valentin , Daniel Lezcano , Rob Herring , Mark Rutland , , , , CC: , , , Subject: [v4,2/7] arm64: dts: mt8183: add dynamic power coefficients Date: Mon, 23 Mar 2020 20:15:32 +0800 Message-ID: <20200323121537.22697-3-michael.kao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200323121537.22697-1-michael.kao@mediatek.com> References: <20200323121537.22697-1-michael.kao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: "michael.kao" Add dynamic power coefficients for all cores and update those of CPU0 and CPU4. Signed-off-by: Michael Kao --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 59f97217aaa8..2e2527c3369a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -75,6 +75,7 @@ reg = <0x000>; enable-method = "psci"; capacity-dmips-mhz = <741>; + dynamic-power-coefficient = <84>; }; cpu1: cpu@1 { @@ -83,6 +84,7 @@ reg = <0x001>; enable-method = "psci"; capacity-dmips-mhz = <741>; + dynamic-power-coefficient = <84>; }; cpu2: cpu@2 { @@ -91,6 +93,7 @@ reg = <0x002>; enable-method = "psci"; capacity-dmips-mhz = <741>; + dynamic-power-coefficient = <84>; }; cpu3: cpu@3 { @@ -99,6 +102,7 @@ reg = <0x003>; enable-method = "psci"; capacity-dmips-mhz = <741>; + dynamic-power-coefficient = <84>; }; cpu4: cpu@100 { @@ -107,6 +111,7 @@ reg = <0x100>; enable-method = "psci"; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <211>; }; cpu5: cpu@101 { @@ -115,6 +120,7 @@ reg = <0x101>; enable-method = "psci"; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <211>; }; cpu6: cpu@102 { @@ -123,6 +129,7 @@ reg = <0x102>; enable-method = "psci"; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <211>; }; cpu7: cpu@103 { @@ -131,6 +138,7 @@ reg = <0x103>; enable-method = "psci"; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <211>; }; }; From patchwork Mon Mar 23 12:15:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Kao X-Patchwork-Id: 11452791 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 18D78174A for ; Mon, 23 Mar 2020 12:15:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EC11B2078A for ; Mon, 23 Mar 2020 12:15:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="rPdY3Nmz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727649AbgCWMPr (ORCPT ); Mon, 23 Mar 2020 08:15:47 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:54031 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727401AbgCWMPr (ORCPT ); Mon, 23 Mar 2020 08:15:47 -0400 X-UUID: 226eb97b7fd3432e88f562d1b64e38d6-20200323 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=EmHqXxabAN0b2S2sXgJ4k8NzH+sbwvHDZlDKyy7WAIc=; b=rPdY3Nmz4WYS5bVakeNHhbsrK4+OCGZAVBDxcJN+obltT4mY20xl0C1U7kibm5SZljwNXDs9sE28jGgelsT/WaN5E6cYfL6L3DY2OtXcMJo21HHZqE68/O7BNB0CjdvsysHFyR2DUHYjPa0hdIB5M2GWX8qtPktK+9l3noCL8OE=; X-UUID: 226eb97b7fd3432e88f562d1b64e38d6-20200323 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 740827534; Mon, 23 Mar 2020 20:15:40 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 23 Mar 2020 20:14:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 23 Mar 2020 20:15:38 +0800 From: Michael Kao To: Matthias Brugger , Zhang Rui , Eduardo Valentin , Daniel Lezcano , Rob Herring , Mark Rutland , , , , CC: , , , Subject: [v4,3/7] arm64: dts: mt8183: Add #cooling-cells to CPU nodes Date: Mon, 23 Mar 2020 20:15:33 +0800 Message-ID: <20200323121537.22697-4-michael.kao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200323121537.22697-1-michael.kao@mediatek.com> References: <20200323121537.22697-1-michael.kao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: "michael.kao" The #cooling-cells property needs to be specified to allow a CPU to be used as cooling device. Signed-off-by: Michael Kao --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 2e2527c3369a..182fa6264e0d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -11,6 +11,7 @@ #include #include #include "mt8183-pinfunc.h" +#include / { compatible = "mediatek,mt8183"; @@ -76,6 +77,7 @@ enable-method = "psci"; capacity-dmips-mhz = <741>; dynamic-power-coefficient = <84>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -85,6 +87,7 @@ enable-method = "psci"; capacity-dmips-mhz = <741>; dynamic-power-coefficient = <84>; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -94,6 +97,7 @@ enable-method = "psci"; capacity-dmips-mhz = <741>; dynamic-power-coefficient = <84>; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -103,6 +107,7 @@ enable-method = "psci"; capacity-dmips-mhz = <741>; dynamic-power-coefficient = <84>; + #cooling-cells = <2>; }; cpu4: cpu@100 { @@ -112,6 +117,7 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <211>; + #cooling-cells = <2>; }; cpu5: cpu@101 { @@ -121,6 +127,7 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <211>; + #cooling-cells = <2>; }; cpu6: cpu@102 { @@ -130,6 +137,7 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <211>; + #cooling-cells = <2>; }; cpu7: cpu@103 { @@ -139,6 +147,7 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <211>; + #cooling-cells = <2>; }; }; From patchwork Mon Mar 23 12:15:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Kao X-Patchwork-Id: 11452783 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9C1B0174A for ; Mon, 23 Mar 2020 12:15:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 790CE20784 for ; Mon, 23 Mar 2020 12:15:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="WVq7BLBF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727414AbgCWMPo (ORCPT ); Mon, 23 Mar 2020 08:15:44 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:61955 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727303AbgCWMPo (ORCPT ); Mon, 23 Mar 2020 08:15:44 -0400 X-UUID: 9c596e1c356f48b498aefbbde324757d-20200323 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Syxtl64f/oiHmFDozNPlTQ/y9hPgVybUbznOPaoIJLs=; b=WVq7BLBFAVRGwysc2XISyaUEeWklgVbg4nAC5J1+72gq0s9hqfPeGmaRE22VMMS1//scEXCwM/w2NiRmYfM1w/gCV5GHYrM61lrM1uMi3Gk54jHUdmXeeOw+ppDb1tFtb4mqWae3A6+n1zBecWPV5UL3zXJfOayjRB7PA1wGfMU=; X-UUID: 9c596e1c356f48b498aefbbde324757d-20200323 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1151621450; Mon, 23 Mar 2020 20:15:41 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 23 Mar 2020 20:15:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 23 Mar 2020 20:15:38 +0800 From: Michael Kao To: Matthias Brugger , Zhang Rui , Eduardo Valentin , Daniel Lezcano , Rob Herring , Mark Rutland , , , , CC: , , , , Matthias Kaehlcke Subject: [v4,4/7] arm64: dts: mt8183: Configure CPU cooling Date: Mon, 23 Mar 2020 20:15:34 +0800 Message-ID: <20200323121537.22697-5-michael.kao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200323121537.22697-1-michael.kao@mediatek.com> References: <20200323121537.22697-1-michael.kao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Matthias Kaehlcke Add two passive trip points at 68°C and 80°C for the CPU temperature. Signed-off-by: Matthias Kaehlcke Signed-off-by: Michael Kao --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 55 ++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 182fa6264e0d..59ab2957d85d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -675,6 +675,61 @@ polling-delay = <500>; thermal-sensors = <&thermal 0>; sustainable-power = <5000>; + + trips { + threshold: trip-point@0 { + temperature = <68000>; + hysteresis = <2000>; + type = "passive"; + }; + + target: trip-point@1 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit: cpu-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&cpu0 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu1 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu2 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu3 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + contribution = <3072>; + }; + map1 { + trip = <&target>; + cooling-device = <&cpu4 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu5 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu6 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu7 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; }; /* The tzts1 ~ tzts6 don't need to polling */ From patchwork Mon Mar 23 12:15:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Kao X-Patchwork-Id: 11452789 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F3BFC174A for ; Mon, 23 Mar 2020 12:15:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D1E23207FC for ; Mon, 23 Mar 2020 12:15:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="azDZ7UXt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727980AbgCWMPu (ORCPT ); Mon, 23 Mar 2020 08:15:50 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:45754 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727401AbgCWMPt (ORCPT ); Mon, 23 Mar 2020 08:15:49 -0400 X-UUID: ebcb65c8de9a423d82d3780f683f4b53-20200323 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Wxu/rJjKNum6u7NU44aKieD1zc3Y+wnpPlval5gEFNw=; b=azDZ7UXtLWoEyREFg4MhpmsOwv1FesvpT5dD9uJlt9p5/b+C0PosyEaEgPElTU0i5J9jqWbnUis0zGpoCkZIYqrwkao5/ITbDGiS0eM5/cxyTe3FbJ6InuD2YWY3qYspegvFhd3dKevXlPhLqrXHisC3daXn3AgENQdhABjS72E=; X-UUID: ebcb65c8de9a423d82d3780f683f4b53-20200323 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1871207188; Mon, 23 Mar 2020 20:15:41 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 23 Mar 2020 20:15:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 23 Mar 2020 20:15:38 +0800 From: Michael Kao To: Matthias Brugger , Zhang Rui , Eduardo Valentin , Daniel Lezcano , Rob Herring , Mark Rutland , , , , CC: , , , Subject: [v4,5/7] thermal: mediatek: mt8183: fix bank number settings Date: Mon, 23 Mar 2020 20:15:35 +0800 Message-ID: <20200323121537.22697-6-michael.kao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200323121537.22697-1-michael.kao@mediatek.com> References: <20200323121537.22697-1-michael.kao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org MT8183_NUM_ZONES should be set to 1 because MT8183 doesn't have multiple banks. Fixes: a4ffe6b52d27 ("thermal: mediatek: add support for MT8183") Signed-off-by: Michael Kao Signed-off-by: Hsin-Yi Wang --- drivers/thermal/mtk_thermal.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 76e30603d4d5..6b7ef1993d7e 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -211,6 +211,9 @@ enum { /* The total number of temperature sensors in the MT8183 */ #define MT8183_NUM_SENSORS 6 +/* The number of banks in the MT8183 */ +#define MT8183_NUM_ZONES 1 + /* The number of sensing points per bank */ #define MT8183_NUM_SENSORS_PER_ZONE 6 @@ -497,7 +500,7 @@ static const struct mtk_thermal_data mt7622_thermal_data = { */ static const struct mtk_thermal_data mt8183_thermal_data = { .auxadc_channel = MT8183_TEMP_AUXADC_CHANNEL, - .num_banks = MT8183_NUM_SENSORS_PER_ZONE, + .num_banks = MT8183_NUM_ZONES, .num_sensors = MT8183_NUM_SENSORS, .vts_index = mt8183_vts_index, .cali_val = MT8183_CALIBRATION, From patchwork Mon Mar 23 12:15:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Kao X-Patchwork-Id: 11452793 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EDF7514B4 for ; Mon, 23 Mar 2020 12:15:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C47112078B for ; Mon, 23 Mar 2020 12:15:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Mrh0SgYK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727608AbgCWMPr (ORCPT ); Mon, 23 Mar 2020 08:15:47 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:37010 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727384AbgCWMPr (ORCPT ); Mon, 23 Mar 2020 08:15:47 -0400 X-UUID: 10e5c13d7f7b4fa48d2ad273c04ace85-20200323 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=6afKyor9AgACuTa8Oqf4MptvrGy9B10niDpAuK601p8=; b=Mrh0SgYK2mztGt3Sfq9lLr6Ow8t3HhXjV2eiphMsnsOwBoM1NKtuL4dOa9JWbT2T4Y1p7v2Wkl2DG9rKxt3EeglYhrR3qvMg5A5Ev8tEfVTWGzAdAHPL3P9WmEwWhfCuEdwDj9AvvziCX+DI6XThTO7AXV5IOHfe7XEBpjXjFqY=; X-UUID: 10e5c13d7f7b4fa48d2ad273c04ace85-20200323 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 2045009876; Mon, 23 Mar 2020 20:15:41 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 23 Mar 2020 20:15:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 23 Mar 2020 20:15:38 +0800 From: Michael Kao To: Matthias Brugger , Zhang Rui , Eduardo Valentin , Daniel Lezcano , Rob Herring , Mark Rutland , , , , CC: , , , Subject: [v4,6/7] thermal: mediatek: add another get_temp ops for thermal sensors Date: Mon, 23 Mar 2020 20:15:36 +0800 Message-ID: <20200323121537.22697-7-michael.kao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200323121537.22697-1-michael.kao@mediatek.com> References: <20200323121537.22697-1-michael.kao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Provide thermal zone to read thermal sensor in the SoC. We can read all the thermal sensors value in the SoC by the node /sys/class/thermal/ In mtk_thermal_bank_temperature, return -EAGAIN instead of -EACCESS on the first read of sensor that often are bogus values. This can avoid following warning on boot: thermal thermal_zone6: failed to read out thermal zone (-13) Signed-off-by: Michael Kao Signed-off-by: Hsin-Yi Wang --- drivers/thermal/mtk_thermal.c | 74 +++++++++++++++++++++++++++++++---- 1 file changed, 67 insertions(+), 7 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 6b7ef1993d7e..9eaca432920e 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -225,6 +225,11 @@ enum { struct mtk_thermal; +struct mtk_thermal_zone { + struct mtk_thermal *mt; + int id; +}; + struct thermal_bank_cfg { unsigned int num_sensors; const int *sensors; @@ -607,7 +612,7 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) * not immediately shut down. */ if (temp > 200000) - temp = 0; + temp = -EAGAIN; if (temp > max) max = temp; @@ -618,7 +623,8 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) static int mtk_read_temp(void *data, int *temperature) { - struct mtk_thermal *mt = data; + struct mtk_thermal_zone *tz = data; + struct mtk_thermal *mt = tz->mt; int i; int tempmax = INT_MIN; @@ -637,10 +643,44 @@ static int mtk_read_temp(void *data, int *temperature) return 0; } +static int mtk_read_sensor_temp(void *data, int *temperature) +{ + struct mtk_thermal_zone *tz = data; + struct mtk_thermal *mt = tz->mt; + const struct mtk_thermal_data *conf = mt->conf; + int id = tz->id - 1; + int temp = INT_MIN; + u32 raw; + + if (id < 0) + return -EACCES; + + raw = readl(mt->thermal_base + conf->msr[id]); + + temp = raw_to_mcelsius(mt, id, raw); + + /* + * The first read of a sensor often contains very high bogus + * temperature value. Filter these out so that the system does + * not immediately shut down. + */ + + if (temp > 200000) + return -EAGAIN; + + *temperature = temp; + + return 0; +} + static const struct thermal_zone_of_device_ops mtk_thermal_ops = { .get_temp = mtk_read_temp, }; +static const struct thermal_zone_of_device_ops mtk_thermal_sensor_ops = { + .get_temp = mtk_read_sensor_temp, +}; + static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num, u32 apmixed_phys_base, u32 auxadc_phys_base, int ctrl_id) @@ -873,6 +913,7 @@ static int mtk_thermal_probe(struct platform_device *pdev) struct resource *res; u64 auxadc_phys_base, apmixed_phys_base; struct thermal_zone_device *tzdev; + struct mtk_thermal_zone *tz; mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL); if (!mt) @@ -954,11 +995,30 @@ static int mtk_thermal_probe(struct platform_device *pdev) platform_set_drvdata(pdev, mt); - tzdev = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, mt, - &mtk_thermal_ops); - if (IS_ERR(tzdev)) { - ret = PTR_ERR(tzdev); - goto err_disable_clk_peri_therm; + for (i = 0; i < mt->conf->num_sensors + 1; i++) { + tz = kmalloc(sizeof(*tz), GFP_KERNEL); + if (!tz) + return -ENOMEM; + + tz->mt = mt; + tz->id = i; + + tzdev = devm_thermal_zone_of_sensor_register(&pdev->dev, i, + tz, (i == 0) ? + &mtk_thermal_ops : &mtk_thermal_sensor_ops); + + if (IS_ERR(tzdev)) { + if (PTR_ERR(tzdev) == -ENODEV) { + dev_warn(&pdev->dev, + "sensor %d not registered in thermal zone in dt\n", + i); + continue; + } + if (PTR_ERR(tzdev) == -EACCES) { + ret = PTR_ERR(tzdev); + goto err_disable_clk_peri_therm; + } + } } return 0;