From patchwork Wed Mar 25 16:07:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 11458217 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 013C01667 for ; Wed, 25 Mar 2020 16:07:47 +0000 (UTC) Received: by mail.kernel.org (Postfix) id EF32020772; Wed, 25 Mar 2020 16:07:46 +0000 (UTC) Delivered-To: soc@kernel.org Received: from localhost.localdomain (cpe-70-114-128-244.austin.res.rr.com [70.114.128.244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7AEF220409; Wed, 25 Mar 2020 16:07:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1585152466; bh=CmXFjlX19qTq6Sy8XTnxCWfr86FAfNhWX8oVk5ScR4A=; h=From:List-Id:To:Cc:Subject:Date:From; b=w2QnH+zjd9LCfJZh4QhD1Sf9SAoZ6p8+gs56F+a+BP02eqvKVkTcwBIGQrY3gZ4gi VggVBJtcCDXL7qzGk/pgmBSKtOuDnYRYsAjiDFkeAfzRWDupy/8wo57yuuJpLBORtE kEqdOIo8hEgd6k4auhQbc+x67yHHBVJ3yO0VyvJQ= From: Dinh Nguyen List-Id: To: arm@kernel.org, soc@kernel.org Cc: dinguyen@kernel.org Subject: [GIT PULL] socfpga dts updates for v5.7, part 2 Date: Wed, 25 Mar 2020 11:07:45 -0500 Message-Id: <20200325160745.793-1-dinguyen@kernel.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Hi Arnd, Kevin, and Olof: Please pull in this final DTS update for v5.7. Thanks, Dinh The following changes since commit 80f132d737091055ea79a59e03d1880aaf4203e3: arm64: dts: increase the QSPI reg address for Stratix10 and Agilex (2020-03-09 10:58:41 -0500) are available in the Git repository at: git@gitolite.kernel.org:pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_update_for_v5.7_part2 for you to fetch changes up to bd76a4f94239023106210178bb4c36abce3cee3f: ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes (2020-03-20 14:27:39 -0500) ---------------------------------------------------------------- SoCFPGA DTS updates for v5.7, part 2 - Add ptp_ref clock to ethernet nodes for Arria10 ---------------------------------------------------------------- Dalon Westergreen (1): ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes arch/arm/boot/dts/socfpga_arria10.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)