From patchwork Fri Mar 27 12:41:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: afzal mohammed X-Patchwork-Id: 11462309 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 965B113A4 for ; Fri, 27 Mar 2020 12:42:15 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 8F62720838; Fri, 27 Mar 2020 12:42:15 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pf1-f194.google.com (mail-pf1-f194.google.com [209.85.210.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 66D3B2082D; Fri, 27 Mar 2020 12:42:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Zmey7Rsg" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 66D3B2082D Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=afzal.mohd.ma@gmail.com Received: by mail-pf1-f194.google.com with SMTP id j1so4466300pfe.0; Fri, 27 Mar 2020 05:42:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SOrOCCE4z6J1sHuFdxhVTWwdjpzsQ9adaFltG09BEVg=; b=Zmey7RsgY68gZWN8kn7J/bo1k0I5hL0K5gpKxpY/nsuhHSOvUn//t6VTyA4quSZuw4 w14513DwK6CaTS3h900o86OPh57a6eL6rua/lzuOOnaitGQbO3XpDG/1B29SNo3fL/j3 bCB5Tz4QWUYD+Jk6dD0MFC+5JdsJ1h9GKB9MkDn++uQ7HhxZr2TxfMl9DZYI3zlgQqOF Bzf1T7YDvBZYf9qOgWOc3eon+XSD7fwg//6qy6r/mnmvVo3g5tDDrkewZUZzqOzgDGBN KUMIwGPhtjQ3/wIpX+GNVYUvU0iYuotNuoAbX4xHMP59RfBeKoeQ+jAt0vqJCJfyXyp9 CUPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SOrOCCE4z6J1sHuFdxhVTWwdjpzsQ9adaFltG09BEVg=; b=DN7bOfX74qgMvKa5dgjGOeDC7bwGmg02OmfL/mdsLzhe2uWo6Sg0Isji2b2ksYP+67 PCHgu2u962JYjwmSphK9dsRSSXbXDk1Sx+ra3Av4nO2hEToZ0sZ0nbJzc83cKQgVAnnr /g8GBiE05odbtJa1aXdEvcqb4O0d4fLq8Mthwz3j2+YbVwEwZW5NWiF82wazcU0o0z6J ElptIFU6FFouPKrahGqq8fQ1+KQOZoftcWLj6IWf2+9SR+Z5z2EoaYdz4mbUoHI7o5ek m4nRibNranVaFyjVlDjH7hUFqwEnCIEkPSNASerddyXTkzl/QRNwJzczP8edvbq+qavn dCIg== X-Gm-Message-State: ANhLgQ1xZObXJODRKld9qf57uGBp661Rzc/O6f6VpzXs5aZh1aLDc9vq Z78MrdbeRJupPSjoTpHAAKKv6P+y X-Google-Smtp-Source: ADFU+vsFUmet2yQ6YpnWSdQbIgJuXPOdUp3HDtFcl6nPspvzZdJH4Ydk8NCDgZHufjhSQ6s+Poi5fg== X-Received: by 2002:a63:1d52:: with SMTP id d18mr13398372pgm.443.1585312934746; Fri, 27 Mar 2020 05:42:14 -0700 (PDT) Received: from localhost.localdomain ([49.207.51.33]) by smtp.gmail.com with ESMTPSA id x186sm4014317pfb.151.2020.03.27.05.42.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Mar 2020 05:42:14 -0700 (PDT) From: afzal mohammed List-Id: To: Arnd Bergmann , SoC Team Cc: afzal mohammed , Thomas Gleixner , Tony Lindgren , Alexander Sverdlin , =?utf-8?q?Krzysztof_Ha?= =?utf-8?q?=C5=82asa?= , Viresh Kumar , Lubomir Rintel , Gregory CLEMENT , Hartley Sweeten , Viresh Kumar , Shiraz Hashim , Andrew Lunn , Jason Cooper , Sebastian Hesselbarth , Russell King , Linux ARM , "linux-kernel@vger.kernel.org" , arm-soc , Olof Johansson Subject: [PATCH v4 1/5] ARM: ep93xx: Replace setup_irq() by request_irq() Date: Fri, 27 Mar 2020 18:11:43 +0530 Message-Id: <20200327124143.3520-1-afzal.mohd.ma@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed Acked-by: Alexander Sverdlin --- v4: * Add received tags v3: * Split out from series, also create subarch level patch as Thomas suggested to take it thr' respective maintainers * Modify string displayed in case of error as suggested by Thomas * Re-arrange code as required to improve readability * Remove irrelevant parts from commit message & improve v2: * Replace pr_err("request_irq() on %s failed" by pr_err("%s: request_irq() failed" * Commit message massage arch/arm/mach-ep93xx/timer-ep93xx.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-ep93xx/timer-ep93xx.c b/arch/arm/mach-ep93xx/timer-ep93xx.c index de998830f534..dd4b164d1831 100644 --- a/arch/arm/mach-ep93xx/timer-ep93xx.c +++ b/arch/arm/mach-ep93xx/timer-ep93xx.c @@ -117,15 +117,11 @@ static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction ep93xx_timer_irq = { - .name = "ep93xx timer", - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .handler = ep93xx_timer_interrupt, - .dev_id = &ep93xx_clockevent, -}; - void __init ep93xx_timer_init(void) { + int irq = IRQ_EP93XX_TIMER3; + unsigned long flags = IRQF_TIMER | IRQF_IRQPOLL; + /* Enable and register clocksource and sched_clock on timer 4 */ writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE, EP93XX_TIMER4_VALUE_HIGH); @@ -136,7 +132,9 @@ void __init ep93xx_timer_init(void) EP93XX_TIMER4_RATE); /* Set up clockevent on timer 3 */ - setup_irq(IRQ_EP93XX_TIMER3, &ep93xx_timer_irq); + if (request_irq(irq, ep93xx_timer_interrupt, flags, "ep93xx timer", + &ep93xx_clockevent)) + pr_err("Failed to request irq %d (ep93xx timer)\n", irq); clockevents_config_and_register(&ep93xx_clockevent, EP93XX_TIMER123_RATE, 1, From patchwork Fri Mar 27 12:44:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: afzal mohammed X-Patchwork-Id: 11462343 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D43F481 for ; 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Fri, 27 Mar 2020 05:44:15 -0700 (PDT) Received: from localhost.localdomain ([49.207.51.33]) by smtp.gmail.com with ESMTPSA id v26sm4056641pfn.51.2020.03.27.05.44.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Mar 2020 05:44:14 -0700 (PDT) From: afzal mohammed List-Id: To: Arnd Bergmann , SoC Team Cc: afzal mohammed , Thomas Gleixner , Tony Lindgren , Alexander Sverdlin , =?utf-8?q?Krzysztof_Ha?= =?utf-8?q?=C5=82asa?= , Viresh Kumar , Lubomir Rintel , Gregory CLEMENT , Hartley Sweeten , Viresh Kumar , Shiraz Hashim , Andrew Lunn , Jason Cooper , Sebastian Hesselbarth , Russell King , Linux ARM , "linux-kernel@vger.kernel.org" , arm-soc , Olof Johansson Subject: [PATCH v4 2/5] ARM: spear: replace setup_irq() by request_irq() Date: Fri, 27 Mar 2020 18:14:06 +0530 Message-Id: <20200327124406.4123-1-afzal.mohd.ma@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed Acked-by: Viresh Kumar --- v4: * Add received tags v3: * Split out from series, also split out from ARM patch to subarch level as Thomas suggested to take it thr' respective maintainers * Modify string displayed in case of error as suggested by Thomas * Re-arrange code as required to improve readability * Remove irrelevant parts from commit message & improve v2: * Replace pr_err("request_irq() on %s failed" by pr_err("%s: request_irq() failed" * Commit message massage arch/arm/mach-spear/time.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c index 289e036c9c30..d1fdb6066f7b 100644 --- a/arch/arm/mach-spear/time.c +++ b/arch/arm/mach-spear/time.c @@ -181,12 +181,6 @@ static irqreturn_t spear_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction spear_timer_irq = { - .name = "timer", - .flags = IRQF_TIMER, - .handler = spear_timer_interrupt -}; - static void __init spear_clockevent_init(int irq) { u32 tick_rate; @@ -201,7 +195,8 @@ static void __init spear_clockevent_init(int irq) clockevents_config_and_register(&clkevt, tick_rate, 3, 0xfff0); - setup_irq(irq, &spear_timer_irq); + if (request_irq(irq, spear_timer_interrupt, IRQF_TIMER, "timer", NULL)) + pr_err("Failed to request irq %d (timer)\n", irq); } static const struct of_device_id timer_of_match[] __initconst = { From patchwork Fri Mar 27 12:44:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: afzal mohammed X-Patchwork-Id: 11462347 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0B36413A4 for ; Fri, 27 Mar 2020 12:44:31 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 05D6E20838; Fri, 27 Mar 2020 12:44:31 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pg1-f193.google.com (mail-pg1-f193.google.com [209.85.215.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D7122206F2; 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Fri, 27 Mar 2020 05:44:29 -0700 (PDT) From: afzal mohammed List-Id: To: Arnd Bergmann , SoC Team Cc: afzal mohammed , Thomas Gleixner , Tony Lindgren , Alexander Sverdlin , =?utf-8?q?Krzysztof_Ha?= =?utf-8?q?=C5=82asa?= , Viresh Kumar , Lubomir Rintel , Gregory CLEMENT , Hartley Sweeten , Viresh Kumar , Shiraz Hashim , Andrew Lunn , Jason Cooper , Sebastian Hesselbarth , Russell King , Linux ARM , "linux-kernel@vger.kernel.org" , arm-soc , Olof Johansson Subject: [PATCH v4 3/5] ARM: cns3xxx: replace setup_irq() by request_irq() Date: Fri, 27 Mar 2020 18:14:22 +0530 Message-Id: <20200327124422.4181-1-afzal.mohd.ma@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed Acked-by: Krzysztof Halasa --- v4: * Add received tags v3: * Split out from series, also split out from ARM patch to subarch level as Thomas suggested to take it thr' respective maintainers * Modify string displayed in case of error as suggested by Thomas * Re-arrange code as required to improve readability * Remove irrelevant parts from commit message & improve v2: * Replace pr_err("request_irq() on %s failed" by pr_err("%s: request_irq() failed" * Commit message massage arch/arm/mach-cns3xxx/core.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 1d61a7701c11..e4f4b20b83a2 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -189,12 +189,6 @@ static irqreturn_t cns3xxx_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction cns3xxx_timer_irq = { - .name = "timer", - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .handler = cns3xxx_timer_interrupt, -}; - /* * Set up the clock source and clock events devices */ @@ -245,7 +239,9 @@ static void __init __cns3xxx_timer_init(unsigned int timer_irq) writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); /* Make irqs happen for the system timer */ - setup_irq(timer_irq, &cns3xxx_timer_irq); + if (request_irq(timer_irq, cns3xxx_timer_interrupt, + IRQF_TIMER | IRQF_IRQPOLL, "timer", NULL)) + pr_err("Failed to request irq %d (timer)\n", timer_irq); cns3xxx_clockevents_init(timer_irq); } From patchwork Fri Mar 27 12:44:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: afzal mohammed X-Patchwork-Id: 11462351 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CEF611667 for ; Fri, 27 Mar 2020 12:44:45 +0000 (UTC) Received: by mail.kernel.org (Postfix) id CA58F20848; Fri, 27 Mar 2020 12:44:45 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pf1-f193.google.com (mail-pf1-f193.google.com [209.85.210.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A5C642082E; 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Fri, 27 Mar 2020 05:44:44 -0700 (PDT) From: afzal mohammed List-Id: To: Arnd Bergmann , SoC Team Cc: afzal mohammed , Thomas Gleixner , Tony Lindgren , Alexander Sverdlin , =?utf-8?q?Krzysztof_Ha?= =?utf-8?q?=C5=82asa?= , Viresh Kumar , Lubomir Rintel , Gregory CLEMENT , Hartley Sweeten , Viresh Kumar , Shiraz Hashim , Andrew Lunn , Jason Cooper , Sebastian Hesselbarth , Russell King , Linux ARM , "linux-kernel@vger.kernel.org" , arm-soc , Olof Johansson Subject: [PATCH v4 4/5] ARM: mmp: replace setup_irq() by request_irq() Date: Fri, 27 Mar 2020 18:14:37 +0530 Message-Id: <20200327124437.4239-1-afzal.mohd.ma@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed Acked-by: Lubomir Rintel Tested-by: Lubomir Rintel --- v4: * Add received tags v3: * Split out from series, also split out from ARM patch to subarch level as Thomas suggested to take it thr' respective maintainers * Modify string displayed in case of error as suggested by Thomas * Re-arrange code as required to improve readability * Remove irrelevant parts from commit message & improve v2: * Replace pr_err("request_irq() on %s failed" by pr_err("%s: request_irq() failed" * Commit message massage arch/arm/mach-mmp/time.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index c65cfc1ad99b..049a65f47b42 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c @@ -175,13 +175,6 @@ static void __init timer_config(void) __raw_writel(0x2, mmp_timer_base + TMR_CER); } -static struct irqaction timer_irq = { - .name = "timer", - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .handler = timer_interrupt, - .dev_id = &ckevt, -}; - void __init mmp_timer_init(int irq, unsigned long rate) { timer_config(); @@ -190,7 +183,9 @@ void __init mmp_timer_init(int irq, unsigned long rate) ckevt.cpumask = cpumask_of(0); - setup_irq(irq, &timer_irq); + if (request_irq(irq, timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL, + "timer", &ckevt)) + pr_err("Failed to request irq %d (timer)\n", irq); clocksource_register_hz(&cksrc, rate); clockevents_config_and_register(&ckevt, rate, MIN_DELTA, MAX_DELTA); From patchwork Fri Mar 27 12:44:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: afzal mohammed X-Patchwork-Id: 11462353 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF89092A for ; Fri, 27 Mar 2020 12:44:59 +0000 (UTC) Received: by mail.kernel.org (Postfix) id B95102082E; Fri, 27 Mar 2020 12:44:59 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pg1-f195.google.com (mail-pg1-f195.google.com [209.85.215.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 961EF206F2; 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Fri, 27 Mar 2020 05:44:58 -0700 (PDT) From: afzal mohammed List-Id: To: Arnd Bergmann , SoC Team Cc: afzal mohammed , Thomas Gleixner , Tony Lindgren , Alexander Sverdlin , =?utf-8?q?Krzysztof_Ha?= =?utf-8?q?=C5=82asa?= , Viresh Kumar , Lubomir Rintel , Gregory CLEMENT , Hartley Sweeten , Viresh Kumar , Shiraz Hashim , Andrew Lunn , Jason Cooper , Sebastian Hesselbarth , Russell King , Linux ARM , "linux-kernel@vger.kernel.org" , arm-soc , Olof Johansson Subject: [PATCH v4 5/5] ARM: iop32x: replace setup_irq() by request_irq() Date: Fri, 27 Mar 2020 18:14:51 +0530 Message-Id: <20200327124451.4298-1-afzal.mohd.ma@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed --- v4: * No change v3: * Split out from series, also split out from ARM patch to subarch level as Thomas suggested to take it thr' respective maintainers * Modify string displayed in case of error as suggested by Thomas * Re-arrange code as required to improve readability * Remove irrelevant parts from commit message & improve v2: * Replace pr_err("request_irq() on %s failed" by pr_err("%s: request_irq() failed" * Commit message massage arch/arm/mach-iop32x/time.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-iop32x/time.c b/arch/arm/mach-iop32x/time.c index 18a4df5c1baa..ae533b66fefd 100644 --- a/arch/arm/mach-iop32x/time.c +++ b/arch/arm/mach-iop32x/time.c @@ -137,13 +137,6 @@ iop_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction iop_timer_irq = { - .name = "IOP Timer Tick", - .handler = iop_timer_interrupt, - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .dev_id = &iop_clockevent, -}; - static unsigned long iop_tick_rate; unsigned long get_iop_tick_rate(void) { @@ -154,6 +147,7 @@ EXPORT_SYMBOL(get_iop_tick_rate); void __init iop_init_time(unsigned long tick_rate) { u32 timer_ctl; + int irq = IRQ_IOP32X_TIMER0; sched_clock_register(iop_read_sched_clock, 32, tick_rate); @@ -168,7 +162,9 @@ void __init iop_init_time(unsigned long tick_rate) */ write_tmr0(timer_ctl & ~IOP_TMR_EN); write_tisr(1); - setup_irq(IRQ_IOP32X_TIMER0, &iop_timer_irq); + if (request_irq(irq, iop_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL, + "IOP Timer Tick", &iop_clockevent)) + pr_err("Failed to request irq() %d (IOP Timer Tick)\n", irq); iop_clockevent.cpumask = cpumask_of(0); clockevents_config_and_register(&iop_clockevent, tick_rate, 0xf, 0xfffffffe);