From patchwork Tue Mar 31 10:45:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 11467309 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 017AE92C for ; Tue, 31 Mar 2020 10:45:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D143E208FE for ; Tue, 31 Mar 2020 10:45:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="l/uFeqjg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730343AbgCaKpt (ORCPT ); Tue, 31 Mar 2020 06:45:49 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:46793 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730242AbgCaKpt (ORCPT ); Tue, 31 Mar 2020 06:45:49 -0400 Received: by mail-pl1-f196.google.com with SMTP id s23so7968975plq.13; Tue, 31 Mar 2020 03:45:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=MxLEB1TjwZBGmBB/ZQJRbk9MhV3+/5MVrEoEIkaFWEg=; b=l/uFeqjg0Q+0nCWWSVLir1llB/cFAJYfpZ3Zfu9Ci8p5zGEUjrRzWEnsoTaUqcZuZ1 fMjYD/uYZQsNy0HLUAO9JATrWl9oFdwsN+4wLi9j7g+wUxBAwdEqB5dI9yiYuz8jJEHr MuDjcS4S0AK6CnWxnS5Kba+w0bmBjfUcom5w+C9gCAk35if4WDTgIeXAuyyJTIE5KFkL cdy3DpXcH/AHshPQtKZDg8Y6N4Ep47NiE/zBOx8XKfEt8lGu9fe26BZxWi4XdSOK/vFX hhySvozVLUQ9dK6RM+i/IGwzIRcE1b1RVi6rDeTbLKFmHZK4eyF8DqnmwLeB4QvMMvWI RBfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=MxLEB1TjwZBGmBB/ZQJRbk9MhV3+/5MVrEoEIkaFWEg=; b=UuG4Fz9KNSU4XcOXKH/vIuGcoHJM5ubG/7tV+MZTC3v2eD+mLxWSL1jYkv5w7Xq631 9q6oowOgizRfM5EauFb/8ZPFT/MGDLefw3NbCXxgKijmZyVVQxRLC+iNPZqnhIOlovts aWUJ0krxzb6XhkqD29qUqgkEl7rOun7mf91jGk4PxO+AEZkf9Q+8UDxnKPILrPxhWXVv Ki8vETqABbrsO6kMhPEzacFbzz1CioZNe/5P9FeVB2fppI+CjYGOQeRX31A8j4Wt2hRD Egjcp4gnUgzkUHa0t231CWmJKt9o4bd6+aeKeOC7CUEkE+RM/CH3OBrxQPs72NZPlelL RXQg== X-Gm-Message-State: AGi0PuaUQdJgD81Rq3Zq54RpJu3pKXZa6XSdGmHhkaRq/2l2q8p11UQ6 1cKaZBQdkAE+mG2FBfsBRcg= X-Google-Smtp-Source: APiQypK8so6BAq7FULz+XoJNXwOxMoGi2MmMOD07bP1gBNmL+vOeEB4AXL8DdPxsGWzACbpZvKAugw== X-Received: by 2002:a17:90a:e003:: with SMTP id u3mr3175902pjy.157.1585651547915; Tue, 31 Mar 2020 03:45:47 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id t1sm11432236pgh.88.2020.03.31.03.45.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Mar 2020 03:45:47 -0700 (PDT) From: Chunyan Zhang X-Google-Original-From: Chunyan Zhang To: Stephen Boyd , Michael Turquette Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [PATCH] clk: sprd: don't gate uart console clock Date: Tue, 31 Mar 2020 18:45:32 +0800 Message-Id: <20200331104532.12698-1-chunyan.zhang@unisoc.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Don't gate uart1_eb which provides console clock, gating that clock would make serial stop working if serial driver didn't enable that explicitly. Signed-off-by: Chunyan Zhang --- drivers/clk/sprd/sc9863a-clk.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/sprd/sc9863a-clk.c b/drivers/clk/sprd/sc9863a-clk.c index 24f064262814..6c6ac158ef61 100644 --- a/drivers/clk/sprd/sc9863a-clk.c +++ b/drivers/clk/sprd/sc9863a-clk.c @@ -1671,8 +1671,9 @@ static SPRD_SC_GATE_CLK_FW_NAME(i2c4_eb, "i2c4-eb", "ext-26m", 0x0, 0x1000, BIT(12), 0, 0); static SPRD_SC_GATE_CLK_FW_NAME(uart0_eb, "uart0-eb", "ext-26m", 0x0, 0x1000, BIT(13), 0, 0); +/* uart1_eb is for console, don't gate even if unused */ static SPRD_SC_GATE_CLK_FW_NAME(uart1_eb, "uart1-eb", "ext-26m", 0x0, - 0x1000, BIT(14), 0, 0); + 0x1000, BIT(14), CLK_IGNORE_UNUSED, 0); static SPRD_SC_GATE_CLK_FW_NAME(uart2_eb, "uart2-eb", "ext-26m", 0x0, 0x1000, BIT(15), 0, 0); static SPRD_SC_GATE_CLK_FW_NAME(uart3_eb, "uart3-eb", "ext-26m", 0x0,