From patchwork Wed Apr 1 20:17:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 11469501 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 591D117EF for ; Wed, 1 Apr 2020 20:17:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 383BA2078C for ; Wed, 1 Apr 2020 20:17:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732720AbgDAURx (ORCPT ); Wed, 1 Apr 2020 16:17:53 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:33810 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732385AbgDAURw (ORCPT ); Wed, 1 Apr 2020 16:17:52 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id E5E5E297612 From: Enric Balletbo i Serra To: mark.rutland@arm.com, ck.hu@mediatek.com, sboyd@kernel.org, ulrich.hecht+renesas@gmail.com Cc: linux-kernel@vger.kernel.org, matthias.bgg@gmail.com, drinkcat@chromium.org, hsinyi@chromium.org, Collabora Kernel ML , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, Matthias Brugger , matthias.bgg@kernel.org Subject: [PATCH v2 1/4] soc: mediatek: Enable mmsys driver by default if Mediatek arch is selected Date: Wed, 1 Apr 2020 22:17:33 +0200 Message-Id: <20200401201736.2980433-1-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The mmsys driver supports only MT8173 device for now, but like other system controllers is an important piece for other Mediatek devices. Actually it depends on the mt8173 clock specific driver but that dependency is not real as it can build without the clock driver. Instead of depends on a specific model, make the driver depends on the generic ARCH_MEDIATEK and enable by default so other Mediatek devices can start using it without flood the Kconfig. Signed-off-by: Enric Balletbo i Serra Tested-by: Hsin-Yi Wang --- Changes in v2: None drivers/soc/mediatek/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig index e84513318725..59a56cd790ec 100644 --- a/drivers/soc/mediatek/Kconfig +++ b/drivers/soc/mediatek/Kconfig @@ -46,8 +46,7 @@ config MTK_SCPSYS config MTK_MMSYS bool "MediaTek MMSYS Support" - depends on COMMON_CLK_MT8173_MMSYS - default COMMON_CLK_MT8173_MMSYS + default ARCH_MEDIATEK help Say yes here to add support for the MediaTek Multimedia Subsystem (MMSYS). From patchwork Wed Apr 1 20:17:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 11469503 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 720E492C for ; Wed, 1 Apr 2020 20:17:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 59E7A20772 for ; Wed, 1 Apr 2020 20:17:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733017AbgDAUR4 (ORCPT ); Wed, 1 Apr 2020 16:17:56 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:33840 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732385AbgDAUR4 (ORCPT ); Wed, 1 Apr 2020 16:17:56 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 8667D297617 From: Enric Balletbo i Serra To: mark.rutland@arm.com, ck.hu@mediatek.com, sboyd@kernel.org, ulrich.hecht+renesas@gmail.com Cc: linux-kernel@vger.kernel.org, matthias.bgg@gmail.com, drinkcat@chromium.org, hsinyi@chromium.org, Collabora Kernel ML , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, Matthias Brugger , matthias.bgg@kernel.org, Chun-Kuang Hu , Allison Randal , Greg Kroah-Hartman , Michael Turquette , Richard Fontana , Thomas Gleixner Subject: [PATCH v2 2/4] clk / soc: mediatek: Bind clock and gpu driver for mt2712 Date: Wed, 1 Apr 2020 22:17:34 +0200 Message-Id: <20200401201736.2980433-2-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200401201736.2980433-1-enric.balletbo@collabora.com> References: <20200401201736.2980433-1-enric.balletbo@collabora.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Now that the mmsys driver is the top-level entry point for the multimedia subsystem, we could bind the clock and the gpu driver on those devices that is expected to work, so the drm driver is intantiated by the mmsys driver and display, hopefully, working again on those devices. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Chun-Kuang Hu Acked-by: Stephen Boyd --- If you have this hardware, please kindly provide your tested tag. Only build tested. Changes in v2: - Remove of_match_table drivers/clk/mediatek/clk-mt2712-mm.c | 9 ++------- drivers/soc/mediatek/mtk-mmsys.c | 8 ++++++++ 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt2712-mm.c b/drivers/clk/mediatek/clk-mt2712-mm.c index 1c5948be35f3..5519c3d68c1f 100644 --- a/drivers/clk/mediatek/clk-mt2712-mm.c +++ b/drivers/clk/mediatek/clk-mt2712-mm.c @@ -128,9 +128,10 @@ static const struct mtk_gate mm_clks[] = { static int clk_mt2712_mm_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct device_node *node = dev->parent->of_node; struct clk_onecell_data *clk_data; int r; - struct device_node *node = pdev->dev.of_node; clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); @@ -146,16 +147,10 @@ static int clk_mt2712_mm_probe(struct platform_device *pdev) return r; } -static const struct of_device_id of_match_clk_mt2712_mm[] = { - { .compatible = "mediatek,mt2712-mmsys", }, - {} -}; - static struct platform_driver clk_mt2712_mm_drv = { .probe = clk_mt2712_mm_probe, .driver = { .name = "clk-mt2712-mm", - .of_match_table = of_match_clk_mt2712_mm, }, }; diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index 05e322c9c301..c7d3b7bcfa32 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -80,6 +80,10 @@ struct mtk_mmsys_driver_data { const char *clk_driver; }; +static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { + .clk_driver = "clk-mt2712-mm", +}; + static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { .clk_driver = "clk-mt8173-mm", }; @@ -319,6 +323,10 @@ static int mtk_mmsys_probe(struct platform_device *pdev) } static const struct of_device_id of_match_mtk_mmsys[] = { + { + .compatible = "mediatek,mt2712-mmsys", + .data = &mt2712_mmsys_driver_data, + }, { .compatible = "mediatek,mt8173-mmsys", .data = &mt8173_mmsys_driver_data, From patchwork Wed Apr 1 20:17:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 11469509 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4EFE01392 for ; Wed, 1 Apr 2020 20:18:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 370452082F for ; Wed, 1 Apr 2020 20:18:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733043AbgDAUR6 (ORCPT ); Wed, 1 Apr 2020 16:17:58 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:33868 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733024AbgDAUR6 (ORCPT ); Wed, 1 Apr 2020 16:17:58 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id CB035297613 From: Enric Balletbo i Serra To: mark.rutland@arm.com, ck.hu@mediatek.com, sboyd@kernel.org, ulrich.hecht+renesas@gmail.com Cc: linux-kernel@vger.kernel.org, matthias.bgg@gmail.com, drinkcat@chromium.org, hsinyi@chromium.org, Collabora Kernel ML , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, Matthias Brugger , matthias.bgg@kernel.org, Chun-Kuang Hu , Allison Randal , Kate Stewart , Michael Turquette , Richard Fontana , Thomas Gleixner Subject: [PATCH v2 3/4] clk / soc: mediatek: Bind clock and gpu driver for mt2701 Date: Wed, 1 Apr 2020 22:17:35 +0200 Message-Id: <20200401201736.2980433-3-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200401201736.2980433-1-enric.balletbo@collabora.com> References: <20200401201736.2980433-1-enric.balletbo@collabora.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Now that the mmsys driver is the top-level entry point for the multimedia subsystem, we could bind the clock and the gpu driver on those devices that is expected to work, so the drm driver is intantiated by the mmsys driver and display, hopefully, working again. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Chun-Kuang Hu Acked-by: Stephen Boyd --- If you have this hardware, please kindly provide your tested tag. Only build tested. Changes in v2: - Remove of_match_table drivers/clk/mediatek/clk-mt2701-mm.c | 9 ++------- drivers/soc/mediatek/mtk-mmsys.c | 8 ++++++++ 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt2701-mm.c b/drivers/clk/mediatek/clk-mt2701-mm.c index 054b597d4a73..cb18e1849492 100644 --- a/drivers/clk/mediatek/clk-mt2701-mm.c +++ b/drivers/clk/mediatek/clk-mt2701-mm.c @@ -79,16 +79,12 @@ static const struct mtk_gate mm_clks[] = { GATE_DISP1(CLK_MM_TVE_FMM, "mm_tve_fmm", "mm_sel", 14), }; -static const struct of_device_id of_match_clk_mt2701_mm[] = { - { .compatible = "mediatek,mt2701-mmsys", }, - {} -}; - static int clk_mt2701_mm_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct device_node *node = dev->parent->of_node; struct clk_onecell_data *clk_data; int r; - struct device_node *node = pdev->dev.of_node; clk_data = mtk_alloc_clk_data(CLK_MM_NR); @@ -108,7 +104,6 @@ static struct platform_driver clk_mt2701_mm_drv = { .probe = clk_mt2701_mm_probe, .driver = { .name = "clk-mt2701-mm", - .of_match_table = of_match_clk_mt2701_mm, }, }; diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index c7d3b7bcfa32..cacafe23c823 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -80,6 +80,10 @@ struct mtk_mmsys_driver_data { const char *clk_driver; }; +static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { + .clk_driver = "clk-mt2701-mm", +}; + static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { .clk_driver = "clk-mt2712-mm", }; @@ -323,6 +327,10 @@ static int mtk_mmsys_probe(struct platform_device *pdev) } static const struct of_device_id of_match_mtk_mmsys[] = { + { + .compatible = "mediatek,mt2701-mmsys", + .data = &mt2701_mmsys_driver_data, + }, { .compatible = "mediatek,mt2712-mmsys", .data = &mt2712_mmsys_driver_data, From patchwork Wed Apr 1 20:17:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 11469507 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0C3231392 for ; Wed, 1 Apr 2020 20:18:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E8F0E20857 for ; Wed, 1 Apr 2020 20:18:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733087AbgDAUSB (ORCPT ); Wed, 1 Apr 2020 16:18:01 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:33876 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733079AbgDAUSA (ORCPT ); Wed, 1 Apr 2020 16:18:00 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id DBFDE297614 From: Enric Balletbo i Serra To: mark.rutland@arm.com, ck.hu@mediatek.com, sboyd@kernel.org, ulrich.hecht+renesas@gmail.com Cc: linux-kernel@vger.kernel.org, matthias.bgg@gmail.com, drinkcat@chromium.org, hsinyi@chromium.org, Collabora Kernel ML , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, Matthias Brugger , matthias.bgg@kernel.org, Chun-Kuang Hu , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 4/4] arm64: dts: mt8173: Fix mmsys node name Date: Wed, 1 Apr 2020 22:17:36 +0200 Message-Id: <20200401201736.2980433-4-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200401201736.2980433-1-enric.balletbo@collabora.com> References: <20200401201736.2980433-1-enric.balletbo@collabora.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Node names are supposed to match the class of the device, mmsys is a system controller (syscon) not a clock controller, so change the node name accordingly. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Chun-Kuang Hu --- Changes in v2: None arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 8b4e806d5119..a55e8c177832 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -908,7 +908,7 @@ u2port1: usb-phy@11291000 { }; }; - mmsys: clock-controller@14000000 { + mmsys: syscon@14000000 { compatible = "mediatek,mt8173-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;