From patchwork Tue Apr 14 18:10:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 11488981 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 16769912 for ; Tue, 14 Apr 2020 18:14:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EAF1F20774 for ; Tue, 14 Apr 2020 18:14:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=sartura-hr.20150623.gappssmtp.com header.i=@sartura-hr.20150623.gappssmtp.com header.b="qFpi1PI9" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2503612AbgDNSOB (ORCPT ); Tue, 14 Apr 2020 14:14:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2503607AbgDNSN7 (ORCPT ); Tue, 14 Apr 2020 14:13:59 -0400 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 420B8C061A10 for ; Tue, 14 Apr 2020 11:13:58 -0700 (PDT) Received: by mail-wr1-x443.google.com with SMTP id d27so6386128wra.1 for ; Tue, 14 Apr 2020 11:13:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=FePb4TXsoKh/PIB9k7N8o/xhP/C75qZkUNccU++YPbg=; b=qFpi1PI9DkoXaOJihAA4XzdRNxDO4fhL10MkWqPNEgUoQgWFM8UiMaufAsYNRf9bCk YLViRHdF5gZM8R3iwJWOwxxiDQd5nm55ndZ+62eeADCJ3zivQkkTA81XfQYsfcNFtIcj 2ka14gJv83Mul2RRk8r1LUJUKSJ2EZ8fwNwl5HUnqU76Z0f8u7YHDwMMMXU6b1lGF161 SunyY5ZDSnJtjCGAi3XaOpu1ic2DVNeghiLJAtTeC5HggvLX/vR1J7uiOuyQUC7Gp9Jg HsHv+mLgVuOokgvEF2FJ2kyD+dPs7BKwr1kDjsywdA6rasMeYLNsDdHoGa+fg3v4h5XB BMfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=FePb4TXsoKh/PIB9k7N8o/xhP/C75qZkUNccU++YPbg=; b=ahK8B+q94t8F2gbCT1w929c6cjO061pzSImtcAqeDGjPF3XITD52DCQLuUjsJOhfeg H69amKw0/0Be5yUaGW9Kpl6FNWD6qadWZoqB3417EYUKa4wnOTPW1wMvKC1BS3VXhmjQ +R4iMwJ24EuxyhMRlW0Nrtgo7Ti2ug5bw16MxVzu64tqhdG6l64ltJYO8cq3zqZI4Mvh doLo/FZGInbAog+YCrYX5cmbpTWMGeeKnUQMQFY6MkmujIjKGlEr4ckpsnhJfACYkChm FxqgORP4lCqPkjGGVgoImJIOacT1a+nj3o3U3QxtA2noaLIfm+srOvKwteIW6fm4hP1X /Wog== X-Gm-Message-State: AGi0PuZMZI6FdcWyoM3hJmWju/XLWtpNM3tD6VcYz9Ol9ysHzjghMOt+ bvpQJHZRaawmR6Ik1tscqJdKPA== X-Google-Smtp-Source: APiQypKSol0GqR/vM24wZJGNbv0ZPm4oa4MmLj13h8k2ijdNDY8ftK+2s+mE+VB9LZtC/ixJ2Ujh3g== X-Received: by 2002:a5d:6452:: with SMTP id d18mr24604736wrw.405.1586888036650; Tue, 14 Apr 2020 11:13:56 -0700 (PDT) Received: from localhost.localdomain (dh207-97-22.xnet.hr. [88.207.97.22]) by smtp.googlemail.com with ESMTPSA id w12sm5387763wrk.56.2020.04.14.11.13.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2020 11:13:55 -0700 (PDT) From: Robert Marko To: andrew@lunn.ch, f.fainelli@gmail.com, hkallweit1@gmail.com, linux@armlinux.org.uk, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Marko , Christian Lamparter , Luka Perkov Subject: [PATCH v2 1/3] net: phy: mdio: add IPQ40xx MDIO driver Date: Tue, 14 Apr 2020 20:10:11 +0200 Message-Id: <20200414181012.114905-1-robert.marko@sartura.hr> X-Mailer: git-send-email 2.26.0 MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds the driver for the MDIO interface inside of Qualcomm IPQ40xx series SoC-s. Signed-off-by: Christian Lamparter Signed-off-by: Robert Marko Cc: Luka Perkov Reviewed-by: Florian Fainelli --- Changes from v1 to v2: * Remove magic default value * Remove lockdep_assert_held * Add C45 check * Simplify the driver * Drop device and mii_bus structs from private struct * Use devm_mdiobus_alloc_size() drivers/net/phy/Kconfig | 7 ++ drivers/net/phy/Makefile | 1 + drivers/net/phy/mdio-ipq40xx.c | 176 +++++++++++++++++++++++++++++++++ 3 files changed, 184 insertions(+) create mode 100644 drivers/net/phy/mdio-ipq40xx.c diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 3fa33d27eeba..815d52fa6080 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -157,6 +157,13 @@ config MDIO_I2C This is library mode. +config MDIO_IPQ40XX + tristate "Qualcomm IPQ40xx MDIO interface" + depends on HAS_IOMEM && OF + help + This driver supports the MDIO interface found in Qualcomm + IPQ40xx series Soc-s. + config MDIO_IPQ8064 tristate "Qualcomm IPQ8064 MDIO interface support" depends on HAS_IOMEM && OF_MDIO diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 2f5c7093a65b..36aafc6128c4 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o +obj-$(CONFIG_MDIO_IPQ40XX) += mdio-ipq40xx.o obj-$(CONFIG_MDIO_IPQ8064) += mdio-ipq8064.o obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o obj-$(CONFIG_MDIO_MSCC_MIIM) += mdio-mscc-miim.o diff --git a/drivers/net/phy/mdio-ipq40xx.c b/drivers/net/phy/mdio-ipq40xx.c new file mode 100644 index 000000000000..d8c11c621f20 --- /dev/null +++ b/drivers/net/phy/mdio-ipq40xx.c @@ -0,0 +1,176 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2020 Sartura Ltd. */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MDIO_CTRL_0_REG 0x40 +#define MDIO_CTRL_1_REG 0x44 +#define MDIO_CTRL_2_REG 0x48 +#define MDIO_CTRL_3_REG 0x4c +#define MDIO_CTRL_4_REG 0x50 +#define MDIO_CTRL_4_ACCESS_BUSY BIT(16) +#define MDIO_CTRL_4_ACCESS_START BIT(8) +#define MDIO_CTRL_4_ACCESS_CODE_READ 0 +#define MDIO_CTRL_4_ACCESS_CODE_WRITE 1 + +#define IPQ40XX_MDIO_RETRY 1000 +#define IPQ40XX_MDIO_DELAY 10 + +struct ipq40xx_mdio_data { + void __iomem *membase; +}; + +static int ipq40xx_mdio_wait_busy(struct mii_bus *bus) +{ + struct ipq40xx_mdio_data *priv = bus->priv; + int i; + + for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) { + unsigned int busy; + + busy = readl(priv->membase + MDIO_CTRL_4_REG) & + MDIO_CTRL_4_ACCESS_BUSY; + if (!busy) + return 0; + + /* BUSY might take to be cleard by 15~20 times of loop */ + udelay(IPQ40XX_MDIO_DELAY); + } + + dev_err(bus->parent, "MDIO operation timed out\n"); + + return -ETIMEDOUT; +} + +static int ipq40xx_mdio_read(struct mii_bus *bus, int mii_id, int regnum) +{ + struct ipq40xx_mdio_data *priv = bus->priv; + int value = 0; + unsigned int cmd = 0; + + /* Reject clause 45 */ + if (regnum & MII_ADDR_C45) + return -EOPNOTSUPP; + + if (ipq40xx_mdio_wait_busy(bus)) + return -ETIMEDOUT; + + /* issue the phy address and reg */ + writel((mii_id << 8) | regnum, priv->membase + MDIO_CTRL_1_REG); + + cmd = MDIO_CTRL_4_ACCESS_START | MDIO_CTRL_4_ACCESS_CODE_READ; + + /* issue read command */ + writel(cmd, priv->membase + MDIO_CTRL_4_REG); + + /* Wait read complete */ + if (ipq40xx_mdio_wait_busy(bus)) + return -ETIMEDOUT; + + /* Read data */ + value = readl(priv->membase + MDIO_CTRL_3_REG); + + return value; +} + +static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum, + u16 value) +{ + struct ipq40xx_mdio_data *priv = bus->priv; + unsigned int cmd = 0; + + /* Reject clause 45 */ + if (regnum & MII_ADDR_C45) + return -EOPNOTSUPP; + + if (ipq40xx_mdio_wait_busy(bus)) + return -ETIMEDOUT; + + /* issue the phy address and reg */ + writel((mii_id << 8) | regnum, priv->membase + MDIO_CTRL_1_REG); + + /* issue write data */ + writel(value, priv->membase + MDIO_CTRL_2_REG); + + cmd = MDIO_CTRL_4_ACCESS_START | MDIO_CTRL_4_ACCESS_CODE_WRITE; + /* issue write command */ + writel(cmd, priv->membase + MDIO_CTRL_4_REG); + + /* Wait write complete */ + if (ipq40xx_mdio_wait_busy(bus)) + return -ETIMEDOUT; + + return 0; +} + +static int ipq40xx_mdio_probe(struct platform_device *pdev) +{ + struct ipq40xx_mdio_data *priv; + struct mii_bus *bus; + int ret; + + bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv)); + if (!bus) + return -ENOMEM; + + priv = bus->priv; + + priv->membase = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->membase)) + return PTR_ERR(priv->membase); + + bus->name = "ipq40xx_mdio"; + bus->read = ipq40xx_mdio_read; + bus->write = ipq40xx_mdio_write; + bus->parent = &pdev->dev; + snprintf(bus->id, MII_BUS_ID_SIZE, "%s%d", pdev->name, pdev->id); + + ret = of_mdiobus_register(bus, pdev->dev.of_node); + if (ret) { + dev_err(&pdev->dev, "Cannot register MDIO bus!\n"); + return ret; + } + + platform_set_drvdata(pdev, bus); + + return 0; +} + +static int ipq40xx_mdio_remove(struct platform_device *pdev) +{ + struct mii_bus *bus = platform_get_drvdata(pdev); + + mdiobus_unregister(bus); + + return 0; +} + +static const struct of_device_id ipq40xx_mdio_dt_ids[] = { + { .compatible = "qcom,ipq40xx-mdio" }, + { } +}; +MODULE_DEVICE_TABLE(of, ipq40xx_mdio_dt_ids); + +static struct platform_driver ipq40xx_mdio_driver = { + .probe = ipq40xx_mdio_probe, + .remove = ipq40xx_mdio_remove, + .driver = { + .name = "ipq40xx-mdio", + .of_match_table = ipq40xx_mdio_dt_ids, + }, +}; + +module_platform_driver(ipq40xx_mdio_driver); + +MODULE_DESCRIPTION("IPQ40XX MDIO interface driver"); +MODULE_AUTHOR("Qualcomm Atheros"); +MODULE_LICENSE("Dual BSD/GPL"); From patchwork Tue Apr 14 18:10:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 11488979 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C627714DD for ; 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[88.207.97.22]) by smtp.googlemail.com with ESMTPSA id w12sm5387763wrk.56.2020.04.14.11.14.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2020 11:14:05 -0700 (PDT) From: Robert Marko To: andrew@lunn.ch, f.fainelli@gmail.com, hkallweit1@gmail.com, linux@armlinux.org.uk, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Marko , Luka Perkov Subject: [PATCH v2 2/3] dt-bindings: add Qualcomm IPQ4019 MDIO bindings Date: Tue, 14 Apr 2020 20:10:13 +0200 Message-Id: <20200414181012.114905-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200414181012.114905-1-robert.marko@sartura.hr> References: <20200414181012.114905-1-robert.marko@sartura.hr> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds the binding document for the IPQ40xx MDIO driver. Signed-off-by: Robert Marko Cc: Luka Perkov Reviewed-by: Florian Fainelli --- .../bindings/net/qcom,ipq40xx-mdio.yaml | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/qcom,ipq40xx-mdio.yaml diff --git a/Documentation/devicetree/bindings/net/qcom,ipq40xx-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq40xx-mdio.yaml new file mode 100644 index 000000000000..3e2ccf417fb6 --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ipq40xx-mdio.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ipq40xx-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ40xx MDIO Controller Device Tree Bindings + +maintainers: + - Robert Marko + +allOf: + - $ref: "mdio.yaml#" + +properties: + compatible: + const: qcom,ipq40xx-mdio + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +examples: + - | + mdio@90000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,ipq40xx-mdio"; + reg = <0x90000 0x64>; + status = "disabled"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; + + ethphy2: ethernet-phy@2 { + reg = <2>; + }; + + ethphy3: ethernet-phy@3 { + reg = <3>; + }; + + ethphy4: ethernet-phy@4 { + reg = <4>; + }; + }; From patchwork Tue Apr 14 18:10:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 11488983 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C5616112C for ; Tue, 14 Apr 2020 18:14:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A978D20774 for ; Tue, 14 Apr 2020 18:14:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=sartura-hr.20150623.gappssmtp.com header.i=@sartura-hr.20150623.gappssmtp.com header.b="i3/RJsjO" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2503659AbgDNSOd (ORCPT ); Tue, 14 Apr 2020 14:14:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2503654AbgDNSOb (ORCPT ); Tue, 14 Apr 2020 14:14:31 -0400 Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9E2EC061A0E for ; Tue, 14 Apr 2020 11:14:30 -0700 (PDT) Received: by mail-wr1-x442.google.com with SMTP id t14so2367596wrw.12 for ; Tue, 14 Apr 2020 11:14:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JkyvlKP4pHrJ8AdiuVHbCpIXULnDIYo0wPYklEdrEI0=; b=i3/RJsjOiDyODApqcCHy5k6pUbD94Xgeu24o+JvyJIO0/hUev+OnyeoBeZUgiakGf8 cp1FGWJ2T3J5BY1mSv0W+CQD8k6aIy13OhLWPyvd5Oir5QAl47ngBE9vCogp28eH8FFu Kr03rbEX2PcMMC7gxtPsrcLvZY3Qj+IlDw70oBumA/eMaZBjBNF/ISO0zfnTl787SSs+ fC05nyPsgEObHjd9uYNHw6MRJtN69fmlMOikk5tkQhbTgqalmG1MvrKL1xcQ6n51LLHr +lQaCzUSSvF/GP/5639o77troTwlp4ZsiEl0z1wfoTkQJWNNzdgPzH8Y9QeMeL3jU7qe jFRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JkyvlKP4pHrJ8AdiuVHbCpIXULnDIYo0wPYklEdrEI0=; b=InjS5S8tGqOAmcdhfTom17tmPxsTIro+nHP6dDWmLFnYpIfdPaC5wxnNk3jm9N16TF FAoygqhOTZQjOKnPZfxAXnW0HXVjBwpzKrreWqesv8unHJlJ8P97p356uyKdFPHov9Gc tAM+8PyFivUgr4v7nolAP41oxhxcPMO4ua0zHyklUSuXiiof67QNR1dSMRRMh+vOiIEt UnBnnCWPtTSM20SvzuZ1H7xE573gP9wFt6sSPdcnkvFIotKVpnFC7Vin/zYuyNi44zWM 49G88+MDezr0FXibcjfROmQ5vc4znwrmNID6jsjLCJ82X48XpjyoA7B/WpysJCozyjQb 1qJw== X-Gm-Message-State: AGi0Pua9aJiSKcrSGRldWLrrrN3Sv9PDaQJwNkZqt9QnXlS73pqhKoJm u5YiKovtQhVKX5FShPBrM9Fd5A== X-Google-Smtp-Source: APiQypKuhwoq30JHZAbW4ywOg0qHXXSg5sZ8KHXcL7JXIhJgwQOYdAIWuzx+IL/PNq9ZS+9GksFmwg== X-Received: by 2002:a5d:4306:: with SMTP id h6mr24048996wrq.234.1586888069502; Tue, 14 Apr 2020 11:14:29 -0700 (PDT) Received: from localhost.localdomain (dh207-97-22.xnet.hr. [88.207.97.22]) by smtp.googlemail.com with ESMTPSA id w12sm5387763wrk.56.2020.04.14.11.14.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2020 11:14:29 -0700 (PDT) From: Robert Marko To: andrew@lunn.ch, f.fainelli@gmail.com, hkallweit1@gmail.com, linux@armlinux.org.uk, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Marko , Christian Lamparter , Luka Perkov Subject: [PATCH v2 3/3] dts: ipq4019: add MDIO node Date: Tue, 14 Apr 2020 20:10:16 +0200 Message-Id: <20200414181012.114905-3-robert.marko@sartura.hr> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200414181012.114905-1-robert.marko@sartura.hr> References: <20200414181012.114905-1-robert.marko@sartura.hr> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds the necessary MDIO interface node to the Qualcomm IPQ4019 DTSI. Built-in QCA8337N switch is managed using it, and since we have a driver for it lets add it. Signed-off-by: Christian Lamparter Signed-off-by: Robert Marko Cc: Luka Perkov --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index b4803a428340..80d0a69e9fed 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -578,6 +578,34 @@ wifi1: wifi@a800000 { status = "disabled"; }; + mdio: mdio@90000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,ipq40xx-mdio"; + reg = <0x90000 0x64>; + status = "disabled"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; + + ethphy2: ethernet-phy@2 { + reg = <2>; + }; + + ethphy3: ethernet-phy@3 { + reg = <3>; + }; + + ethphy4: ethernet-phy@4 { + reg = <4>; + }; + }; + usb3_ss_phy: ssphy@9a000 { compatible = "qcom,usb-ss-ipq4019-phy"; #phy-cells = <0>;