From patchwork Fri Apr 17 07:00:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11494217 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6C0CD6CA for ; Fri, 17 Apr 2020 07:01:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 55B2022201 for ; Fri, 17 Apr 2020 07:01:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="civ0gk1k" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728234AbgDQHBN (ORCPT ); Fri, 17 Apr 2020 03:01:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728083AbgDQHBL (ORCPT ); Fri, 17 Apr 2020 03:01:11 -0400 Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F723C061A41 for ; Fri, 17 Apr 2020 00:01:11 -0700 (PDT) Received: by mail-pg1-x542.google.com with SMTP id t11so679310pgg.2 for ; Fri, 17 Apr 2020 00:01:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yknmXxbqGxVfxrNz0jvbTW2mgVTxtXbV4FI/gCIqcjM=; b=civ0gk1keolqnPGVaUGkyNSJDvVGU8ajyEYU3VaMBeM0lgdwWv5cMHq80pGerPytVm XBJXBtZa38KYD3dTapc4WNr9WFNQbJBFIu7KWxHcnyby2tihC4fsexPQQCQClq40NVyV aVve2BQivQFk9fn4IjdsAfwQLVfheYEWGhHWn9wpcpRkv8qBSsux16mO8yrr41qZJ8ZI vQbG4WQTcBVJ/ais/d6KHidfArAzBMss1PQEPe8ebx3Cg1V+QwasTyRFb2vm4SdaQSSL BO/MjafY2c6wQkij+Bv8W+OCVT+iSYl8CJdx3YADy4+60SCTiGfHILXYq+H175/xlLQj 3/Sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yknmXxbqGxVfxrNz0jvbTW2mgVTxtXbV4FI/gCIqcjM=; b=nt/Oo2ve0TQApiYN64K11SwdRKZj9akzSs9z1kcndtjdrNWkLrRJKLwg1RtKC1ZF8m NQfeX7Ws8BikRrn5CTzAfRK4v9a6dtX0hV/SnRe5xZQd+wZzpylTm/esDVfpv0CLjka4 342g5vXZjm2AZjJdoIRi3vT9Z/BMRL+Oj9dtaJfEXBg9auJXIKN/gtG9nFAL+Wj1OE9K jbEnINo/QNhXTaPCMyI+VN1Bh4wcvJkCk4fkFfmVsilvcm6tPT6COq8aOjZbLDjuIRnq fwCpIZx7b6BXwRFtkhFPCqWWSOPQciChTtHGnsoHPGUEuIOQQp4seD4idni8iG7XPsBs zV1A== X-Gm-Message-State: AGi0PuZhhox7/7zntUj3FuJ2/JyIAX8aJm+DVBaiQOiJiMT3jC+mic42 /6txDLU62/fKdUHybn2JX1uIrw== X-Google-Smtp-Source: APiQypLVvbrjumlCLlmTCPuXNewSaDSHjE0x0aDETbToJCw1qIkwOjllFHprFIl39+UtGyokRT4g1Q== X-Received: by 2002:a05:6a00:2cf:: with SMTP id b15mr1777440pft.174.1587106870611; Fri, 17 Apr 2020 00:01:10 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id c125sm18561609pfa.142.2020.04.17.00.01.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2020 00:01:09 -0700 (PDT) From: Bjorn Andersson To: Michael Turquette , Stephen Boyd , Rob Herring Cc: Andy Gross , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/4] clk: qcom: gdsc: Handle GDSC regulator supplies Date: Fri, 17 Apr 2020 00:00:41 -0700 Message-Id: <20200417070044.1376212-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200417070044.1376212-1-bjorn.andersson@linaro.org> References: <20200417070044.1376212-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Certain GDSCs, such as the GPU_GX on MSM8996, requires that the upstream regulator supply is powered in order to be turned on. It's not guaranteed that the bootloader will leave these supplies on and the driver core will attempt to enable any GDSCs before allowing the individual drivers to probe defer on the PMIC regulator driver not yet being present. So the gdsc driver needs to be made aware of supplying regulators and probe defer on their absence, and it needs to enable and disable the regulator accordingly. Voltage adjustments of the supplying regulator are deferred to the client drivers themselves. Signed-off-by: Bjorn Andersson --- Changes since v1: - Sorted includes - Dropped unnecessary comment drivers/clk/qcom/gdsc.c | 23 +++++++++++++++++++++++ drivers/clk/qcom/gdsc.h | 4 ++++ 2 files changed, 27 insertions(+) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index a250f59708d8..04944f11659b 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include "gdsc.h" @@ -112,6 +113,12 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) int ret; u32 val = (status == GDSC_ON) ? 0 : SW_COLLAPSE_MASK; + if (status == GDSC_ON && sc->rsupply) { + ret = regulator_enable(sc->rsupply); + if (ret < 0) + return ret; + } + ret = regmap_update_bits(sc->regmap, sc->gdscr, SW_COLLAPSE_MASK, val); if (ret) return ret; @@ -143,6 +150,13 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) ret = gdsc_poll_status(sc, status); WARN(ret, "%s status stuck at 'o%s'", sc->pd.name, status ? "ff" : "n"); + + if (!ret && status == GDSC_OFF && sc->rsupply) { + ret = regulator_disable(sc->rsupply); + if (ret < 0) + return ret; + } + return ret; } @@ -371,6 +385,15 @@ int gdsc_register(struct gdsc_desc *desc, if (!data->domains) return -ENOMEM; + for (i = 0; i < num; i++) { + if (!scs[i] || !scs[i]->supply) + continue; + + scs[i]->rsupply = devm_regulator_get(dev, scs[i]->supply); + if (IS_ERR(scs[i]->rsupply)) + return PTR_ERR(scs[i]->rsupply); + } + data->num_domains = num; for (i = 0; i < num; i++) { if (!scs[i]) diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 64cdc8cf0d4d..c36fc26dcdff 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -10,6 +10,7 @@ #include struct regmap; +struct regulator; struct reset_controller_dev; /** @@ -52,6 +53,9 @@ struct gdsc { struct reset_controller_dev *rcdev; unsigned int *resets; unsigned int reset_count; + + const char *supply; + struct regulator *rsupply; }; struct gdsc_desc { From patchwork Fri Apr 17 07:00:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11494221 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EC34992C for ; Fri, 17 Apr 2020 07:01:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D38FC221EC for ; Fri, 17 Apr 2020 07:01:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="N4bjOMVj" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728197AbgDQHBO (ORCPT ); Fri, 17 Apr 2020 03:01:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728223AbgDQHBM (ORCPT ); Fri, 17 Apr 2020 03:01:12 -0400 Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78991C0610D6 for ; Fri, 17 Apr 2020 00:01:12 -0700 (PDT) Received: by mail-pf1-x441.google.com with SMTP id u9so628474pfm.10 for ; Fri, 17 Apr 2020 00:01:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ffzp9Kx/9Feguerds3JewgyWlb5mJPvucz6Zy5UrO6o=; b=N4bjOMVjFE/KTqsJdI5p3UEjAQyPEEG3xNNkG7mjkY+SgnYGVah4pKGM5vT0VDIwJW t1O/6ZzeIOKlb8zO6NYN4egOsRzoR9IPAwBQRa3+Uz3cUG6tK+FRLaATtPAXqiSWFH5r vfTNkDd+vAbkBkgk7ywi19rXrO533ygRQENPZgaEOhxfQWC1yxNHPVHvwZP2UcyNWh+P y7VywLugAVhSTTvEVo7foEyI5z2IA2euN/pNz7SPJuPB3Ioyq28xbQN7I3If+mZ4ny68 vX2AWm9oU0RGdVUDq3D9ivUaYspy/QdnYInQ/piPO3GwjHYYGVgcC/bOQFQPzH94nHEs RoLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ffzp9Kx/9Feguerds3JewgyWlb5mJPvucz6Zy5UrO6o=; b=jEcYqF7sWNbkEyTkDI2/5K6eJINHOthjhMoO85vMveRhnd9vHbeDjWcPj+2UXD5w+k EuKEKqqgwLGGYSMNGEWUadbCs+AvUg3viuyQy/km2cCH7HwnUikqPBirc2lAV0NAWGBL a5pZ+GZUhVXjcWJpQGM9aYzWVInE4RcHfHuFjJ2W4lsiW1hRi0eQKseiSKsU84LIqWdS bz7kj2A3td6sSEJiy7KvDHu1wMaxQmhufp2alAc/plT2sTArghmVAQR1sWvcl4wsdYuc P5Bfq9GwisIr/JaGduJK4S5Swr00G5L8B4JaHR05n1L/t3bVupyqB3Ipj8g37UAtpcGH Pe7w== X-Gm-Message-State: AGi0PuZ+CaIKEhQRF1ERV4dIIfZ2qy00nUD7exdzRSpbsRp0jS3kMy2D DN0Q8GoYDpeTKiwczpIdq28gBQ== X-Google-Smtp-Source: APiQypK+WugUyCOVGXvV9lrDjeTm6cJ1Ol1CBO5gmJifWOcICb4insgy672g8q2pfzAGGWrwFoOSgw== X-Received: by 2002:aa7:94a8:: with SMTP id a8mr1730586pfl.44.1587106871993; Fri, 17 Apr 2020 00:01:11 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id c125sm18561609pfa.142.2020.04.17.00.01.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2020 00:01:11 -0700 (PDT) From: Bjorn Andersson To: Michael Turquette , Stephen Boyd , Rob Herring Cc: Andy Gross , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/4] clk: qcom: mmcc-msm8996: Properly describe GPU_GX gdsc Date: Fri, 17 Apr 2020 00:00:42 -0700 Message-Id: <20200417070044.1376212-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200417070044.1376212-1-bjorn.andersson@linaro.org> References: <20200417070044.1376212-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The GPU_GX GDSC depends on both GPU GDSC being enabled and that the VDD_GX rail is powered, so update the description of the node to cover these requirements. Signed-off-by: Bjorn Andersson Acked-by: Rob Herring --- Changes since v1: - vdd_gfx -> vdd-gfx Documentation/devicetree/bindings/clock/qcom,mmcc.yaml | 4 ++++ drivers/clk/qcom/mmcc-msm8996.c | 2 ++ 2 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml index acc31b3991bd..1b16a863b355 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -67,6 +67,10 @@ properties: description: Protected clock specifier list as per common clock binding + vdd-gfx-supply: + description: + Regulator supply for the GPU_GX GDSC + required: - compatible - reg diff --git a/drivers/clk/qcom/mmcc-msm8996.c b/drivers/clk/qcom/mmcc-msm8996.c index 6c7592ddf8bb..3b3aac07fb2d 100644 --- a/drivers/clk/qcom/mmcc-msm8996.c +++ b/drivers/clk/qcom/mmcc-msm8996.c @@ -3064,7 +3064,9 @@ static struct gdsc gpu_gx_gdsc = { .name = "gpu_gx", }, .pwrsts = PWRSTS_OFF_ON, + .parent = &gpu_gdsc.pd, .flags = CLAMP_IO, + .supply = "vdd-gfx", }; static struct clk_regmap *mmcc_msm8996_clocks[] = { From patchwork Fri Apr 17 07:00:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11494227 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9920F6CA for ; Fri, 17 Apr 2020 07:01:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8093D22201 for ; Fri, 17 Apr 2020 07:01:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="i+z1H6qc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728238AbgDQHBf (ORCPT ); Fri, 17 Apr 2020 03:01:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728198AbgDQHBN (ORCPT ); Fri, 17 Apr 2020 03:01:13 -0400 Received: from mail-pl1-x641.google.com (mail-pl1-x641.google.com [IPv6:2607:f8b0:4864:20::641]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7002C061A0C for ; Fri, 17 Apr 2020 00:01:13 -0700 (PDT) Received: by mail-pl1-x641.google.com with SMTP id y22so640586pll.4 for ; Fri, 17 Apr 2020 00:01:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=e5yt6ZDVqr+7QSHc88Bnrv499SbQQkOFM9/QQvODlrQ=; b=i+z1H6qc1RQjl8dF/ZQWkrj1LOmONZiANWqZQj2D1MApZKXOwpspT+eAloxxqIWDgb 2lxvRDCuJUmPo5f5TTlJ8mQBdorfC+3Sb+nANtWH/ShuFGYtSopy6PHdifjCPMZVjFw0 AlpaM40+KsDeja6zYbzc2ZmmTZHvG3PuGI2VjJzpwekWr1/xHwTCLj2eRw2dd++Kcv8e Xzje+GzPKMh1Dk+AEFwcOENQ6LqmvYTKIHbkteGRf9J1pkfjaBWgL+y1r0LghOq1kuNM xnXo6BRHouV9DGEgGcOsahVlGL65Hf3d4c/zFgk9eZUDuLcAnx4GX+ynjLehVLKhyejD ijew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e5yt6ZDVqr+7QSHc88Bnrv499SbQQkOFM9/QQvODlrQ=; b=m92PITb9UQXTPZ9kwJJK4+ujWiS5clzOGLwxa16l978u21V5+k8dJVroKrdD4KEiBo /fW8RrHbf8ITCCaR8owBS6yxs/+FOaRyCiNAAjnSCUq9VSsK0eoIp3H24IZWGrKYdwZe EDDbttGeHoLOJt+C1OZ0IUo2csi3vF/3nIy78wXn/Bo2tElUry7RXENpBujkkCspPXVb 2L4hANmNnSdvxU91ZVDS+9Q2hgSzz1w4BDuhqg2+PO3ZRlFA/m/0UT6b47lJHWUfGdHk Mlg1y/ObtMsywks9icQ0ZcSYviOvd+L9HQHBkKjqTyWF6Ggsyg44apXeDwKbtS0713vw GABA== X-Gm-Message-State: AGi0PuZD7PjjJSxoXdU/pwNnx/jPTCm8B7+eBQGxfr4KpP10fH6mU0ce otL95VN8CC9OhgAncYY1vG9APw== X-Google-Smtp-Source: APiQypKAPouxJUj8ZEHXCCyGsr9aFHrJPhULvsgTpcyEK+wS31hk0TH+VbwkpYL+s3wPwKVaYlchtA== X-Received: by 2002:a17:90a:68cb:: with SMTP id q11mr2759270pjj.15.1587106873385; Fri, 17 Apr 2020 00:01:13 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id c125sm18561609pfa.142.2020.04.17.00.01.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2020 00:01:12 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson Cc: Michael Turquette , Stephen Boyd , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/4] arm64: dts: qcom: db820c: Add vdd_gfx and tie it into mmcc Date: Fri, 17 Apr 2020 00:00:43 -0700 Message-Id: <20200417070044.1376212-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200417070044.1376212-1-bjorn.andersson@linaro.org> References: <20200417070044.1376212-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rajendra Nayak Add the SPMI regulator node in the PMI8994, use it to give us VDD_GX at a fixed max nominal voltage for the db820c and specify this as supply for the MMSS GPU_GX GDSC. With the introduction of CPR support the range for VDD_GX should be expanded. Signed-off-by: Rajendra Nayak [bjorn: Split between pmi8994 and db820c, changed voltage, rewrote commit message] Signed-off-by: Bjorn Andersson --- Changes since v1: - Polished commit message - vdd_gfx -> vdd-gfx arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/qcom/pmi8994.dtsi | 6 ++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi index 4692b7ad16b7..fc23b381c5e4 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi @@ -251,6 +251,10 @@ &mdss { status = "okay"; }; +&mmcc { + vdd-gfx-supply = <&vdd_gfx>; +}; + &msmgpio { gpio-line-names = "[SPI0_DOUT]", /* GPIO_0, BLSP1_SPI_MOSI, LSEC pin 14 */ @@ -688,6 +692,16 @@ pinconf { }; }; + +&pmi8994_spmi_regulators { + vdd_gfx: s2@1700 { + reg = <0x1700 0x100>; + regulator-name = "VDD_GFX"; + regulator-min-microvolt = <980000>; + regulator-max-microvolt = <980000>; + }; +}; + &rpm_requests { pm8994-regulators { compatible = "qcom,rpm-pm8994-regulators"; diff --git a/arch/arm64/boot/dts/qcom/pmi8994.dtsi b/arch/arm64/boot/dts/qcom/pmi8994.dtsi index 21e05215abe4..e5ed28ab9b2d 100644 --- a/arch/arm64/boot/dts/qcom/pmi8994.dtsi +++ b/arch/arm64/boot/dts/qcom/pmi8994.dtsi @@ -26,5 +26,11 @@ pmic@3 { reg = <0x3 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + pmi8994_spmi_regulators: regulators { + compatible = "qcom,pmi8994-regulators"; + #address-cells = <1>; + #size-cells = <1>; + }; }; }; From patchwork Fri Apr 17 07:00:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11494229 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B67CE13B2 for ; Fri, 17 Apr 2020 07:01:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9EA2122209 for ; Fri, 17 Apr 2020 07:01:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="N2oHjmSU" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728550AbgDQHBf (ORCPT ); Fri, 17 Apr 2020 03:01:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728292AbgDQHBP (ORCPT ); Fri, 17 Apr 2020 03:01:15 -0400 Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46E71C061A0C for ; Fri, 17 Apr 2020 00:01:15 -0700 (PDT) Received: by mail-pf1-x443.google.com with SMTP id u65so644748pfb.4 for ; Fri, 17 Apr 2020 00:01:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EaN0Seks3JgknsK9BVWkgtTm/fzHe3RWKNOjTd9p+qc=; b=N2oHjmSUk1H3eZy02ScumUxitUXE/7djA+CdKOZRbv02gbQB/4+1vOymlchCMXQgRf sWhee0lK0XhaWru25QV0dQi88JkGU6QKvheoj5dnaoZEBXYJw/oNmQbw6n9/c+N8N9ln VpWWQur1cUWtzOJNcWt7ldKd0CQjyWuqjod+/Re+S8czpvszlqcneqlWA2loOvY5AHiE W+27jroj6PpmZCsdhMk0VwbaxZfe1h28snyy98zQPo51o5dD0OU59v1Rn57uen8M8RE/ fSr/TVwuviDyoTJl8NaFpXSliWhM8LZhf5RwSBwtzGKoDpUg/B0pIAqoEvsvDIjNFYuc 1EpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EaN0Seks3JgknsK9BVWkgtTm/fzHe3RWKNOjTd9p+qc=; b=pUq8TjMPoEed9EnJPCPnssalJ/v6NG6cDUpM8mFuaFG6UenI6fRO/CgSB/pVfE+IrK Z8gKejxi1BJL3QrBtDfKasLGrhuuVnY88ZD71v6naS1K/LUQGw66dGerEPU3BlAyGCnW 71aVOWCq+PP2s1QfySNsT+iKyYB3BnqGXZMxS5CxFdMVurbCI6aI/h2ihABSEnyhdkGw VYuEgkcuEuyv6HgjCH1Kj0w7EjJFSs26zmh5OTvea5MxC36bIVLxj4W+76D3b2OtJcdm UMAgB9+3bnj2xxtveNo3ubg64YomoK0sE9dsmPvjBfU8F/OC32n/EevgRAh9X5NPlnwv oR3Q== X-Gm-Message-State: AGi0Pua3777VRrahGsDOZ+gC/LnqGuFspmq00N/nfZsqNQ5xauNCz4FN VeQJXIbuCB5k/Lsq2zlxWuRLww== X-Google-Smtp-Source: APiQypI4H58E4Hn7junl0qfO7JnmLs7Wc3DZgo9GXuO7Bx45z0RdlE5e+2Hj0zhyut03Ql8vjew09g== X-Received: by 2002:aa7:943c:: with SMTP id y28mr1780257pfo.171.1587106874750; Fri, 17 Apr 2020 00:01:14 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id c125sm18561609pfa.142.2020.04.17.00.01.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2020 00:01:14 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson Cc: Michael Turquette , Stephen Boyd , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/4] arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC Date: Fri, 17 Apr 2020 00:00:44 -0700 Message-Id: <20200417070044.1376212-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200417070044.1376212-1-bjorn.andersson@linaro.org> References: <20200417070044.1376212-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Presumably the GPU node needs to control both the GPU and GPU GX power domains, but given that GPU GX now depends on the GPU GDSC both can effectively be controlled by controlling GPU GX. So use this instead. Signed-off-by: Bjorn Andersson --- Changes since v1: - None arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 895202d07a8b..af1f4977b97d 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -639,7 +639,7 @@ gpu@b00000 { "mem", "mem_iface"; - power-domains = <&mmcc GPU_GDSC>; + power-domains = <&mmcc GPU_GX_GDSC>; iommus = <&adreno_smmu 0>; nvmem-cells = <&gpu_speed_bin>;