From patchwork Wed Apr 22 11:07:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Modem, Bhanuprakash" X-Patchwork-Id: 11503537 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 15BD9112C for ; Wed, 22 Apr 2020 11:18:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F1EDD20781 for ; Wed, 22 Apr 2020 11:18:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F1EDD20781 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D1CF86E3DA; Wed, 22 Apr 2020 11:18:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 718A56E3D8; Wed, 22 Apr 2020 11:18:49 +0000 (UTC) IronPort-SDR: kZt/ijs8qFkAf0vubZuI8SUetKZZpVyX4x3mQhPhVCa0klQsl37MSbtk6kRVpclp9xP3Vk7T+d +/gUKAjCYCWQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2020 04:18:49 -0700 IronPort-SDR: /jqUTqnqK3c4puUTlk0AnVdbaHjSvxjcPaFWe+mgJoEnIZ05MZOwvIC8grbuGTz+VlyXIAcL80 XVAGnRSji6pQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,414,1580803200"; d="scan'208";a="456469528" Received: from bhanu-ubuntu.iind.intel.com ([10.145.162.51]) by fmsmga005.fm.intel.com with ESMTP; 22 Apr 2020 04:18:46 -0700 From: bhanuprakash.modem@intel.com To: bhanuprakash.modem@intel.com, manasi.d.navare@intel.com, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v5, 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD Date: Wed, 22 Apr 2020 16:37:31 +0530 Message-Id: <20200422110733.28635-1-bhanuprakash.modem@intel.com> X-Mailer: git-send-email 2.24.1.1.gb6d4d82bd5 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Manasi Navare From: Manasi Navare DP sink device sets the Ignore MSA bit in its DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to ignore the MSA video timing parameters and its ability to support seamless video timing change over a range of timing exposed by DisplayID and EDID. This is required for the sink to indicate that it is Adaptive sync capable. v3: * Fi the typo in commit message (Manasi) v2: * Rename to describe what the function does (Jani Nikula) Cc: Jani Nikula Cc: Ville Syrjälä Cc: Harry Wentland Cc: Nicholas Kazlauskas Signed-off-by: Manasi Navare Reviewed-by: Harry Wentland --- include/drm/drm_dp_helper.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 3beb2aac8c4c..87264b561632 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1454,6 +1454,14 @@ drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) DP_ALTERNATE_SCRAMBLER_RESET_CAP; } +/* Ignore MSA timing for Adaptive Sync support on DP 1.4 */ +static inline bool +drm_dp_sink_can_do_video_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) +{ + return dpcd[DP_DOWN_STREAM_PORT_COUNT] & + DP_MSA_TIMING_PAR_IGNORED; +} + /* * DisplayPort AUX channel */ From patchwork Wed Apr 22 11:07:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Modem, Bhanuprakash" X-Patchwork-Id: 11503539 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F07D7112C for ; Wed, 22 Apr 2020 11:18:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D8D0220781 for ; Wed, 22 Apr 2020 11:18:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D8D0220781 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B47EA6E3DF; Wed, 22 Apr 2020 11:18:53 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 206A76E3DB; Wed, 22 Apr 2020 11:18:52 +0000 (UTC) IronPort-SDR: 8Ee7N7aO3zfWKrkdg3ZmWnR0jdh4xo9vB0IVmaUjBLoax+xViFLT5a0hVSi6rkfMnTlUMj1qQz 0Kpl/CfMQh+A== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2020 04:18:51 -0700 IronPort-SDR: we78ws3EdIFe8QLhPeL+8vLIgZBVZKEYVl0x2FXRugB6xp+4dSgzNmxB+2fz3BkZkiJbWLn5+4 hSpmz5NvjUnQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,414,1580803200"; d="scan'208";a="456469539" Received: from bhanu-ubuntu.iind.intel.com ([10.145.162.51]) by fmsmga005.fm.intel.com with ESMTP; 22 Apr 2020 04:18:49 -0700 From: bhanuprakash.modem@intel.com To: bhanuprakash.modem@intel.com, manasi.d.navare@intel.com, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v5, 2/3] drm/i915/dp: Attach and set drm connector VRR property Date: Wed, 22 Apr 2020 16:37:32 +0530 Message-Id: <20200422110733.28635-2-bhanuprakash.modem@intel.com> X-Mailer: git-send-email 2.24.1.1.gb6d4d82bd5 In-Reply-To: <20200422110733.28635-1-bhanuprakash.modem@intel.com> References: <20200422110733.28635-1-bhanuprakash.modem@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Aditya Swarup From: Aditya Swarup This function sets the VRR property for connector based on the platform support, EDID monitor range and DP sink DPCD capability of outputing video without msa timing information. v4: * Rebase (Mansi) v3: * intel_dp_is_vrr_capable can be used for debugfs, make it non static (Manasi) v2: * Just set this in intel_dp_get_modes instead of new hook (Jani) Cc: Ville Syrjälä Cc: Jani Nikula Signed-off-by: Aditya Swarup Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_dp.c | 24 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 2 ++ 2 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 66f8a9d1503d..eda112a27e71 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -6476,6 +6476,23 @@ intel_dp_force(struct drm_connector *connector) intel_display_power_put(dev_priv, aux_domain, wakeref); } +bool intel_dp_is_vrr_capable(struct drm_connector *connector) +{ + struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector)); + const struct drm_display_info *info = &connector->display_info; + struct drm_i915_private *dev_priv = to_i915(connector->dev); + + /* + * DP Sink is capable of Variable refresh video timings if + * Ignore MSA bit is set in DPCD. + * EDID monitor range also should be atleast 10 for reasonable + * Adaptive sync/ VRR end user experience. + */ + return INTEL_GEN(dev_priv) >= 12 && + drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd) && + info->monitor_range.max_vfreq - info->monitor_range.min_vfreq > 10; +} + static int intel_dp_get_modes(struct drm_connector *connector) { struct intel_connector *intel_connector = to_intel_connector(connector); @@ -6486,6 +6503,10 @@ static int intel_dp_get_modes(struct drm_connector *connector) int ret = intel_connector_update_modes(connector, edid); if (ret) return ret; + + if (intel_dp_is_vrr_capable(connector)) + drm_connector_set_vrr_capable_property(connector, + true); } /* if eDP has no EDID, fall back to fixed mode */ @@ -7570,6 +7591,9 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect connector->state->scaling_mode = DRM_MODE_SCALE_ASPECT; } + + if (INTEL_GEN(dev_priv) >= 12) + drm_connector_attach_vrr_capable_property(connector); } static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp) diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 6659ce15a693..aa7c1f530d5e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -14,6 +14,7 @@ enum pipe; enum port; struct drm_connector_state; struct drm_encoder; +struct drm_connector; struct drm_i915_private; struct drm_modeset_acquire_ctx; struct intel_connector; @@ -119,6 +120,7 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, const struct drm_connector_state *conn_state); bool intel_digital_port_connected(struct intel_encoder *encoder); void intel_dp_process_phy_request(struct intel_dp *intel_dp); +bool intel_dp_is_vrr_capable(struct drm_connector *connector); static inline unsigned int intel_dp_unused_lane_mask(int lane_count) { From patchwork Wed Apr 22 11:07:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Modem, Bhanuprakash" X-Patchwork-Id: 11503545 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D2DA11575 for ; Wed, 22 Apr 2020 11:18:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BABA720781 for ; Wed, 22 Apr 2020 11:18:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BABA720781 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 32CF36E3E5; Wed, 22 Apr 2020 11:18:56 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id B62996E3DB; Wed, 22 Apr 2020 11:18:54 +0000 (UTC) IronPort-SDR: TPdeecYIDZjqjR1t9ScDdG49lqkF8/+CMvz/ArB8npZnursogeveg2sIJuJ4hoFGY7TNLyb+4i 8FMRnJvGNt/g== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2020 04:18:54 -0700 IronPort-SDR: OlBjqs6OvSDUD9qXXQ1jo/Z3NuOztwLEYe3i0RT7oAO6tV3cTkfjTscn2K02Na1/tkRmizGoqc k0EXts4v3ylg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,414,1580803200"; d="scan'208";a="456469561" Received: from bhanu-ubuntu.iind.intel.com ([10.145.162.51]) by fmsmga005.fm.intel.com with ESMTP; 22 Apr 2020 04:18:52 -0700 From: bhanuprakash.modem@intel.com To: bhanuprakash.modem@intel.com, manasi.d.navare@intel.com, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v5, 3/3] drm/i915/dp: Expose connector VRR info via debugfs Date: Wed, 22 Apr 2020 16:37:33 +0530 Message-Id: <20200422110733.28635-3-bhanuprakash.modem@intel.com> X-Mailer: git-send-email 2.24.1.1.gb6d4d82bd5 In-Reply-To: <20200422110733.28635-1-bhanuprakash.modem@intel.com> References: <20200422110733.28635-1-bhanuprakash.modem@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Bhanuprakash Modem [Why] It's useful to know the min and max vrr range for IGT testing. [How] Expose the min and max vfreq for the connector via a debugfs file on the connector, "vrr_range". Example usage: cat /sys/kernel/debug/dri/0/DP-1/vrr_range v4: * Rebase (Bhanu) * Remove "Vrr_capable", userspace can read this property through DRM_IOCTL_MODE_OBJ_GETPROPERTIES (Bhanu) * Change the name of the node to "vrr_range", so we can avoid code churn in IGT to reuse existing VRR tests (Bhanu) v3: * Remove the unnecessary debug print (Manasi) v2: * Fix the typo in max_vfreq (Manasi) * Change the name of node to i915_vrr_info so we can add other vrr info for more debug info (Manasi) * Change the VRR capable to display Yes or No (Manasi) * Fix indentation checkpatch errors (Manasi) Signed-off-by: Bhanuprakash Modem Signed-off-by: Manasi Navare Cc: Jani Nikula Cc: Ville Syrjälä Tested-by: Manasi Navare --- .../drm/i915/display/intel_display_debugfs.c | 21 ++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 70525623bcdf..d53ffe600ced 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -2185,6 +2185,20 @@ static const struct file_operations i915_dsc_fec_support_fops = { .write = i915_dsc_fec_support_write }; +static int vrr_range_show(struct seq_file *m, void *data) +{ + struct drm_connector *connector = m->private; + + if (connector->status != connector_status_connected) + return -ENODEV; + + seq_printf(m, "Min: %u\n", (u8)connector->display_info.monitor_range.min_vfreq); + seq_printf(m, "Max: %u\n", (u8)connector->display_info.monitor_range.max_vfreq); + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(vrr_range); + /** * intel_connector_debugfs_add - add i915 specific connector debugfs files * @connector: pointer to a registered drm_connector @@ -2219,10 +2233,15 @@ int intel_connector_debugfs_add(struct drm_connector *connector) if (INTEL_GEN(dev_priv) >= 10 && (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || - connector->connector_type == DRM_MODE_CONNECTOR_eDP)) + connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { debugfs_create_file("i915_dsc_fec_support", S_IRUGO, root, connector, &i915_dsc_fec_support_fops); + if (INTEL_GEN(dev_priv) >= 12) + debugfs_create_file("vrr_range", S_IRUGO, root, + connector, &vrr_range_fops); + } + /* Legacy panels doesn't lpsp on any platform */ if ((INTEL_GEN(dev_priv) >= 9 || IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) &&