From patchwork Sat Oct 6 09:22:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 10629233 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9305215E2 for ; Sat, 6 Oct 2018 09:22:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 81AFD28FE6 for ; Sat, 6 Oct 2018 09:22:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 748B029040; Sat, 6 Oct 2018 09:22:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 282F128FE6 for ; Sat, 6 Oct 2018 09:22:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727729AbeJFQZF (ORCPT ); Sat, 6 Oct 2018 12:25:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41340 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727703AbeJFQZF (ORCPT ); Sat, 6 Oct 2018 12:25:05 -0400 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E0AB0307D90F; Sat, 6 Oct 2018 09:22:32 +0000 (UTC) Received: from shalem.localdomain.com (ovpn-116-66.ams2.redhat.com [10.36.116.66]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9AE13308BDA1; Sat, 6 Oct 2018 09:22:31 +0000 (UTC) From: Hans de Goede To: Thierry Reding , Andy Shevchenko , "Rafael J . Wysocki" Cc: Hans de Goede , linux-pwm@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v3 1/2] pwm: lpss: Move struct pwm_lpss_chip definition to the header file Date: Sat, 6 Oct 2018 11:22:29 +0200 Message-Id: <20181006092230.8575-1-hdegoede@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.24 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Sat, 06 Oct 2018 09:22:33 +0000 (UTC) Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Move struct pwm_lpss_chip definition from pwm-lpss.c to pwm-lpss.h, so that the pci/platform drivers can access the info member (struct pwm_lpss_boardinfo *). This is a preparation patch for adding platform specific quirks, which the drivers need access to, to pwm_lpss_boardinfo. Signed-off-by: Hans de Goede --- Changes in v2: -No changes in v2 of this patch-set --- drivers/pwm/pwm-lpss.c | 9 --------- drivers/pwm/pwm-lpss.h | 9 ++++++++- 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c index 4721a264bac2..e602835fd6de 100644 --- a/drivers/pwm/pwm-lpss.c +++ b/drivers/pwm/pwm-lpss.c @@ -32,15 +32,6 @@ /* Size of each PWM register space if multiple */ #define PWM_SIZE 0x400 -#define MAX_PWMS 4 - -struct pwm_lpss_chip { - struct pwm_chip chip; - void __iomem *regs; - const struct pwm_lpss_boardinfo *info; - u32 saved_ctrl[MAX_PWMS]; -}; - static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip) { return container_of(chip, struct pwm_lpss_chip, chip); diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h index 7a4238ad1fcb..8f029ed263af 100644 --- a/drivers/pwm/pwm-lpss.h +++ b/drivers/pwm/pwm-lpss.h @@ -16,7 +16,14 @@ #include #include -struct pwm_lpss_chip; +#define MAX_PWMS 4 + +struct pwm_lpss_chip { + struct pwm_chip chip; + void __iomem *regs; + const struct pwm_lpss_boardinfo *info; + u32 saved_ctrl[MAX_PWMS]; +}; struct pwm_lpss_boardinfo { unsigned long clk_rate; From patchwork Sat Oct 6 09:22:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 10629235 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EB2EF1515 for ; Sat, 6 Oct 2018 09:22:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DAFA528FE6 for ; Sat, 6 Oct 2018 09:22:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CF13129040; Sat, 6 Oct 2018 09:22:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F95D28FE6 for ; Sat, 6 Oct 2018 09:22:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727732AbeJFQZH (ORCPT ); Sat, 6 Oct 2018 12:25:07 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34862 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727703AbeJFQZH (ORCPT ); Sat, 6 Oct 2018 12:25:07 -0400 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 67679308421D; Sat, 6 Oct 2018 09:22:34 +0000 (UTC) Received: from shalem.localdomain.com (ovpn-116-66.ams2.redhat.com [10.36.116.66]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2F12D308BDA1; Sat, 6 Oct 2018 09:22:33 +0000 (UTC) From: Hans de Goede To: Thierry Reding , Andy Shevchenko , "Rafael J . Wysocki" Cc: Hans de Goede , linux-pwm@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v3 2/2] pwm: lpss: Check PWM powerstate after resume on Cherry Trail devices Date: Sat, 6 Oct 2018 11:22:30 +0200 Message-Id: <20181006092230.8575-2-hdegoede@redhat.com> In-Reply-To: <20181006092230.8575-1-hdegoede@redhat.com> References: <20181006092230.8575-1-hdegoede@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.24 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Sat, 06 Oct 2018 09:22:34 +0000 (UTC) Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The _PS0 method for the integrated graphics on some Cherry Trail devices (observed on a HP Pavilion X2 10-p0XX) turns on the PWM chip (puts it in D0), causing an inconsistency between the state the pm-core thinks it is in (left runtime suspended as it was before the suspend/resume) and the state it actually is in. Interestingly enough this is done on a device where the pwm controller is not used for the backlight at all, since it uses an eDP panel. On devices where the PWM is used this is not a problem since we will resume it ourselves anyways. This inconsistency causes us to never suspend the pwm controller again, which causes the device to not be able to reach S0ix states when suspended. This commit adds a resume-complete handler, which when we think the device is still run-time suspended checks the actual power-state and if necessary updates the rpm-core's internal state. This fixes the Pavilion X2 10-p0XX not reaching S0ix states when suspended. Signed-off-by: Hans de Goede --- Changes in v2: -Do the pm_runtime_en/disable before/after checking the power-state --- drivers/pwm/pwm-lpss-platform.c | 27 ++++++++++++++++++++++++--- drivers/pwm/pwm-lpss.h | 2 ++ 2 files changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-lpss-platform.c b/drivers/pwm/pwm-lpss-platform.c index 7304f36ee715..390ee50157a1 100644 --- a/drivers/pwm/pwm-lpss-platform.c +++ b/drivers/pwm/pwm-lpss-platform.c @@ -30,6 +30,7 @@ static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = { .clk_rate = 19200000, .npwm = 1, .base_unit_bits = 16, + .check_power_on_resume = true, }; /* Broxton */ @@ -74,9 +75,29 @@ static int pwm_lpss_remove_platform(struct platform_device *pdev) return pwm_lpss_remove(lpwm); } -static SIMPLE_DEV_PM_OPS(pwm_lpss_platform_pm_ops, - pwm_lpss_suspend, - pwm_lpss_resume); +static void pwm_lpss_complete(struct device *dev) +{ + struct pwm_lpss_chip *lpwm = dev_get_drvdata(dev); + unsigned long long psc; + acpi_status status; + + /* The PWM may be turned on by AML code, update our state to match */ + if (pm_runtime_suspended(dev) && lpwm->info->check_power_on_resume) { + pm_runtime_disable(dev); + + status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_PSC", + NULL, &psc); + if (ACPI_SUCCESS(status) && psc == ACPI_STATE_D0) + pm_runtime_set_active(dev); + + pm_runtime_enable(dev); + } +} + +static const struct dev_pm_ops pwm_lpss_platform_pm_ops = { + .complete = pwm_lpss_complete, + SET_SYSTEM_SLEEP_PM_OPS(pwm_lpss_suspend, pwm_lpss_resume) +}; static const struct acpi_device_id pwm_lpss_acpi_match[] = { { "80860F09", (unsigned long)&pwm_lpss_byt_info }, diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h index 8f029ed263af..1a2575d25bea 100644 --- a/drivers/pwm/pwm-lpss.h +++ b/drivers/pwm/pwm-lpss.h @@ -30,6 +30,8 @@ struct pwm_lpss_boardinfo { unsigned int npwm; unsigned long base_unit_bits; bool bypass; + /* Some devices have AML code messing with the state underneath us */ + bool check_power_on_resume; }; struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,