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Darwish" , Paul Cercueil , "Ben Dooks (Codethink)" , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/3] time/sched_clock: Add new variant sched_clock_register_epoch() Date: Tue, 5 May 2020 21:55:42 +0800 Message-Id: <20200505135544.6003-2-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200505135544.6003-1-leo.yan@linaro.org> References: <20200505135544.6003-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200505_065608_324263_8B926032 X-CRM114-Status: GOOD ( 15.65 ) X-Spam-Score: 3.4 (+++) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (3.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- 3.6 RCVD_IN_SBL_CSS RBL: Received via a relay in Spamhaus SBL-CSS [2400:8904:0:0:f03c:91ff:fe8a:bbe4 listed in] [zen.spamhaus.org] -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1044 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Except the sched clock's raw counter is used by sched clock itself, it also can be used by other purposes in the same system, e.g. the raw counter can be injected into hardware tracing data (like Arm's SPE) and Perf tool can capture trace data and extract the raw counter from it which finally can be used to generate timestamp. Perf tool needs a way to convert sched clock's raw counter cycles into a nanosecond that can be compared against values coming out of sched_clock. To do this accurately, this patch adds a new variant API sched_clock_register_epoch() with introducing an extra argument 'epoch_offset', as its naming indicates, this argument contains the offset time (in nanosecond) for the clock source has been enabled prior to epoch. Signed-off-by: Leo Yan --- include/linux/sched_clock.h | 10 ++++++++++ kernel/time/sched_clock.c | 13 ++++++++++++- 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/include/linux/sched_clock.h b/include/linux/sched_clock.h index 0bb04a96a6d4..98965c0c7cd4 100644 --- a/include/linux/sched_clock.h +++ b/include/linux/sched_clock.h @@ -10,6 +10,10 @@ extern void generic_sched_clock_init(void); extern void sched_clock_register(u64 (*read)(void), int bits, unsigned long rate); + +extern void sched_clock_register_epoch(u64 (*read)(void), int bits, + unsigned long rate, + u64 *epoch_offset); #else static inline void generic_sched_clock_init(void) { } @@ -17,6 +21,12 @@ static inline void sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) { } + +static inline void sched_clock_register_epoch(u64 (*read)(void), int bits, + unsigned long rate, + u64 *epoch_offset) +{ +} #endif #endif diff --git a/kernel/time/sched_clock.c b/kernel/time/sched_clock.c index fa3f800d7d76..b402196afc3f 100644 --- a/kernel/time/sched_clock.c +++ b/kernel/time/sched_clock.c @@ -165,7 +165,8 @@ static enum hrtimer_restart sched_clock_poll(struct hrtimer *hrt) } void __init -sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) +sched_clock_register_epoch(u64 (*read)(void), int bits, unsigned long rate, + u64 *epoch_offset) { u64 res, wrap, new_mask, new_epoch, cyc, ns; u32 new_mult, new_shift; @@ -204,6 +205,10 @@ sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) rd.epoch_cyc = new_epoch; rd.epoch_ns = ns; + /* Output epoch offset (ns) to clock event driver */ + if (epoch_offset) + *epoch_offset = cyc_to_ns(new_epoch & new_mask, new_mult, new_shift) - ns; + update_clock_read_data(&rd); if (sched_clock_timer.function != NULL) { @@ -240,6 +245,12 @@ sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) pr_debug("Registered %pS as sched_clock source\n", read); } +void __init +sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) +{ + sched_clock_register_epoch(read, bits, rate, NULL); +} + void __init generic_sched_clock_init(void) { /* From patchwork Tue May 5 13:55:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 11529177 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2F3F61392 for ; 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Darwish" , Paul Cercueil , "Ben Dooks (Codethink)" , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/3] clocksource/drivers/arm_arch_timer: Handle time offset prior to epoch Date: Tue, 5 May 2020 21:55:43 +0800 Message-Id: <20200505135544.6003-3-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200505135544.6003-1-leo.yan@linaro.org> References: <20200505135544.6003-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200505_065617_484462_BE5C8BB4 X-CRM114-Status: GOOD ( 15.78 ) X-Spam-Score: 3.4 (+++) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (3.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- 3.6 RCVD_IN_SBL_CSS RBL: Received via a relay in Spamhaus SBL-CSS [2400:8904:0:0:f03c:91ff:fe8a:bbe4 listed in] [zen.spamhaus.org] -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:643 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Since arch timer can be enabled at any time during boot, this patch changes to invoke variant sched_clock_register_epoch() so it can retrieve time offset prior to epoch (in nanosecond). Arch timer driver doesn't directly use this time offset, but it needs to pass this value to Perf framework to allow Perf tool to use it for timestamp calibration. For this purpose, this patch introduces an API arch_timer_get_epoch_offset() which returns the time offset for arch timer's counter. Signed-off-by: Leo Yan --- drivers/clocksource/arm_arch_timer.c | 10 +++++++++- include/clocksource/arm_arch_timer.h | 6 ++++++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 2204a444e801..10d0b15a7674 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -78,6 +78,8 @@ static enum vdso_clock_mode vdso_default = VDSO_CLOCKMODE_NONE; static cpumask_t evtstrm_available = CPU_MASK_NONE; static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM); +static u64 epoch_offset; + static int __init early_evtstrm_cfg(char *buf) { return strtobool(buf, &evtstrm_enable); @@ -942,6 +944,11 @@ u32 arch_timer_get_rate(void) return arch_timer_rate; } +u64 arch_timer_get_epoch_offset(void) +{ + return epoch_offset; +} + bool arch_timer_evtstrm_available(void) { /* @@ -1009,7 +1016,8 @@ static void __init arch_counter_register(unsigned type) &cyclecounter, start_count); /* 56 bits minimum, so we assume worst case rollover */ - sched_clock_register(arch_timer_read_counter, 56, arch_timer_rate); + sched_clock_register_epoch(arch_timer_read_counter, 56, + arch_timer_rate, &epoch_offset); } static void arch_timer_stop(struct clock_event_device *clk) diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 1d68d5613dae..a566e82a40ba 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -83,6 +83,7 @@ struct arch_timer_mem { #ifdef CONFIG_ARM_ARCH_TIMER extern u32 arch_timer_get_rate(void); +extern u64 arch_timer_get_epoch_offset(void); extern u64 (*arch_timer_read_counter)(void); extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void); extern bool arch_timer_evtstrm_available(void); @@ -94,6 +95,11 @@ static inline u32 arch_timer_get_rate(void) return 0; } +static inline u64 arch_timer_get_epoch_offset(void) +{ + return 0; +} + static inline u64 arch_timer_read_counter(void) { return 0; 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Tue, 05 May 2020 06:56:26 -0700 (PDT) From: Leo Yan To: Peter Zijlstra , Will Deacon , Marc Zyngier , Mark Rutland , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Catalin Marinas , Daniel Lezcano , Thomas Gleixner , Allison Randal , Alexios Zavras , Greg Kroah-Hartman , Kate Stewart , Enrico Weigelt , "Ahmed S. Darwish" , Paul Cercueil , "Ben Dooks (Codethink)" , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 3/3] arm64: perf_event: Fix time_offset for arch timer Date: Tue, 5 May 2020 21:55:44 +0800 Message-Id: <20200505135544.6003-4-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200505135544.6003-1-leo.yan@linaro.org> References: <20200505135544.6003-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200505_065627_411097_94315A1F X-CRM114-Status: GOOD ( 12.50 ) X-Spam-Score: 3.4 (+++) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (3.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- 3.6 RCVD_IN_SBL_CSS RBL: Received via a relay in Spamhaus SBL-CSS [2400:8904:0:0:f03c:91ff:fe8a:bbe4 listed in] [zen.spamhaus.org] -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:644 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org 'userpg->time_offset' is assigned to the negative 'now', 'now' if the value of sched clock and this value cannot reflect the time offset for arch timer's raw counter prior to sched clock's registration. To fix this issue, this patch invokes arch_timer_get_epoch_offset() to read time offset prior to sched clock's registration, and assign its negative value to 'userpg->time_offset'. Signed-off-by: Leo Yan --- arch/arm64/kernel/perf_event.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 4d7879484cec..cbad7bd770fb 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -1163,10 +1163,12 @@ static int __init armv8_pmu_driver_init(void) device_initcall(armv8_pmu_driver_init) void arch_perf_update_userpage(struct perf_event *event, - struct perf_event_mmap_page *userpg, u64 now) + struct perf_event_mmap_page *userpg, + u64 __maybe_unused now) { u32 freq; u32 shift; + u64 offset; /* * Internal timekeeping for enabled/running/stopped times @@ -1188,5 +1190,7 @@ void arch_perf_update_userpage(struct perf_event *event, userpg->time_mult >>= 1; } userpg->time_shift = (u16)shift; - userpg->time_offset = -now; + + offset = arch_timer_get_epoch_offset(); + userpg->time_offset = -offset; }