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Tue, 12 May 2020 23:59:01 +0000 Subject: [PATCH v4 1/3] arch/x86: Update config and kernel doc for MPK feature on AMD From: Babu Moger To: corbet@lwn.net, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, pbonzini@redhat.com, sean.j.christopherson@intel.com Cc: x86@kernel.org, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, mchehab+samsung@kernel.org, babu.moger@amd.com, changbin.du@intel.com, namit@vmware.com, bigeasy@linutronix.de, yang.shi@linux.alibaba.com, asteinhauser@google.com, anshuman.khandual@arm.com, jan.kiszka@siemens.com, akpm@linux-foundation.org, steven.price@arm.com, rppt@linux.vnet.ibm.com, peterx@redhat.com, dan.j.williams@intel.com, arjunroy@google.com, logang@deltatee.com, thellstrom@vmware.com, aarcange@redhat.com, justin.he@arm.com, robin.murphy@arm.com, ira.weiny@intel.com, keescook@chromium.org, jgross@suse.com, andrew.cooper3@citrix.com, pawan.kumar.gupta@linux.intel.com, fenghua.yu@intel.com, vineela.tummalapalli@intel.com, yamada.masahiro@socionext.com, sam@ravnborg.org, acme@redhat.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Date: Tue, 12 May 2020 18:58:56 -0500 Message-ID: <158932793646.44260.2629848287332937779.stgit@naples-babu.amd.com> In-Reply-To: <158932780954.44260.4292038705292213548.stgit@naples-babu.amd.com> References: <158932780954.44260.4292038705292213548.stgit@naples-babu.amd.com> User-Agent: StGit/unknown-version X-ClientProxiedBy: DM6PR11CA0071.namprd11.prod.outlook.com (2603:10b6:5:14c::48) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from naples-babu.amd.com (165.204.78.2) by DM6PR11CA0071.namprd11.prod.outlook.com (2603:10b6:5:14c::48) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3000.20 via Frontend Transport; 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Add a generic X86_MEMORY_PROTECTION_KEYS config shadowing X86_INTEL_MEMORY_PROTECTION_KEYS and update the kernel documentation. No functional changes. Signed-off-by: Babu Moger --- Documentation/core-api/protection-keys.rst | 3 ++- arch/x86/Kconfig | 14 ++++++++++++-- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/Documentation/core-api/protection-keys.rst b/Documentation/core-api/protection-keys.rst index 49d9833af871..d25e89e53c59 100644 --- a/Documentation/core-api/protection-keys.rst +++ b/Documentation/core-api/protection-keys.rst @@ -6,7 +6,8 @@ Memory Protection Keys Memory Protection Keys for Userspace (PKU aka PKEYs) is a feature which is found on Intel's Skylake "Scalable Processor" Server CPUs. -It will be avalable in future non-server parts. +It will be available in future non-server parts. Also, AMD64 +Architecture Programmer’s Manual defines PKU feature in AMD processors. For anyone wishing to test or use this feature, it is available in Amazon's EC2 C5 instances and is known to work there using an Ubuntu diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 1197b5596d5a..15bda3a60c1d 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1887,10 +1887,10 @@ config X86_UMIP results are dummy. config X86_INTEL_MEMORY_PROTECTION_KEYS - prompt "Intel Memory Protection Keys" + prompt "Memory Protection Keys" def_bool y # Note: only available in 64-bit mode - depends on CPU_SUP_INTEL && X86_64 + depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD) select ARCH_USES_HIGH_VMA_FLAGS select ARCH_HAS_PKEYS ---help--- @@ -1902,6 +1902,16 @@ config X86_INTEL_MEMORY_PROTECTION_KEYS If unsure, say y. +config X86_MEMORY_PROTECTION_KEYS + # Both Intel and AMD platforms support "Memory Protection Keys" + # feature. So add a generic option X86_MEMORY_PROTECTION_KEYS + # and set the option whenever X86_INTEL_MEMORY_PROTECTION_KEYS + # is set. This is to avoid the confusion about the feature + # availability on AMD platforms. Also renaming the old option + # would cause the user an extra prompt during the kernel + # configuration. So avoided changing the old config name. + def_bool X86_INTEL_MEMORY_PROTECTION_KEYS + choice prompt "TSX enable mode" depends on CPU_SUP_INTEL From patchwork Tue May 12 23:59:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Babu Moger X-Patchwork-Id: 11544303 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF2C990 for ; Tue, 12 May 2020 23:59:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9AF1C20740 for ; Tue, 12 May 2020 23:59:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=amdcloud.onmicrosoft.com header.i=@amdcloud.onmicrosoft.com header.b="XjVwZ/Tg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731821AbgELX7T (ORCPT ); Tue, 12 May 2020 19:59:19 -0400 Received: from mail-bn7nam10on2055.outbound.protection.outlook.com ([40.107.92.55]:18017 "EHLO NAM10-BN7-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731670AbgELX7T (ORCPT ); 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Tue, 12 May 2020 23:59:11 +0000 Subject: [PATCH v4 2/3] KVM: x86: Move pkru save/restore to x86.c From: Babu Moger To: corbet@lwn.net, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, pbonzini@redhat.com, sean.j.christopherson@intel.com Cc: x86@kernel.org, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, mchehab+samsung@kernel.org, babu.moger@amd.com, changbin.du@intel.com, namit@vmware.com, bigeasy@linutronix.de, yang.shi@linux.alibaba.com, asteinhauser@google.com, anshuman.khandual@arm.com, jan.kiszka@siemens.com, akpm@linux-foundation.org, steven.price@arm.com, rppt@linux.vnet.ibm.com, peterx@redhat.com, dan.j.williams@intel.com, arjunroy@google.com, logang@deltatee.com, thellstrom@vmware.com, aarcange@redhat.com, justin.he@arm.com, robin.murphy@arm.com, ira.weiny@intel.com, keescook@chromium.org, jgross@suse.com, andrew.cooper3@citrix.com, pawan.kumar.gupta@linux.intel.com, fenghua.yu@intel.com, vineela.tummalapalli@intel.com, yamada.masahiro@socionext.com, sam@ravnborg.org, acme@redhat.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Date: Tue, 12 May 2020 18:59:06 -0500 Message-ID: <158932794619.44260.14508381096663848853.stgit@naples-babu.amd.com> In-Reply-To: <158932780954.44260.4292038705292213548.stgit@naples-babu.amd.com> References: <158932780954.44260.4292038705292213548.stgit@naples-babu.amd.com> User-Agent: StGit/unknown-version X-ClientProxiedBy: DM5PR04CA0035.namprd04.prod.outlook.com (2603:10b6:3:12b::21) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from naples-babu.amd.com (165.204.78.2) by DM5PR04CA0035.namprd04.prod.outlook.com (2603:10b6:3:12b::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3000.20 via Frontend Transport; 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So we can safely move pkru state save/restore to common code. Also move all the pkru data structure to kvm_vcpu_arch. Also fixes the problem Jim Mattson pointed and suggested below. "Though rdpkru and wrpkru are contingent upon CR4.PKE, the PKRU resource isn't. It can be read with XSAVE and written with XRSTOR. So, if we don't set the guest PKRU value here(kvm_load_guest_xsave_state), the guest can read the host value. In case of kvm_load_host_xsave_state, guest with CR4.PKE clear could potentially use XRSTOR to change the host PKRU value" Signed-off-by: Babu Moger --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/vmx/vmx.c | 18 ------------------ arch/x86/kvm/x86.c | 17 +++++++++++++++++ 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 42a2d0d3984a..afd8f3780ae0 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -578,6 +578,7 @@ struct kvm_vcpu_arch { unsigned long cr4; unsigned long cr4_guest_owned_bits; unsigned long cr8; + u32 host_pkru; u32 pkru; u32 hflags; u64 efer; diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index c2c6335a998c..46898a476ba7 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1372,7 +1372,6 @@ void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu) vmx_vcpu_pi_load(vcpu, cpu); - vmx->host_pkru = read_pkru(); vmx->host_debugctlmsr = get_debugctlmsr(); } @@ -6577,11 +6576,6 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu) kvm_load_guest_xsave_state(vcpu); - if (static_cpu_has(X86_FEATURE_PKU) && - kvm_read_cr4_bits(vcpu, X86_CR4_PKE) && - vcpu->arch.pkru != vmx->host_pkru) - __write_pkru(vcpu->arch.pkru); - pt_guest_enter(vmx); if (vcpu_to_pmu(vcpu)->version) @@ -6671,18 +6665,6 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu) pt_guest_exit(vmx); - /* - * eager fpu is enabled if PKEY is supported and CR4 is switched - * back on host, so it is safe to read guest PKRU from current - * XSAVE. - */ - if (static_cpu_has(X86_FEATURE_PKU) && - kvm_read_cr4_bits(vcpu, X86_CR4_PKE)) { - vcpu->arch.pkru = rdpkru(); - if (vcpu->arch.pkru != vmx->host_pkru) - __write_pkru(vmx->host_pkru); - } - kvm_load_host_xsave_state(vcpu); vmx->nested.nested_run_pending = 0; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c5835f9cb9ad..98baeb74452c 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -836,11 +836,25 @@ void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu) vcpu->arch.ia32_xss != host_xss) wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss); } + + if (static_cpu_has(X86_FEATURE_PKU) && + (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) || + (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) && + vcpu->arch.pkru != vcpu->arch.host_pkru) + __write_pkru(vcpu->arch.pkru); } EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state); void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu) { + if (static_cpu_has(X86_FEATURE_PKU) && + (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) || + (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) { + vcpu->arch.pkru = rdpkru(); + if (vcpu->arch.pkru != vcpu->arch.host_pkru) + __write_pkru(vcpu->arch.host_pkru); + } + if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) { if (vcpu->arch.xcr0 != host_xcr0) @@ -3570,6 +3584,9 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) kvm_x86_ops.vcpu_load(vcpu, cpu); + /* Save host pkru register if supported */ + vcpu->arch.host_pkru = read_pkru(); + /* Apply any externally detected TSC adjustments (due to suspend) */ if (unlikely(vcpu->arch.tsc_offset_adjustment)) { adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment); 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Tue, 12 May 2020 23:59:20 +0000 Subject: [PATCH v4 3/3] KVM: x86: Move MPK feature detection to common code From: Babu Moger To: corbet@lwn.net, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, pbonzini@redhat.com, sean.j.christopherson@intel.com Cc: x86@kernel.org, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, mchehab+samsung@kernel.org, babu.moger@amd.com, changbin.du@intel.com, namit@vmware.com, bigeasy@linutronix.de, yang.shi@linux.alibaba.com, asteinhauser@google.com, anshuman.khandual@arm.com, jan.kiszka@siemens.com, akpm@linux-foundation.org, steven.price@arm.com, rppt@linux.vnet.ibm.com, peterx@redhat.com, dan.j.williams@intel.com, arjunroy@google.com, logang@deltatee.com, thellstrom@vmware.com, aarcange@redhat.com, justin.he@arm.com, robin.murphy@arm.com, ira.weiny@intel.com, keescook@chromium.org, jgross@suse.com, andrew.cooper3@citrix.com, pawan.kumar.gupta@linux.intel.com, fenghua.yu@intel.com, vineela.tummalapalli@intel.com, yamada.masahiro@socionext.com, sam@ravnborg.org, acme@redhat.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Date: Tue, 12 May 2020 18:59:16 -0500 Message-ID: <158932795627.44260.15144185478040178638.stgit@naples-babu.amd.com> In-Reply-To: <158932780954.44260.4292038705292213548.stgit@naples-babu.amd.com> References: <158932780954.44260.4292038705292213548.stgit@naples-babu.amd.com> User-Agent: StGit/unknown-version X-ClientProxiedBy: DM6PR11CA0045.namprd11.prod.outlook.com (2603:10b6:5:14c::22) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from naples-babu.amd.com (165.204.78.2) by DM6PR11CA0045.namprd11.prod.outlook.com (2603:10b6:5:14c::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3000.20 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: upZ0IZo3EopfDTf8Ag+uHvQV2Via0Cgf5Y+zRWvkFqvuU8N87Y2YaKlT1S0QbplGCMLsu8J2MHpXThwa9a8xpBmg/ZeriswQO57rNls0tALm2TUl3WU4agyjZ3GSNSewuqAdoN/MmS+8z38FAuVKi31LSd6Bqie8nf1GzSUaEbZvPPeO7eq9GuBPMBTkVrDNFNOgf7IkZEqnJxw/UWTS/IWF/Qmd3Kw9ZeTMm4+OSM/vvpRJZ4rHBUt7oZlya9xRVUa6v5SUaqSyp03tqC8zRWPk3Zx9yluXBPwP5SQZsUtsV0b9Qi3P2s7/hgfhC+vnQErSKwV78/UnomRjlH0U7y1AbiQcwNhNRsCedMKrkS5rxbyGSix2gzT/nnr30m+3CNMWLJDAu1r5kCBgtuEqT7t8O1Bglc16SbwC7gVHQowpK0dUO7wCkt2kzgsU/ZVP6/w2mUbxPDCZBePYhvRs5wfjgUMZeBhNXy25FCahKME= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8e9dcead-2195-4c2b-bc49-08d7f6d07ccb X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2020 23:59:20.7149 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: hpXxFmzvc9b/kEYKuB90RkzxAAfc3SLY6dEjbWGXI5i2xIdltcuxf+V4gmhtzcEp X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2512 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Both Intel and AMD support (MPK) Memory Protection Key feature. Move the feature detection from VMX to the common code. It should work for both the platforms now. Signed-off-by: Babu Moger --- arch/x86/kvm/cpuid.c | 9 ++++++++- arch/x86/kvm/vmx/vmx.c | 4 ---- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 901cd1fdecd9..d2c36768667d 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -326,7 +326,7 @@ void kvm_set_cpu_caps(void) ); kvm_cpu_cap_mask(CPUID_7_ECX, - F(AVX512VBMI) | F(LA57) | 0 /*PKU*/ | 0 /*OSPKE*/ | F(RDPID) | + F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) | F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/ @@ -335,6 +335,13 @@ void kvm_set_cpu_caps(void) if (cpuid_ecx(7) & F(LA57)) kvm_cpu_cap_set(X86_FEATURE_LA57); + /* + * PKU not yet implemented for shadow paging and requires OSPKE + * to be set on the host. Clear it if that is not the case + */ + if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE)) + kvm_cpu_cap_clear(X86_FEATURE_PKU); + kvm_cpu_cap_mask(CPUID_7_EDX, F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 46898a476ba7..d153732ed88f 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -7136,10 +7136,6 @@ static __init void vmx_set_cpu_caps(void) if (vmx_pt_mode_is_host_guest()) kvm_cpu_cap_check_and_set(X86_FEATURE_INTEL_PT); - /* PKU is not yet implemented for shadow paging. */ - if (enable_ept && boot_cpu_has(X86_FEATURE_OSPKE)) - kvm_cpu_cap_check_and_set(X86_FEATURE_PKU); - if (vmx_umip_emulated()) kvm_cpu_cap_set(X86_FEATURE_UMIP);