From patchwork Wed May 13 00:54:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11544457 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0325817EA for ; Wed, 13 May 2020 00:55:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E04AC20753 for ; Wed, 13 May 2020 00:55:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="vAPOs+dP" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732084AbgEMAzy (ORCPT ); Tue, 12 May 2020 20:55:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732081AbgEMAzb (ORCPT ); Tue, 12 May 2020 20:55:31 -0400 Received: from mail-pl1-x642.google.com (mail-pl1-x642.google.com [IPv6:2607:f8b0:4864:20::642]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4DB4AC061A0F for ; Tue, 12 May 2020 17:55:31 -0700 (PDT) Received: by mail-pl1-x642.google.com with SMTP id g11so2908587plp.1 for ; Tue, 12 May 2020 17:55:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=etYHxN3ySLIwR6cL/4LlObYwmD9I/trb9bCtQEgj1mI=; b=vAPOs+dPJoqTXGl2f0d2ZiQWsvD5qMYGMtd+J7/radx3hoV5Cz7loihgG0t9H4rOIk 8gjTOq0oNVGJ1Hqf8FHbsPH65BQfll79RXxraX3PsK2Ihfu2am0DaqEjyvUQwBKbWDkH Uar95Zege8VgBwuYeVpv62cXlyjcp3f2rOcpWtfVXS0oEn/puAvmmd2xi//It7mgiwBV /FM/3FyXRLaPT7+M1Hheq2sun/OdX0CqEW8pARly9cdfmJK4xoRmO5nyecLyLeUJ4UX5 FC1Te1YRPgbOUHoC7Wx4rrocswWBb/zuXUQOo9Z985yKG71rx84EfCBWoBLGyR2U2tkS SYyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=etYHxN3ySLIwR6cL/4LlObYwmD9I/trb9bCtQEgj1mI=; b=XHTqcm0k+S1RxX4aGK1BPLN00CsEdIEMtSo/6guVs75TowvhpKlIlsNVmCsb62HmGK xsHv5aqdPLjBnunDQ/l1veYBAXvmbP7f23A/oRlAsrrlqYV6ZGOYxkTZoR73NKk/njzW TUIqt07maAilrJAtMn4Wa96g1CSxjxa/oGT7/nJlY1dsD+W7t9uCISLcqSA4QrK1m2IA 4vWP9gTKUclRBHnPTCbW1nx627yGzEc80NNpUv/o4/FUqD60prcnEjV4F+Zx5c8jIK2N H63Bx3EXGSzVHErswXh2V7LJ9HKX9/oZFx/H7gLadTW/RaEeHg3/2HYL2ovu2CEiL6ZR lPJQ== X-Gm-Message-State: AGi0Pub8LsYGrhzkBXOHKLTT/7/fWMsBGIdPVNLfcugNVfyyuVuo+a1g qEfgA5VG/kXyBzK2dVtJlT8xxQ== X-Google-Smtp-Source: APiQypJELEN+lza7wUergSkDB14XjiFt+gaaXMuPkWE6i6Jl1gi9geM7ftxaomx0XeS0zRkZgmeGrA== X-Received: by 2002:a17:90a:2c08:: with SMTP id m8mr30936109pjd.102.1589331330776; Tue, 12 May 2020 17:55:30 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id p2sm11057428pgh.25.2020.05.12.17.55.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 17:55:30 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Ohad Ben-Cohen , Baolin Wang , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: hwlock: qcom: Migrate binding to YAML Date: Tue, 12 May 2020 17:54:38 -0700 Message-Id: <20200513005441.1102586-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200513005441.1102586-1-bjorn.andersson@linaro.org> References: <20200513005441.1102586-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Migrate the Qualcomm TCSR mutex binding to YAML to allow validation. Signed-off-by: Bjorn Andersson Reviewed-by: Vinod Koul --- .../bindings/hwlock/qcom-hwspinlock.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml new file mode 100644 index 000000000000..71e63b52edd5 --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwlock/qcom-hwspinlock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Hardware Mutex Block + +maintainers: + - Bjorn Andersson + +description: + The hardware block provides mutexes utilized between different processors on + the SoC as part of the communication protocol used by these processors. + +properties: + compatible: + enum: + - qcom,sfpb-mutex + - qcom,tcsr-mutex + + '#hwlock-cells': + const: 1 + + syscon: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: + Should be a triple of phandle referencing the TCSR mutex syscon, offset + of first mutex within the syscon and stride between each mutex. + +required: + - compatible + - '#hwlock-cells' + - syscon + +additionalProperties: false + +examples: + - | + tcsr_mutex_block: syscon@fd484000 { + compatible = "syscon"; + reg = <0xfd484000 0x2000>; + }; + + hwlock { + compatible = "qcom,tcsr-mutex"; + syscon = <&tcsr_mutex_block 0 0x80>; + + #hwlock-cells = <1>; + }; +... From patchwork Wed May 13 00:54:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11544453 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2F16317EA for ; Wed, 13 May 2020 00:55:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 17D152078C for ; Wed, 13 May 2020 00:55:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="wDywye9W" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732101AbgEMAzw (ORCPT ); Tue, 12 May 2020 20:55:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732100AbgEMAze (ORCPT ); Tue, 12 May 2020 20:55:34 -0400 Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4EAFC05BD0C for ; Tue, 12 May 2020 17:55:32 -0700 (PDT) Received: by mail-pf1-x444.google.com with SMTP id b190so1472322pfg.6 for ; Tue, 12 May 2020 17:55:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RUnboi85SF121UrpH3bFZwKuXXQdWqb1eY3bgMeZfq0=; b=wDywye9WHHKlG4Dfqc21+Ymi2c2GhfCM0ndcG4w9gBx7gisAbn4XX9/yj7tDGO115V abVKOSJEUOvd6HoJP5oJpCXpWvka1K32OidCK+B8/6Jx40lL0mr4aXfEYJSTnCTl1LUI kgXiaIugTpwmRc/fuTUgNjtbo5iC7uftSfZM7cd81+K/Z4qfDiTgQUN/UoeRsAeabvEv ejL1Hehbz54YHGyo82eRm4yjvmrwTHHr981Dp+29CVSDPEt4AjHetPeMYtEJfRBtxIDQ 1dyTYk1mY7y8sQr/uRKYp4w2rlVlQXl0f3wPGSwuk13zlP59aq/7d41SYBYCw2u7qWI3 QKeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RUnboi85SF121UrpH3bFZwKuXXQdWqb1eY3bgMeZfq0=; b=We15vzAIylyFXgnI+sDLlLj3ypDojwViAuexu2ZuHMBNgwHLuUN9C2QS9ijBLYAMjZ u8ip3cuiLPAKjCqkOw+MD5GZRbZdd+LGy2J4L1uqbANLMCpiAYgV1U0S8ZpZLnwnl9LZ XoPtmEMyUNdEDXMfGeRbnpdXd5OK5zfcBwOrXpb+FG6LD8U6ymnWfg0Dv13iod3UtVlX AJa40s24tCm3LUDsU0HRD1GuZEHYIOcWPg6I6xNL8TrQnzONKPD9nHhHWs0di1Fd7SKK c5RIQMc8Ytc42a7+FUMMZukYcai8psO7pR+jS1SRBK7OxeYQeQLywavnFWnQmkjdYcmi DZZw== X-Gm-Message-State: AOAM531ODIM/cIwzYxYjvlYmokw34hmOkIPYajCnzDok9areB4DfUArC igplhlicb852CdsX3KlRf8hTCg== X-Google-Smtp-Source: ABdhPJwIlsG5NiDBXR0Xm2F0/KvNmdfVmcPTDcQEKb3c9MavHvcvGtJXMUS6fhDsJSWryUxHKLA6BQ== X-Received: by 2002:a62:8c0b:: with SMTP id m11mr3886830pfd.105.1589331332342; Tue, 12 May 2020 17:55:32 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id p2sm11057428pgh.25.2020.05.12.17.55.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 17:55:31 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Ohad Ben-Cohen , Baolin Wang , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] dt-bindings: hwlock: qcom: Allow device on mmio bus Date: Tue, 12 May 2020 17:54:39 -0700 Message-Id: <20200513005441.1102586-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200513005441.1102586-1-bjorn.andersson@linaro.org> References: <20200513005441.1102586-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org In all modern Qualcomm platforms the mutex region of the TCSR is forked off into its own block, all with a offset of 0 and stride of 4096. Update the binding to allow the hardware block to be described directly on the mmio bus, in addition to allowing the existing syscon based definition. Signed-off-by: Bjorn Andersson Reviewed-by: Vinod Koul --- .../bindings/hwlock/qcom-hwspinlock.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml index 71e63b52edd5..88f975837588 100644 --- a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml +++ b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml @@ -19,6 +19,9 @@ properties: - qcom,sfpb-mutex - qcom,tcsr-mutex + reg: + maxItems: 1 + '#hwlock-cells': const: 1 @@ -31,7 +34,12 @@ properties: required: - compatible - '#hwlock-cells' - - syscon + +oneOf: + - required: + - reg + - required: + - syscon additionalProperties: false @@ -46,6 +54,12 @@ examples: compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_block 0 0x80>; + #hwlock-cells = <1>; + }; + - | + tcsr_mutex: hwlock@1f40000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x01f40000 0x40000>; #hwlock-cells = <1>; }; ... From patchwork Wed May 13 00:54:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11544447 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9E16190 for ; Wed, 13 May 2020 00:55:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 836412078C for ; Wed, 13 May 2020 00:55:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Obk+GLq7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732106AbgEMAzq (ORCPT ); Tue, 12 May 2020 20:55:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51042 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732104AbgEMAze (ORCPT ); Tue, 12 May 2020 20:55:34 -0400 Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4990BC05BD10 for ; Tue, 12 May 2020 17:55:34 -0700 (PDT) Received: by mail-pf1-x444.google.com with SMTP id y18so427793pfl.9 for ; Tue, 12 May 2020 17:55:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IJgmgp+rAG9yo6xgDF6A6HsX/YJQRAULhH1j2GR7SRM=; b=Obk+GLq7mPdNLuSKVXt+w4hZtdZOkNLL0ym8RfMxo7FOKemI8JHgWOcUuFTjBvJZ6F ZzW+T+i5tbYOxvfKD5iWbPgSk03q2lKwsJTsmRd/FMWksMT7Dn0Nv0HoWAkbVzv4oNDC GHpGDGFIsSe5oJoZBRxNZ0EWQBuCte0QR3vsFFq03BM5Sw7PhqlFrZWEEIj+sLiMY8QV JzyvhiPjFr8uBs+7S6Ly8fdfHTjmYyI7vokL1G1XVjV8cKSXpOtWFxn4kfVFBAce+9mY OVxpMQjAuETZoUZSa9H9/0t8gF5+1hAFSoAY1HlY5XgjQgx2j8g6Vjh+PNvMN+bOn7wN xz2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IJgmgp+rAG9yo6xgDF6A6HsX/YJQRAULhH1j2GR7SRM=; b=FvnPyzAHGAV2fRe63abVPncf4XQ8a4cB1FGNaax+oIO5PZMd/g16H4Zs1dAd906yPx LVWIjB41Wf3hk5cFr3v6t8iEc0YT3LWQXDIS9n5AaxZYicnCMJr7FHp+6V4XxmkJEz11 oynpM0yC8Y/FwZ8UtaeT2Zqus/ztV1iwkEbjBtAXgFViOW24LIX0CDJQE+zMWxIQKwrJ 4QLu4sDOG/LVEEY3c67YBmRKqplWnKSvGO+N2dVPdLfraBetjkw8kgNxW/JuxWxyyx6H SIVWucJnPssm31nbGw/hKu/ceqAKlaqr6WYamk6bnHHrC668h0Ekf4+Dy4L+hVgDJwni Flfg== X-Gm-Message-State: AGi0PuZbkmntXabBFT9fAUVoqi9Pw2U3UKSTixCcHw87q6D2h2FFUTwC qS43gCEP/Iet4AwEBONhi/pYTA== X-Google-Smtp-Source: APiQypKQLqTmC2XNYMJYtH04QLcBuxoFt5pyarA2fbzxE3VIK6BdwN7UEXA2mMb4WdCAWnBPWyiZmQ== X-Received: by 2002:a62:6dc3:: with SMTP id i186mr22501928pfc.273.1589331333749; Tue, 12 May 2020 17:55:33 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id p2sm11057428pgh.25.2020.05.12.17.55.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 17:55:33 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Ohad Ben-Cohen , Baolin Wang , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] hwspinlock: qcom: Allow mmio usage in addition to syscon Date: Tue, 12 May 2020 17:54:40 -0700 Message-Id: <20200513005441.1102586-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200513005441.1102586-1-bjorn.andersson@linaro.org> References: <20200513005441.1102586-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org In all modern Qualcomm platforms the mutex region of the TCSR is forked off into its own block, all with a offset of 0 and stride of 4096. So add support for directly memory mapping this register space, to avoid the need to represent this block using a syscon. Signed-off-by: Bjorn Andersson Reviewed-by: Baolin Wang Reviewed-by: Vinod Koul --- drivers/hwspinlock/qcom_hwspinlock.c | 72 +++++++++++++++++++++------- 1 file changed, 56 insertions(+), 16 deletions(-) diff --git a/drivers/hwspinlock/qcom_hwspinlock.c b/drivers/hwspinlock/qcom_hwspinlock.c index f0da544b14d2..d8d4d729816c 100644 --- a/drivers/hwspinlock/qcom_hwspinlock.c +++ b/drivers/hwspinlock/qcom_hwspinlock.c @@ -70,41 +70,81 @@ static const struct of_device_id qcom_hwspinlock_of_match[] = { }; MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match); -static int qcom_hwspinlock_probe(struct platform_device *pdev) +static struct regmap *qcom_hwspinlock_probe_syscon(struct platform_device *pdev, + u32 *base, u32 *stride) { - struct hwspinlock_device *bank; struct device_node *syscon; - struct reg_field field; struct regmap *regmap; - size_t array_size; - u32 stride; - u32 base; int ret; - int i; syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0); - if (!syscon) { - dev_err(&pdev->dev, "no syscon property\n"); - return -ENODEV; - } + if (!syscon) + return ERR_PTR(-ENODEV); regmap = syscon_node_to_regmap(syscon); of_node_put(syscon); if (IS_ERR(regmap)) - return PTR_ERR(regmap); + return regmap; - ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, &base); + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, base); if (ret < 0) { dev_err(&pdev->dev, "no offset in syscon\n"); - return -EINVAL; + return ERR_PTR(-EINVAL); } - ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, &stride); + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, stride); if (ret < 0) { dev_err(&pdev->dev, "no stride syscon\n"); - return -EINVAL; + return ERR_PTR(-EINVAL); } + return regmap; +} + +static const struct regmap_config tcsr_mutex_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = 0x40000, + .fast_io = true, +}; + +static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev, + u32 *offset, u32 *stride) +{ + struct device *dev = &pdev->dev; + struct resource *res; + void __iomem *base; + + /* All modern platform has offset 0 and stride of 4k */ + *offset = 0; + *stride = 0x1000; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) + return ERR_CAST(base); + + return devm_regmap_init_mmio(dev, base, &tcsr_mutex_config); +} + +static int qcom_hwspinlock_probe(struct platform_device *pdev) +{ + struct hwspinlock_device *bank; + struct reg_field field; + struct regmap *regmap; + size_t array_size; + u32 stride; + u32 base; + int i; + + regmap = qcom_hwspinlock_probe_syscon(pdev, &base, &stride); + if (IS_ERR(regmap) && PTR_ERR(regmap) == -ENODEV) + regmap = qcom_hwspinlock_probe_mmio(pdev, &base, &stride); + + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock); bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL); if (!bank) From patchwork Wed May 13 00:54:41 2020 Content-Type: text/plain; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id p2sm11057428pgh.25.2020.05.12.17.55.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 17:55:34 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Ohad Ben-Cohen , Baolin Wang , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] arm64: dts: qcom: sm8250: Drop tcsr_mutex syscon Date: Tue, 12 May 2020 17:54:41 -0700 Message-Id: <20200513005441.1102586-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200513005441.1102586-1-bjorn.andersson@linaro.org> References: <20200513005441.1102586-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Now that we don't need the intermediate syscon to represent the TCSR mutexes, update the dts to describe the TCSR mutex directly. Signed-off-by: Bjorn Andersson Reviewed-by: Vinod Koul --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index ecbcf725fba2..6e28754705b9 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -146,12 +146,6 @@ scm: scm { }; }; - tcsr_mutex: hwlock { - compatible = "qcom,tcsr-mutex"; - syscon = <&tcsr_mutex_regs 0 0x1000>; - #hwlock-cells = <1>; - }; - memory@80000000 { device_type = "memory"; /* We expect the bootloader to fill in the size */ @@ -569,9 +563,10 @@ rpmhpd_opp_turbo_l1: opp10 { }; }; - tcsr_mutex_regs: syscon@1f40000 { - compatible = "syscon"; + tcsr_mutex: hwlock@1f40000 { + compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; + #hwlock-cells = <1>; }; slpi: remoteproc@5c00000 {