From patchwork Wed May 20 00:30:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhaumik Bhatt X-Patchwork-Id: 11559079 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 472FE1391 for ; Wed, 20 May 2020 00:31:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2B49E20872 for ; Wed, 20 May 2020 00:31:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="QWNMY3or" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728502AbgETAbN (ORCPT ); Tue, 19 May 2020 20:31:13 -0400 Received: from mail27.static.mailgun.info ([104.130.122.27]:48058 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728495AbgETAbN (ORCPT ); Tue, 19 May 2020 20:31:13 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1589934672; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=4dZM/JYeoA487Rk8Sj4yrYwS43HKgRGST+5m/uOSDi0=; b=QWNMY3orea4AcUfKXQzE6PRVuQP6OfhTAgKWNOnXYD2tos27L207gSkdGs4j9ecbOLUbHj3T xG3KNlEXX6/2TXq/F6i1wtRCYkrfwXPBr1ng/CFRqjDhoOL+HHp00faKKt6ibhhFZNDPjVOQ Crg6MMEh+K5jUXWY0Q+ebfSQZzs= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5ec47a2f.7f1e2800a110-smtp-out-n04; Wed, 20 May 2020 00:30:39 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id D8DACC433CB; Wed, 20 May 2020 00:30:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from bbhatt-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id D1966C433CA; Wed, 20 May 2020 00:30:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D1966C433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, Bhaumik Bhatt Subject: [PATCH v1 1/6] bus: mhi: core: Improve shutdown handling after link down detection Date: Tue, 19 May 2020 17:30:26 -0700 Message-Id: <1589934631-22752-2-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> References: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org If MHI were to attempt a device shutdown following an assumption that the device is inaccessible, the host currently moves to a state where device register accesses are allowed when they should not be. This would end up allowing accesses to device register space when the link is inaccessible which can result in NOC errors to be observed on the host. Improve shutdown handling so as to prevent these outcomes and do not move the MHI PM state to a register accessible state after device is assumed to be inaccessible. Signed-off-by: Bhaumik Bhatt --- drivers/bus/mhi/core/init.c | 1 + drivers/bus/mhi/core/internal.h | 1 + drivers/bus/mhi/core/pm.c | 20 ++++++++++++++------ 3 files changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index 9b6a5173..0ae4c34 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -37,6 +37,7 @@ [DEV_ST_TRANSITION_MISSION_MODE] = "MISSION_MODE", [DEV_ST_TRANSITION_SYS_ERR] = "SYS_ERR", [DEV_ST_TRANSITION_DISABLE] = "DISABLE", + [DEV_ST_TRANSITION_FATAL] = "FATAL SHUTDOWN", }; const char * const mhi_state_str[MHI_STATE_MAX] = { diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h index 798aa483..a7203c2 100644 --- a/drivers/bus/mhi/core/internal.h +++ b/drivers/bus/mhi/core/internal.h @@ -388,6 +388,7 @@ enum dev_st_transition { DEV_ST_TRANSITION_MISSION_MODE, DEV_ST_TRANSITION_SYS_ERR, DEV_ST_TRANSITION_DISABLE, + DEV_ST_TRANSITION_FATAL, DEV_ST_TRANSITION_MAX, }; diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index 783e3d5..b2b3de7 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -37,9 +37,10 @@ * M0 -> FW_DL_ERR * M0 -> M3_ENTER -> M3 -> M3_EXIT --> M0 * L1: SYS_ERR_DETECT -> SYS_ERR_PROCESS --> POR - * L2: SHUTDOWN_PROCESS -> DISABLE + * L2: SHUTDOWN_PROCESS -> LD_ERR_FATAL_DETECT + * SHUTDOWN_PROCESS -> DISABLE * L3: LD_ERR_FATAL_DETECT <--> LD_ERR_FATAL_DETECT - * LD_ERR_FATAL_DETECT -> SHUTDOWN_PROCESS + * LD_ERR_FATAL_DETECT -> DISABLE */ static struct mhi_pm_transitions const dev_state_transitions[] = { /* L0 States */ @@ -72,7 +73,7 @@ { MHI_PM_M3, MHI_PM_M3_EXIT | MHI_PM_SYS_ERR_DETECT | - MHI_PM_SHUTDOWN_PROCESS | MHI_PM_LD_ERR_FATAL_DETECT + MHI_PM_LD_ERR_FATAL_DETECT }, { MHI_PM_M3_EXIT, @@ -103,7 +104,7 @@ /* L3 States */ { MHI_PM_LD_ERR_FATAL_DETECT, - MHI_PM_LD_ERR_FATAL_DETECT | MHI_PM_SHUTDOWN_PROCESS + MHI_PM_LD_ERR_FATAL_DETECT | MHI_PM_DISABLE }, }; @@ -667,7 +668,11 @@ void mhi_pm_st_worker(struct work_struct *work) break; case DEV_ST_TRANSITION_DISABLE: mhi_pm_disable_transition - (mhi_cntrl, MHI_PM_SHUTDOWN_PROCESS); + (mhi_cntrl, MHI_PM_SHUTDOWN_PROCESS); + break; + case DEV_ST_TRANSITION_FATAL: + mhi_pm_disable_transition + (mhi_cntrl, MHI_PM_LD_ERR_FATAL_DETECT); break; default: break; @@ -1040,6 +1045,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful) { enum mhi_pm_state cur_state; + enum dev_st_transition next_state = DEV_ST_TRANSITION_DISABLE; struct device *dev = &mhi_cntrl->mhi_dev->dev; /* If it's not a graceful shutdown, force MHI to linkdown state */ @@ -1054,9 +1060,11 @@ void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful) dev_dbg(dev, "Failed to move to state: %s from: %s\n", to_mhi_pm_state_str(MHI_PM_LD_ERR_FATAL_DETECT), to_mhi_pm_state_str(mhi_cntrl->pm_state)); + else + next_state = DEV_ST_TRANSITION_FATAL; } - mhi_queue_state_transition(mhi_cntrl, DEV_ST_TRANSITION_DISABLE); + mhi_queue_state_transition(mhi_cntrl, next_state); /* Wait for shutdown to complete */ flush_work(&mhi_cntrl->st_worker); From patchwork Wed May 20 00:30:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhaumik Bhatt X-Patchwork-Id: 11559069 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8CBD160D for ; Wed, 20 May 2020 00:30:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7056E20890 for ; Wed, 20 May 2020 00:30:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="Pmriv/eC" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728420AbgETAav (ORCPT ); Tue, 19 May 2020 20:30:51 -0400 Received: from mail27.static.mailgun.info ([104.130.122.27]:48058 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728371AbgETAau (ORCPT ); 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Wed, 20 May 2020 00:30:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 48198C433CB Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, Bhaumik Bhatt Subject: [PATCH v1 2/6] bus: mhi: core: Mark device inactive soon after host issues a shutdown Date: Tue, 19 May 2020 17:30:27 -0700 Message-Id: <1589934631-22752-3-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> References: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Clients on the host may see the device in an active state for a short period of time after the host detects a device error or power down. Prevent any further host activity which could lead to race conditions and timeouts seen by clients attempting to push data as they must be notified of the host's intent sooner than later. This also allows the host and device states to be in sync with one another and prevents unnecessary host operations. Signed-off-by: Bhaumik Bhatt Reported-by: kbuild test robot Reported-by: kbuild test robot --- drivers/bus/mhi/core/main.c | 33 ++++++++++++++++++++++++++------- drivers/bus/mhi/core/pm.c | 31 +++++++++++++++++++------------ 2 files changed, 45 insertions(+), 19 deletions(-) diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index bafc12a..da32c23 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -376,6 +376,7 @@ irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *priv) enum mhi_state state = MHI_STATE_MAX; enum mhi_pm_state pm_state = 0; enum mhi_ee_type ee = 0; + bool handle_rddm = false; write_lock_irq(&mhi_cntrl->pm_lock); if (!MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state)) { @@ -390,22 +391,40 @@ irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *priv) TO_MHI_EXEC_STR(mhi_cntrl->ee), TO_MHI_EXEC_STR(ee), TO_MHI_STATE_STR(state)); - if (state == MHI_STATE_SYS_ERR) { - dev_dbg(dev, "System error detected\n"); - pm_state = mhi_tryset_pm_state(mhi_cntrl, - MHI_PM_SYS_ERR_DETECT); - } - write_unlock_irq(&mhi_cntrl->pm_lock); - /* If device supports RDDM don't bother processing SYS error */ if (mhi_cntrl->rddm_image) { + /* host may be performing a device power down already */ + if (!mhi_is_active(mhi_cntrl)) { + write_unlock_irq(&mhi_cntrl->pm_lock); + goto exit_intvec; + } + if (mhi_cntrl->ee == MHI_EE_RDDM && mhi_cntrl->ee != ee) { + /* prevent clients from queueing any more packets */ + pm_state = mhi_tryset_pm_state(mhi_cntrl, + MHI_PM_SYS_ERR_DETECT); + if (pm_state == MHI_PM_SYS_ERR_DETECT) + handle_rddm = true; + } + + write_unlock_irq(&mhi_cntrl->pm_lock); + + if (handle_rddm) { + dev_err(dev, "RDDM event occurred!\n"); mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_EE_RDDM); wake_up_all(&mhi_cntrl->state_event); } goto exit_intvec; } + if (state == MHI_STATE_SYS_ERR) { + dev_dbg(dev, "System error detected\n"); + pm_state = mhi_tryset_pm_state(mhi_cntrl, + MHI_PM_SYS_ERR_DETECT); + } + + write_unlock_irq(&mhi_cntrl->pm_lock); + if (pm_state == MHI_PM_SYS_ERR_DETECT) { wake_up_all(&mhi_cntrl->state_event); diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index b2b3de7..1daed86 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -465,15 +465,10 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, write_lock_irq(&mhi_cntrl->pm_lock); prev_state = mhi_cntrl->pm_state; cur_state = mhi_tryset_pm_state(mhi_cntrl, transition_state); - if (cur_state == transition_state) { - mhi_cntrl->ee = MHI_EE_DISABLE_TRANSITION; + if (cur_state == MHI_PM_SYS_ERR_PROCESS) mhi_cntrl->dev_state = MHI_STATE_RESET; - } write_unlock_irq(&mhi_cntrl->pm_lock); - /* Wake up threads waiting for state transition */ - wake_up_all(&mhi_cntrl->state_event); - if (cur_state != transition_state) { dev_err(dev, "Failed to transition to state: %s from: %s\n", to_mhi_pm_state_str(transition_state), @@ -482,6 +477,11 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, return; } + mhi_cntrl->ee = MHI_EE_DISABLE_TRANSITION; + + /* Wake up threads waiting for state transition */ + wake_up_all(&mhi_cntrl->state_event); + /* Trigger MHI RESET so that the device will not access host memory */ if (MHI_REG_ACCESS_VALID(prev_state)) { u32 in_reset = -1; @@ -1048,22 +1048,29 @@ void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful) enum dev_st_transition next_state = DEV_ST_TRANSITION_DISABLE; struct device *dev = &mhi_cntrl->mhi_dev->dev; + mutex_lock(&mhi_cntrl->pm_mutex); + write_lock_irq(&mhi_cntrl->pm_lock); + /* If it's not a graceful shutdown, force MHI to linkdown state */ if (!graceful) { - mutex_lock(&mhi_cntrl->pm_mutex); - write_lock_irq(&mhi_cntrl->pm_lock); cur_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_LD_ERR_FATAL_DETECT); - write_unlock_irq(&mhi_cntrl->pm_lock); - mutex_unlock(&mhi_cntrl->pm_mutex); - if (cur_state != MHI_PM_LD_ERR_FATAL_DETECT) + if (cur_state != MHI_PM_LD_ERR_FATAL_DETECT) { dev_dbg(dev, "Failed to move to state: %s from: %s\n", to_mhi_pm_state_str(MHI_PM_LD_ERR_FATAL_DETECT), to_mhi_pm_state_str(mhi_cntrl->pm_state)); - else + } else { next_state = DEV_ST_TRANSITION_FATAL; + wake_up_all(&mhi_cntrl->state_event); + } } + /* mark device as inactive to avoid any further host processing */ + mhi_cntrl->dev_state = MHI_STATE_RESET; + + write_unlock_irq(&mhi_cntrl->pm_lock); + mutex_unlock(&mhi_cntrl->pm_mutex); + mhi_queue_state_transition(mhi_cntrl, next_state); /* Wait for shutdown to complete */ From patchwork Wed May 20 00:30:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhaumik Bhatt X-Patchwork-Id: 11559077 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB5D660D for ; Wed, 20 May 2020 00:31:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 866BB207D8 for ; Wed, 20 May 2020 00:31:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="rb+m2dW5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728304AbgETAbF (ORCPT ); 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Wed, 20 May 2020 00:30:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=ham autolearn_force=no version=3.4.0 Received: from bbhatt-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id AD6D6C43391; Wed, 20 May 2020 00:30:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org AD6D6C43391 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, Bhaumik Bhatt Subject: [PATCH v1 3/6] bus: mhi: core: Check for RDDM support before forcing a device crash Date: Tue, 19 May 2020 17:30:28 -0700 Message-Id: <1589934631-22752-4-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> References: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Check if the device supports RDDM from the mhi_force_rddm_mode() API before allowing a client to force a device crash. This will ensure that a client who is unaware does not misuse the API and expect the device to go to ramdump collection mode after a crash is forced. Signed-off-by: Bhaumik Bhatt --- drivers/bus/mhi/core/pm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index 1daed86..52c290c6 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -1114,6 +1114,10 @@ int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl) struct device *dev = &mhi_cntrl->mhi_dev->dev; int ret; + /* Check if device supports RDDM */ + if (!mhi_cntrl->rddm_image) + return -EINVAL; + /* Check if device is already in RDDM */ if (mhi_cntrl->ee == MHI_EE_RDDM) return 0; From patchwork Wed May 20 00:30:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhaumik Bhatt X-Patchwork-Id: 11559075 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9F6851391 for ; Wed, 20 May 2020 00:31:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 86376207D8 for ; Wed, 20 May 2020 00:31:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="e4FxQ6XV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728469AbgETAbD (ORCPT ); Tue, 19 May 2020 20:31:03 -0400 Received: from mail27.static.mailgun.info ([104.130.122.27]:21923 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728466AbgETAbC (ORCPT ); Tue, 19 May 2020 20:31:02 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1589934662; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=nYdqJl/+cJjw0ASKWTqA2nWiG8fIOftxbKtxBp4bd1w=; b=e4FxQ6XVMFQrHXYUrNEeRXKcmDDuiJiE4ZIFF8ZpAXQi8l4/mkfN79/LOh6x1uN8b6cB/uJ0 qMa8A9ZBRJpP/kMT/xXwN4m8rr0ncDFswDpOP8/b1Uxk3QSswtCtW7ZCDodZ3V5MU00fNosK D5AlL5s5GWTrOhU0heF8YS3+9qk= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5ec47a30.7f1286f18340-smtp-out-n05; Wed, 20 May 2020 00:30:40 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 21EE6C43391; Wed, 20 May 2020 00:30:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from bbhatt-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id 33F46C433C8; Wed, 20 May 2020 00:30:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 33F46C433C8 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, Bhaumik Bhatt Subject: [PATCH v1 4/6] bus: mhi: core: Use common name for BHI firmware load function Date: Tue, 19 May 2020 17:30:29 -0700 Message-Id: <1589934631-22752-5-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> References: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org mhi_fw_load_sbl() function is currently used to transfer SBL or EDL images over BHI (Boot Host Interface). Moreover, its contents do not indicate anything regarding support for a specific set of images. Since it can be used for any image download over BHI, it can be appropriately renamed mhi_fw_load_bhi() instead. Signed-off-by: Bhaumik Bhatt --- drivers/bus/mhi/core/boot.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c index 24422f5..34ce102 100644 --- a/drivers/bus/mhi/core/boot.c +++ b/drivers/bus/mhi/core/boot.c @@ -218,7 +218,7 @@ static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl, return (!ret) ? -ETIMEDOUT : 0; } -static int mhi_fw_load_sbl(struct mhi_controller *mhi_cntrl, +static int mhi_fw_load_bhi(struct mhi_controller *mhi_cntrl, dma_addr_t dma_addr, size_t size) { @@ -245,7 +245,7 @@ static int mhi_fw_load_sbl(struct mhi_controller *mhi_cntrl, } session_id = MHI_RANDOM_U32_NONZERO(BHI_TXDB_SEQNUM_BMSK); - dev_dbg(dev, "Starting SBL download via BHI. Session ID:%u\n", + dev_dbg(dev, "Starting SBL/EDL download via BHI. Session ID:%u\n", session_id); mhi_write_reg(mhi_cntrl, base, BHI_STATUS, 0); mhi_write_reg(mhi_cntrl, base, BHI_IMGADDR_HIGH, @@ -446,9 +446,9 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) return; } - /* Download SBL image */ + /* Download SBL or EDL image using BHI */ memcpy(buf, firmware->data, size); - ret = mhi_fw_load_sbl(mhi_cntrl, dma_addr, size); + ret = mhi_fw_load_bhi(mhi_cntrl, dma_addr, size); mhi_free_coherent(mhi_cntrl, size, buf, dma_addr); if (!mhi_cntrl->fbc_download || ret || mhi_cntrl->ee == MHI_EE_EDL) @@ -456,7 +456,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) /* Error or in EDL mode, we're done */ if (ret) { - dev_err(dev, "MHI did not load SBL, ret:%d\n", ret); + dev_err(dev, "MHI did not load SBL/EDL image, ret:%d\n", ret); return; } From patchwork Wed May 20 00:30:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhaumik Bhatt X-Patchwork-Id: 11559073 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D2B9D14B7 for ; Wed, 20 May 2020 00:30:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B1791207D8 for ; Wed, 20 May 2020 00:30:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="CHtb57yl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728272AbgETAay (ORCPT ); Tue, 19 May 2020 20:30:54 -0400 Received: from mail27.static.mailgun.info ([104.130.122.27]:21923 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726348AbgETAax (ORCPT ); Tue, 19 May 2020 20:30:53 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1589934652; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=W5+ip9yPJniF0Gb/X/D61hDFdXHwFiE0VFNFjBrMTl4=; b=CHtb57ylL26K5NkhxE8H//sb8pAJ9/sbhmzQagJrnUdOmffQaS+25rLV+4d8edWEf2NHqjkv PhuoWAJNydIcvxKYGZP+jVZeB5MCpBS1X3rTzac1mt5ajM90wfTRXiZnEy1yulYcMl7xF8Wc 1/oU7jew5hVmtdPTbHxRGizY9L8= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5ec47a30.7fd919ce99d0-smtp-out-n05; Wed, 20 May 2020 00:30:40 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 8A12AC433CB; Wed, 20 May 2020 00:30:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=ham autolearn_force=no version=3.4.0 Received: from bbhatt-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id B0AC3C433A0; Wed, 20 May 2020 00:30:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B0AC3C433A0 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, Bhaumik Bhatt Subject: [PATCH v1 5/6] bus: mhi: core: Introduce support for manual AMSS loading Date: Tue, 19 May 2020 17:30:30 -0700 Message-Id: <1589934631-22752-6-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> References: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org During full boot chain firmware load, the PM state worker called in PBL mode waits for SBL and then does the AMSS image download. This does not allow usage of any SBL-specific channels and should only be done when powering the device up synchronously. If the controller plans to use any SBL channels using an asynchronous bootup flow, SBL device creation cannot be neglected and the option to manually load the AMSS image when the controller is ready also becomes necessary. To allow this, introduce an optional boolean for 'manual_amss_load' and give the controller a callback once the bus is ready to move out of SBL. Introduce a public API for the controller to download the AMSS image and rename the internal download function to use the generic _bhie suffix over _amss. Signed-off-by: Bhaumik Bhatt --- drivers/bus/mhi/core/boot.c | 90 ++++++++++++++++++++++----------------------- drivers/bus/mhi/core/pm.c | 6 +++ include/linux/mhi.h | 10 +++++ 3 files changed, 61 insertions(+), 45 deletions(-) diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c index 34ce102..2528fb3 100644 --- a/drivers/bus/mhi/core/boot.c +++ b/drivers/bus/mhi/core/boot.c @@ -171,7 +171,7 @@ int mhi_download_rddm_img(struct mhi_controller *mhi_cntrl, bool in_panic) } EXPORT_SYMBOL_GPL(mhi_download_rddm_img); -static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl, +static int mhi_fw_load_bhie(struct mhi_controller *mhi_cntrl, const struct mhi_buf *mhi_buf) { void __iomem *base = mhi_cntrl->bhie; @@ -187,7 +187,7 @@ static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl, } sequence_id = MHI_RANDOM_U32_NONZERO(BHIE_TXVECSTATUS_SEQNUM_BMSK); - dev_dbg(dev, "Starting AMSS download via BHIe. Sequence ID:%u\n", + dev_dbg(dev, "Starting image download via BHIe. Sequence ID:%u\n", sequence_id); mhi_write_reg(mhi_cntrl, base, BHIE_TXVECADDR_HIGH_OFFS, upper_32_bits(mhi_buf->dma_addr)); @@ -218,6 +218,34 @@ static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl, return (!ret) ? -ETIMEDOUT : 0; } +int mhi_download_amss_image(struct mhi_controller *mhi_cntrl) +{ + struct image_info *image_info = mhi_cntrl->fbc_image; + struct device *dev = &mhi_cntrl->mhi_dev->dev; + int ret; + + if (!mhi_cntrl->fbc_download) + return -EINVAL; + + if (!image_info) + return -EIO; + + if (mhi_cntrl->ee != MHI_EE_SBL) { + dev_err(dev, "MHI could not load AMSS, EE:%s\n", + TO_MHI_EXEC_STR(mhi_cntrl->ee)); + return -EINVAL; + } + + ret = mhi_fw_load_bhie(mhi_cntrl, + /* Vector table is the last entry */ + &image_info->mhi_buf[image_info->entries - 1]); + if (ret) + dev_err(dev, "MHI did not load AMSS, ret:%d\n", ret); + + return ret; +} +EXPORT_SYMBOL_GPL(mhi_download_amss_image); + static int mhi_fw_load_bhi(struct mhi_controller *mhi_cntrl, dma_addr_t dma_addr, size_t size) @@ -386,7 +414,6 @@ static void mhi_firmware_copy(struct mhi_controller *mhi_cntrl, void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) { const struct firmware *firmware = NULL; - struct image_info *image_info; struct device *dev = &mhi_cntrl->mhi_dev->dev; const char *fw_name; void *buf; @@ -441,27 +468,22 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) size = firmware->size; buf = mhi_alloc_coherent(mhi_cntrl, size, &dma_addr, GFP_KERNEL); - if (!buf) { - release_firmware(firmware); - return; - } + if (!buf) + goto exit_fw_load; /* Download SBL or EDL image using BHI */ memcpy(buf, firmware->data, size); ret = mhi_fw_load_bhi(mhi_cntrl, dma_addr, size); mhi_free_coherent(mhi_cntrl, size, buf, dma_addr); - if (!mhi_cntrl->fbc_download || ret || mhi_cntrl->ee == MHI_EE_EDL) - release_firmware(firmware); - /* Error or in EDL mode, we're done */ if (ret) { dev_err(dev, "MHI did not load SBL/EDL image, ret:%d\n", ret); - return; + goto exit_fw_load; } if (mhi_cntrl->ee == MHI_EE_EDL) - return; + goto exit_fw_load; write_lock_irq(&mhi_cntrl->pm_lock); mhi_cntrl->dev_state = MHI_STATE_RESET; @@ -474,8 +496,10 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) if (mhi_cntrl->fbc_download) { ret = mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->fbc_image, firmware->size); - if (ret) - goto error_alloc_fw_table; + if (ret) { + mhi_cntrl->fbc_image = NULL; + goto exit_fw_load; + } /* Load the firmware into BHIE vec table */ mhi_firmware_copy(mhi_cntrl, firmware, mhi_cntrl->fbc_image); @@ -484,42 +508,18 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) fw_load_ee_pthru: /* Transitioning into MHI RESET->READY state */ ret = mhi_ready_state_transition(mhi_cntrl); - - if (!mhi_cntrl->fbc_download) - return; - if (ret) { dev_err(dev, "MHI did not enter READY state\n"); - goto error_read; - } - - /* Wait for the SBL event */ - ret = wait_event_timeout(mhi_cntrl->state_event, - mhi_cntrl->ee == MHI_EE_SBL || - MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state), - msecs_to_jiffies(mhi_cntrl->timeout_ms)); - if (!ret || MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) { - dev_err(dev, "MHI did not enter SBL\n"); - goto error_read; + if (mhi_cntrl->fbc_download) { + mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->fbc_image); + mhi_cntrl->fbc_image = NULL; + } } - /* Start full firmware image download */ - image_info = mhi_cntrl->fbc_image; - ret = mhi_fw_load_amss(mhi_cntrl, - /* Vector table is the last entry */ - &image_info->mhi_buf[image_info->entries - 1]); - if (ret) - dev_err(dev, "MHI did not load AMSS, ret:%d\n", ret); - - release_firmware(firmware); +exit_fw_load: + if (firmware) + release_firmware(firmware); return; - -error_read: - mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->fbc_image); - mhi_cntrl->fbc_image = NULL; - -error_alloc_fw_table: - release_firmware(firmware); } diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index 52c290c6..5041df9 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -655,6 +655,12 @@ void mhi_pm_st_worker(struct work_struct *work) * either SBL or AMSS states */ mhi_create_devices(mhi_cntrl); + + /* notify controller it can move out of SBL */ + if (mhi_cntrl->manual_amss_load) + mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_EE_SBL); + else + mhi_download_amss_image(mhi_cntrl); break; case DEV_ST_TRANSITION_MISSION_MODE: mhi_pm_mission_mode_transition(mhi_cntrl); diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 42e4d1e..2eb98a9 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -33,6 +33,7 @@ * @MHI_CB_PENDING_DATA: New data available for client to process * @MHI_CB_LPM_ENTER: MHI host entered low power mode * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode + * @MHI_CB_EE_SBL: MHI device entered SBL exec env (for manually loading AMSS) * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover) @@ -44,6 +45,7 @@ enum mhi_callback { MHI_CB_PENDING_DATA, MHI_CB_LPM_ENTER, MHI_CB_LPM_EXIT, + MHI_CB_EE_SBL, MHI_CB_EE_RDDM, MHI_CB_EE_MISSION_MODE, MHI_CB_SYS_ERROR, @@ -354,6 +356,7 @@ struct mhi_controller_config { * @buffer_len: Bounce buffer length * @bounce_buf: Use of bounce buffer * @fbc_download: MHI host needs to do complete image transfer (optional) + * @manual_amss_load: Set to manually trigger AMSS image transfer (optional) * @pre_init: MHI host needs to do pre-initialization before power up * @wake_set: Device wakeup set flag * @@ -444,6 +447,7 @@ struct mhi_controller { size_t buffer_len; bool bounce_buf; bool fbc_download; + bool manual_amss_load; bool pre_init; bool wake_set; }; @@ -646,6 +650,12 @@ void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl, int mhi_download_rddm_img(struct mhi_controller *mhi_cntrl, bool in_panic); /** + * mhi_download_amss_image - Download AMSS/mission mode image to the device + * @mhi_cntrl: MHI controller + */ +int mhi_download_amss_image(struct mhi_controller *mhi_cntrl); + +/** * mhi_force_rddm_mode - Force device into rddm mode * @mhi_cntrl: MHI controller */ From patchwork Wed May 20 00:30:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhaumik Bhatt X-Patchwork-Id: 11559067 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7DEA360D for ; Wed, 20 May 2020 00:30:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6082B20835 for ; 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Wed, 20 May 2020 00:30:40 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id DE7C3C433CA; Wed, 20 May 2020 00:30:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=ham autolearn_force=no version=3.4.0 Received: from bbhatt-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id 1FD94C43387; Wed, 20 May 2020 00:30:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1FD94C43387 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, Bhaumik Bhatt Subject: [PATCH v1 6/6] bus: mhi: core: Process execution environment changes serially Date: Tue, 19 May 2020 17:30:31 -0700 Message-Id: <1589934631-22752-7-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> References: <1589934631-22752-1-git-send-email-bbhatt@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In current design, whenever the "bhi" interrupt is fired, the execution environment is updated. This can cause race conditions and impede any ongoing power up or power down processing. For example, if a power down is in progress and the host has updated the execution environment to a local "disabled" state, any BHI interrupt could replace it with the execution environment from the BHI EE register. Another example would be that the device can enter mission mode while the device creation for SBL is still ongoing leading to multiple attempts at opening the same channel. Ensure that EE changes are handled only from appropriate places and occur one after another. For RDDM, handle it as a critical event directly from the interrupt handler and remove RDDM EE change event from the control event ring to prevent the driver from issuing multiple callbacks. SBL handling requires no change. For AMSS/mission mode, hold off the update until the client is notified with a status callback. To sum it up, ensure client readiness before processing mission mode and move to an error state as soon as possible to avoid a bad state. Signed-off-by: Bhaumik Bhatt --- drivers/bus/mhi/core/main.c | 12 ++++-------- drivers/bus/mhi/core/pm.c | 21 +++++++++++++++++---- 2 files changed, 21 insertions(+), 12 deletions(-) diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index da32c23..d25f321 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -385,8 +385,7 @@ irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *priv) } state = mhi_get_mhi_state(mhi_cntrl); - ee = mhi_cntrl->ee; - mhi_cntrl->ee = mhi_get_exec_env(mhi_cntrl); + ee = mhi_get_exec_env(mhi_cntrl); dev_dbg(dev, "local ee:%s device ee:%s dev_state:%s\n", TO_MHI_EXEC_STR(mhi_cntrl->ee), TO_MHI_EXEC_STR(ee), TO_MHI_STATE_STR(state)); @@ -399,7 +398,9 @@ irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *priv) goto exit_intvec; } - if (mhi_cntrl->ee == MHI_EE_RDDM && mhi_cntrl->ee != ee) { + if (ee == MHI_EE_RDDM && mhi_cntrl->ee != ee) { + mhi_cntrl->ee = MHI_EE_RDDM; + /* prevent clients from queueing any more packets */ pm_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_SYS_ERR_DETECT); @@ -794,11 +795,6 @@ int mhi_process_ctrl_ev_ring(struct mhi_controller *mhi_cntrl, st = DEV_ST_TRANSITION_MISSION_MODE; break; case MHI_EE_RDDM: - mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_EE_RDDM); - write_lock_irq(&mhi_cntrl->pm_lock); - mhi_cntrl->ee = event; - write_unlock_irq(&mhi_cntrl->pm_lock); - wake_up_all(&mhi_cntrl->state_event); break; default: dev_err(dev, diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index 5041df9..4407338 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -377,22 +377,35 @@ static int mhi_pm_mission_mode_transition(struct mhi_controller *mhi_cntrl) { struct mhi_event *mhi_event; struct device *dev = &mhi_cntrl->mhi_dev->dev; + enum mhi_ee_type ee = MHI_EE_MAX; int i, ret; dev_dbg(dev, "Processing Mission Mode transition\n"); write_lock_irq(&mhi_cntrl->pm_lock); if (MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state)) - mhi_cntrl->ee = mhi_get_exec_env(mhi_cntrl); + ee = mhi_get_exec_env(mhi_cntrl); write_unlock_irq(&mhi_cntrl->pm_lock); - if (!MHI_IN_MISSION_MODE(mhi_cntrl->ee)) + if (!MHI_IN_MISSION_MODE(ee)) { + dev_err(dev, "Invalid EE for Mission Mode: %s\n", + TO_MHI_EXEC_STR(ee)); return -EIO; + } - wake_up_all(&mhi_cntrl->state_event); - + /* + * let controller prepare for mission mode before making the execution + * environment change so as to defer core driver activity + */ mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_EE_MISSION_MODE); + /* ready the core driver for mission mode */ + write_lock_irq(&mhi_cntrl->pm_lock); + mhi_cntrl->ee = ee; + write_unlock_irq(&mhi_cntrl->pm_lock); + + wake_up_all(&mhi_cntrl->state_event); + /* Force MHI to be in M0 state before continuing */ ret = __mhi_device_get_sync(mhi_cntrl); if (ret)