From patchwork Wed May 27 05:36:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 11571891 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3707790 for ; Wed, 27 May 2020 05:37:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1AE51208DB for ; Wed, 27 May 2020 05:37:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="aE6EHnMD" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725379AbgE0Fg7 (ORCPT ); Wed, 27 May 2020 01:36:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725265AbgE0Fg7 (ORCPT ); Wed, 27 May 2020 01:36:59 -0400 Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 32281C061A0F; Tue, 26 May 2020 22:36:59 -0700 (PDT) Received: by mail-pf1-x443.google.com with SMTP id x13so11324621pfn.11; Tue, 26 May 2020 22:36:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Uwxa46CvTM5ECW30BkNGZjhjXbVyQcR87+DO9oGqllg=; b=aE6EHnMDX0JmXCER9fDCEscMHHLDDsA6R8dZthc158qDWpdhrVsngKgncts3+asDmM aoedTuUdhSySOOujiix+w+/hWay3IfsuGWPDpq0wDP5NIInlZY0y1ibj//519/cbkd4f ONncQAroZ/yjSExwCYRFnUpuf55InNb6KhQGKTGTOA9a2oQxRau2SnLPgkz6dz0E1bTj S7p234icghEOr7f9d2uhApNiw/4x6qrMp7HZWpYXkny2LNY93If1pzY4/qAOkDlY5/3F UizXy/Y9uwBkEdWdoTrIPZOIlipaEd9RaA6yjELdpqmYG+GYNZpj4o7FTNkeOqP5qUy/ hQ1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Uwxa46CvTM5ECW30BkNGZjhjXbVyQcR87+DO9oGqllg=; b=qnGenva9KYBdPOlR8WsCgViwIAUNzV5Yra+nfjV1T9V/VsDF6tbLNePHApu+Dn4d+6 7kddEcNSvYUBSoCTiR3IUugexeGAmlpp5K6VRm1BpmKF9//ehBrRv1nXt+EFd1GLNzfg uLXoQjJTFg0k6X7JnhX4tv4b1Do065svbMRdYVtyaz4eiqByO9MhTdvywLrYI74IBEiK DnX2IscLvf/3lfsJSwZsNM//wgPJQBEpBZRUwB5s2fNafEzq1LmJ6pESrCxkbRmG3Pp3 WUjnp2/or1g56rP3SRa0IyP6ArbaAbf/KSHDzzlYhhMfUsfWy7i+inOOEp2Vj3U4LvjO ueEQ== X-Gm-Message-State: AOAM5333uiPewiBC7vHNvaRUeFL0G1pVd4VLQydwP5CYnRxNrSaJOQ7z 70dEq7PSEazKiC6eWTr0/+4= X-Google-Smtp-Source: ABdhPJxqytUB8SfBGZSchfvYEIX2fWnykNTsva1POvkE4JkhGNDXruBrvH15uiFtHv26S0jwqUBfXQ== X-Received: by 2002:a63:214d:: with SMTP id s13mr2233129pgm.277.1590557818829; Tue, 26 May 2020 22:36:58 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id r34sm1092406pgl.38.2020.05.26.22.36.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 22:36:58 -0700 (PDT) From: Chunyan Zhang To: Stephen Boyd Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [RESEND PATCH v2 1/4] clk: sprd: check its parent status before reading gate clock Date: Wed, 27 May 2020 13:36:35 +0800 Message-Id: <20200527053638.31439-2-zhang.lyra@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200527053638.31439-1-zhang.lyra@gmail.com> References: <20200527053638.31439-1-zhang.lyra@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Chunyan Zhang Some clocks only can be accessed if their parent is enabled. mipi_csi_xx clocks on SC9863A are an examples. We have to ensure the parent clock is enabled when reading those clocks. Signed-off-by: Chunyan Zhang --- drivers/clk/sprd/gate.c | 7 +++++++ drivers/clk/sprd/gate.h | 9 +++++++++ 2 files changed, 16 insertions(+) diff --git a/drivers/clk/sprd/gate.c b/drivers/clk/sprd/gate.c index 574cfc116bbc..56e1714b541e 100644 --- a/drivers/clk/sprd/gate.c +++ b/drivers/clk/sprd/gate.c @@ -94,8 +94,15 @@ static int sprd_gate_is_enabled(struct clk_hw *hw) { struct sprd_gate *sg = hw_to_sprd_gate(hw); struct sprd_clk_common *common = &sg->common; + struct clk_hw *parent; unsigned int reg; + if (sg->flags & SPRD_GATE_NON_AON) { + parent = clk_hw_get_parent(hw); + if (!parent || !clk_hw_is_enabled(parent)) + return 0; + } + regmap_read(common->regmap, common->reg, ®); if (sg->flags & CLK_GATE_SET_TO_DISABLE) diff --git a/drivers/clk/sprd/gate.h b/drivers/clk/sprd/gate.h index b55817869367..e738dafa4fe9 100644 --- a/drivers/clk/sprd/gate.h +++ b/drivers/clk/sprd/gate.h @@ -19,6 +19,15 @@ struct sprd_gate { struct sprd_clk_common common; }; +/* + * sprd_gate->flags is used for: + * CLK_GATE_SET_TO_DISABLE BIT(0) + * CLK_GATE_HIWORD_MASK BIT(1) + * CLK_GATE_BIG_ENDIAN BIT(2) + * so we define new flags from BIT(3) + */ +#define SPRD_GATE_NON_AON BIT(3) /* not alway powered on, check before read */ + #define SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \ _sc_offset, _enable_mask, _flags, \ _gate_flags, _udelay, _ops, _fn) \ From patchwork Wed May 27 05:36:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 11571893 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 08A9D90 for ; Wed, 27 May 2020 05:37:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DC9BB208DB for ; Wed, 27 May 2020 05:37:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="qMIbafpg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725914AbgE0FhF (ORCPT ); Wed, 27 May 2020 01:37:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725265AbgE0FhE (ORCPT ); Wed, 27 May 2020 01:37:04 -0400 Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46F01C061A0F; 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Tue, 26 May 2020 22:37:01 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id r34sm1092406pgl.38.2020.05.26.22.36.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 22:37:01 -0700 (PDT) From: Chunyan Zhang To: Stephen Boyd Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [RESEND PATCH v2 2/4] dt-bindings: clk: sprd: add mipi_csi_xx clocks for SC9863A Date: Wed, 27 May 2020 13:36:36 +0800 Message-Id: <20200527053638.31439-3-zhang.lyra@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200527053638.31439-1-zhang.lyra@gmail.com> References: <20200527053638.31439-1-zhang.lyra@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Chunyan Zhang mipi_csi_xx clocks are used by camera sensors. Signed-off-by: Chunyan Zhang Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml index bb3a78d8105e..87e8349a539a 100644 --- a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml +++ b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml @@ -28,6 +28,7 @@ properties: - sprd,sc9863a-rpll - sprd,sc9863a-dpll - sprd,sc9863a-mm-gate + - sprd,sc9863a-mm-clk - sprd,sc9863a-apapb-gate clocks: From patchwork Wed May 27 05:36:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 11571897 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 36488912 for ; Wed, 27 May 2020 05:37:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 19D77214D8 for ; Wed, 27 May 2020 05:37:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="vSCWkOKl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726025AbgE0FhH (ORCPT ); Wed, 27 May 2020 01:37:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725941AbgE0FhF (ORCPT ); Wed, 27 May 2020 01:37:05 -0400 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DFFDC061A0F; Tue, 26 May 2020 22:37:05 -0700 (PDT) Received: by mail-pl1-x636.google.com with SMTP id bg4so4423409plb.3; Tue, 26 May 2020 22:37:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9fwAH/9wNW27Bix3RiJQ6nNoorCZe5Ipf6jNZRotmVU=; b=vSCWkOKlHzyJy2tS/DW66bftOKxX3fkd4hLElv9dM1GKBGK1pfYgh5CJCUgN9Z/HmV 9JRKiy0BEsz00gfY2VPiQSLQ/AGh7Xq9gvLvbCaBtUdlaO1hzrQCPu3MGX0QlkhrYYRY iu6+sUo0AjTYImsSVhN4DiZ51rMWMK+svnprW9bpCIYUYELI+GiZWODKONcMNSu1xYbR ptvpSB3L7lMjAdbTg3NiFc5lkM3qmH0Q1P2vUq/JHbzKztVR2hA3MYU35RifKv7YXlQD ML30lHaCNWq4RrOwvynmTwcl5tZbJ9XfeAcZ56jQlTLkV7aRk7YiUE8C5STPptVCyU64 f7Mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9fwAH/9wNW27Bix3RiJQ6nNoorCZe5Ipf6jNZRotmVU=; b=hQqMnhDsyrw2YUg1uoE4a7Baprih+g0W64znDm4tAks7sgOmdPDsMSm3t/8nrtraPr IXcSZ2MVXBCzT1odkP67CFv61M8b1IiJKOQq4F+Sp/Jbp2pZjYGx4rcNW1oktFU26IyS m3papqj6x45B5KyfTd5vOVYb0BFemMCKkYEWJ/lxBY1CN4FFQMHt4+j7T40Y5WU1MC4Y ZQw1A+hocWRsJd4mZyg75kX6R/XxYKCuFyDGUxtIYH92lbxFXpRvzi3E43p1U0dVQXJM 1n+G4TfcUXudScv5++dqSUpkQ8bFIWZiM0Bbvb+Kre3buQws5gLATnqxO7qW/QMGwHTe jrAg== X-Gm-Message-State: AOAM531PO6erwqvBIvsIedTbuyMICJ0FUsOWOMvGlVTw1VKFK5z7Mk0j T6ATDP4pTFGQPJBhpEHL/4o= X-Google-Smtp-Source: ABdhPJzh8Dsl6UQ9yVlyFHy7aSawgg/+oHWpHbdnZH/Iq+igyhgNHO0s1YZmcsf7Yr5Bp4ehMnsjNw== X-Received: by 2002:a17:90a:6409:: with SMTP id g9mr2868729pjj.188.1590557825008; Tue, 26 May 2020 22:37:05 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id r34sm1092406pgl.38.2020.05.26.22.37.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 22:37:04 -0700 (PDT) From: Chunyan Zhang To: Stephen Boyd Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [RESEND PATCH v2 3/4] clk: sprd: add dt-bindings include for mipi_csi_xx clocks Date: Wed, 27 May 2020 13:36:37 +0800 Message-Id: <20200527053638.31439-4-zhang.lyra@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200527053638.31439-1-zhang.lyra@gmail.com> References: <20200527053638.31439-1-zhang.lyra@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Chunyan Zhang mipi_csi_xx clocks are used by camera sensors. Signed-off-by: Chunyan Zhang Acked-by: Rob Herring --- include/dt-bindings/clock/sprd,sc9863a-clk.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/dt-bindings/clock/sprd,sc9863a-clk.h b/include/dt-bindings/clock/sprd,sc9863a-clk.h index 901ba59676c2..4e030421641f 100644 --- a/include/dt-bindings/clock/sprd,sc9863a-clk.h +++ b/include/dt-bindings/clock/sprd,sc9863a-clk.h @@ -308,6 +308,11 @@ #define CLK_MCPHY_CFG_EB 14 #define CLK_MM_GATE_NUM (CLK_MCPHY_CFG_EB + 1) +#define CLK_MIPI_CSI 0 +#define CLK_MIPI_CSI_S 1 +#define CLK_MIPI_CSI_M 2 +#define CLK_MM_CLK_NUM (CLK_MIPI_CSI_M + 1) + #define CLK_SIM0_EB 0 #define CLK_IIS0_EB 1 #define CLK_IIS1_EB 2 From patchwork Wed May 27 05:36:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 11571895 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6BD9A912 for ; Wed, 27 May 2020 05:37:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5348B207ED for ; Wed, 27 May 2020 05:37:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="MUC+ktwX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726214AbgE0FhK (ORCPT ); Wed, 27 May 2020 01:37:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726209AbgE0FhJ (ORCPT ); Wed, 27 May 2020 01:37:09 -0400 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F251BC061A0F; Tue, 26 May 2020 22:37:08 -0700 (PDT) Received: by mail-pl1-x62a.google.com with SMTP id m7so9733730plt.5; Tue, 26 May 2020 22:37:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cqkf7LycevmgLpVmZeBhW8pIulT8kk5Dc9E7315h7UE=; b=MUC+ktwXiZmTf+GNJYOcuArbLORoC4bO3Seb9eAiMiZiNcB4OH6xtny+LZIddrpyUO e7T9adWN134UIMYOMwA64KOWAzer6xMCAWSUn6bAeg/7RKofNjaVAtLx2ecAZ5XsrerW mBkecyDGJL0wztKLTWXMJ3dvDLYBZwIlBspQsUgGYTVCFcSfa8uglMJ7oszoDbTmXM3b lZ2jfO5C/JkDJ1K9S0g9NCoY5LgJ7vvSDaojNtXog9gNbEqEyZ90dNnlfyTj5xlMfcZ6 DTzwLv5NyeltsWNX3RQMg/axB3GCl3jGo7qjZg8zNz71hv2ArFIOsI/PSdJSuI/sD22r 1uIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cqkf7LycevmgLpVmZeBhW8pIulT8kk5Dc9E7315h7UE=; b=TTZCYDpl3QfsKXSpGJ3SDD8zKMh4EnST8X8lWQ1PXKp1+gfY6ItAlG8G2FFTUPSphV O7u8HzDKjzGCDoY7AC+Zq/IqKzXaNlComn8cA0YKRWVEwfloESGlvNQwmts89dRNXZvf /4d0bDICz79BuZVc2jgJq3FNwGkpsOaxzu3xzLVJPc2eUB14SBMG5gkuS4CawexMqqLA TV4rRpeFpM2tRwI4e9+8wgARpPWLhPFT98/xbKHaZbygSmsUtynBknpemp0G5UVwi3su OPZXaEruwoOhYgQIRAitRpTe/pWidSoaaBN0UkGE9bumkEpNZJELqzO/fueEQNqozcoC IaKg== X-Gm-Message-State: AOAM5332bziG6v81hGOqNfsJpLiiW8wq/74KqTwagDwnkOYWoJcWtS5M mIfJWXKmb5QBExg/pQ+X4Jc= X-Google-Smtp-Source: ABdhPJy8K1WVcQM1HCK6TVkGYFSMk0D4eOQMyBO8IUfUJoEQH8Ney49GrcU3NPF9ePs8Y2CRZsSwPQ== X-Received: by 2002:a17:90b:a13:: with SMTP id gg19mr3070516pjb.49.1590557828509; Tue, 26 May 2020 22:37:08 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id r34sm1092406pgl.38.2020.05.26.22.37.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2020 22:37:07 -0700 (PDT) From: Chunyan Zhang To: Stephen Boyd Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [RESEND PATCH v2 4/4] clk: sprd: add mipi_csi_xx gate clocks Date: Wed, 27 May 2020 13:36:38 +0800 Message-Id: <20200527053638.31439-5-zhang.lyra@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200527053638.31439-1-zhang.lyra@gmail.com> References: <20200527053638.31439-1-zhang.lyra@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Chunyan Zhang mipi_csi_xx clocks are used by camera sensors. Signed-off-by: Chunyan Zhang --- drivers/clk/sprd/sc9863a-clk.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/clk/sprd/sc9863a-clk.c b/drivers/clk/sprd/sc9863a-clk.c index a0631f7756cf..f67bd08f225c 100644 --- a/drivers/clk/sprd/sc9863a-clk.c +++ b/drivers/clk/sprd/sc9863a-clk.c @@ -1615,6 +1615,36 @@ static const struct sprd_clk_desc sc9863a_mm_gate_desc = { .hw_clks = &sc9863a_mm_gate_hws, }; +/* camera sensor clocks */ +static SPRD_GATE_CLK_HW(mipi_csi_clk, "mipi-csi-clk", &mahb_ckg_eb.common.hw, + 0x20, BIT(16), 0, SPRD_GATE_NON_AON); +static SPRD_GATE_CLK_HW(mipi_csi_s_clk, "mipi-csi-s-clk", &mahb_ckg_eb.common.hw, + 0x24, BIT(16), 0, SPRD_GATE_NON_AON); +static SPRD_GATE_CLK_HW(mipi_csi_m_clk, "mipi-csi-m-clk", &mahb_ckg_eb.common.hw, + 0x28, BIT(16), 0, SPRD_GATE_NON_AON); + +static struct sprd_clk_common *sc9863a_mm_clk_clks[] = { + /* address base is 0x60900000 */ + &mipi_csi_clk.common, + &mipi_csi_s_clk.common, + &mipi_csi_m_clk.common, +}; + +static struct clk_hw_onecell_data sc9863a_mm_clk_hws = { + .hws = { + [CLK_MIPI_CSI] = &mipi_csi_clk.common.hw, + [CLK_MIPI_CSI_S] = &mipi_csi_s_clk.common.hw, + [CLK_MIPI_CSI_M] = &mipi_csi_m_clk.common.hw, + }, + .num = CLK_MM_CLK_NUM, +}; + +static const struct sprd_clk_desc sc9863a_mm_clk_desc = { + .clk_clks = sc9863a_mm_clk_clks, + .num_clk_clks = ARRAY_SIZE(sc9863a_mm_clk_clks), + .hw_clks = &sc9863a_mm_clk_hws, +}; + static SPRD_SC_GATE_CLK_FW_NAME(sim0_eb, "sim0-eb", "ext-26m", 0x0, 0x1000, BIT(0), 0, 0); static SPRD_SC_GATE_CLK_FW_NAME(iis0_eb, "iis0-eb", "ext-26m", 0x0, @@ -1737,6 +1767,8 @@ static const struct of_device_id sprd_sc9863a_clk_ids[] = { .data = &sc9863a_aonapb_gate_desc }, { .compatible = "sprd,sc9863a-mm-gate", /* 0x60800000 */ .data = &sc9863a_mm_gate_desc }, + { .compatible = "sprd,sc9863a-mm-clk", /* 0x60900000 */ + .data = &sc9863a_mm_clk_desc }, { .compatible = "sprd,sc9863a-apapb-gate", /* 0x71300000 */ .data = &sc9863a_apapb_gate_desc }, { }