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Tue, 9 Jun 2020 11:23:33 +0000 From: Li Jun To: balbi@kernel.org, shawnguo@kernel.org Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, peter.chen@nxp.com Subject: [PATCH 1/6] dt-bindings: usb: dwc3: add property to disable xhci 64bit support Date: Tue, 9 Jun 2020 19:12:40 +0800 Message-Id: <1591701165-12872-2-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591701165-12872-1-git-send-email-jun.li@nxp.com> References: <1591701165-12872-1-git-send-email-jun.li@nxp.com> X-ClientProxiedBy: SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) To VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3066.18 via Frontend Transport; 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Signed-off-by: Li Jun --- Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index d03edf9..d16cba7 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -109,6 +109,9 @@ Optional properties: When just one value, which means INCRX burst mode enabled. When more than one value, which means undefined length INCR burst type enabled. The values can be 1, 4, 8, 16, 32, 64, 128 and 256. + - snps,xhci-dis-64bit-support-quirk: set if the AC64 bit (bit 0) of HCCPARAMS1 is set + to be 1, but the controller actually can't handle 64-bit address + due to SoC integration. - in addition all properties from usb-xhci.txt from the current directory are supported as well From patchwork Tue Jun 9 11:12:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jun Li X-Patchwork-Id: 11595281 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D2544913 for ; Tue, 9 Jun 2020 11:23:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B906F2081A for ; Tue, 9 Jun 2020 11:23:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=nxp.com header.i=@nxp.com header.b="FU20Wls2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728967AbgFILXo (ORCPT ); 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Tue, 9 Jun 2020 11:23:37 +0000 From: Li Jun To: balbi@kernel.org, shawnguo@kernel.org Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, peter.chen@nxp.com Subject: [PATCH 2/6] usb: host: xhci-plat: add quirk for XHCI_NO_64BIT_SUPPORT Date: Tue, 9 Jun 2020 19:12:41 +0800 Message-Id: <1591701165-12872-3-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591701165-12872-1-git-send-email-jun.li@nxp.com> References: <1591701165-12872-1-git-send-email-jun.li@nxp.com> X-ClientProxiedBy: SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) To VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3066.18 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: naxa/der2HKEhyxheYmrOFYipNfsGKzeUcm4jvAsyGlfVaGjjZoZP0sMjEpIgN9JKKMKMMG8TXR0j8XcjvL2IKjxXyV/u3lY9SjQWgS5WYNAG79jPPikerhMjyZpG71c7n7NE8ZsamLkc/YsU4q3lCQJIdQFyBv4SijZH04NWBYaGC2n02+agH7seCu9svpH6cqV56tTcscdZ+/R30WT0b5cL90d4S+6gYqQLFOsw+pBjrY9muUCmMSNPodPhtzC5O+twBnbVF5DBIzFZtW5PRXiuDpNzz2Gt12GzENMkGrFYE7KOdq02HNED/rv5KwaMxi3yynM+AwKboOxFSPJn0DiAJx6bIJN6yyhg/lYPv+UaxPn1Zn8/LEsMEwTUYMwvgDFKODJix6qHkUGvtGnorn4MvgldrAVPwITdAdM9zOd2/DIv6+LR6yVsxYE617T3abUmeQGqOx6B2XPXNu7pJs34ExmI6GJtx95qrCF59U= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d673955a-6ebe-4096-0576-08d80c678dc2 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jun 2020 11:23:37.6150 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jxWbxQx7mCXZ1vxaiYkXQHdJD7TOz1SsAiBTuH57YvzpzsR4MSN/b9wVzy2PvTgB X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB6589 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Some dwc3 based platforms may also have the problem AC64 bit (bit 0) of HCCPARAMS1 set to be 1 but the controller actually can't support 64-bit address when SoC integration, so enable XHCI_NO_64BIT_SUPPORT via dts property "snps,xhci-dis-64bit-support-quirk". Signed-off-by: Li Jun --- drivers/usb/host/xhci-plat.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index 1d4f6f8..f782aea 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -290,6 +290,10 @@ static int xhci_plat_probe(struct platform_device *pdev) device_property_read_u32(tmpdev, "imod-interval-ns", &xhci->imod_interval); + + if (device_property_read_bool(tmpdev, + "snps,xhci-dis-64bit-support-quirk")) + xhci->quirks |= XHCI_NO_64BIT_SUPPORT; } hcd->usb_phy = devm_usb_get_phy_by_phandle(sysdev, "usb-phy", 0); From patchwork Tue Jun 9 11:12:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jun Li X-Patchwork-Id: 11595283 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ED2CD1391 for ; Tue, 9 Jun 2020 11:23:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C6B6820812 for ; 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dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=nxp.com; Received: from VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) by VE1PR04MB6589.eurprd04.prod.outlook.com (2603:10a6:803:128::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3066.19; Tue, 9 Jun 2020 11:23:41 +0000 Received: from VE1PR04MB6528.eurprd04.prod.outlook.com ([fe80::5086:ae9e:6397:6b03]) by VE1PR04MB6528.eurprd04.prod.outlook.com ([fe80::5086:ae9e:6397:6b03%7]) with mapi id 15.20.3066.023; Tue, 9 Jun 2020 11:23:41 +0000 From: Li Jun To: balbi@kernel.org, shawnguo@kernel.org Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, peter.chen@nxp.com Subject: [PATCH 3/6] usb: dwc3: add imx8mp dwc3 glue layer driver Date: Tue, 9 Jun 2020 19:12:42 +0800 Message-Id: <1591701165-12872-4-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591701165-12872-1-git-send-email-jun.li@nxp.com> References: <1591701165-12872-1-git-send-email-jun.li@nxp.com> X-ClientProxiedBy: SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) To VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3066.18 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: Oe2lld5WTWDUPVGgnUl9dzqHJiJIe08+M2YG88J6wh233BIF/+iMr6WYX8w3p8IpOvjf0PxRtkb6wkYcGqmUVPsEKdwhoZZrsqxxvHysI+38c1W/xico93AUrNj//xA1RUYLsp9GAS02TlOH5kHXAUU8tNmajshVcMBQ8aLzbalbzhU67Z2cZECCW7THV/43yU3OHK/2FVOtX9mwua6BzcGTdcJllZd5q5SdwG2p9LVJOAlznC5fcveO3p9GHdG9JZctBw/GVd8ugr8Ka8uxV3Rpc/+rk9ZQrbYFyEASCFcMU7agp2gafUk4kNPXXdZ3HoKu0jgH/+UPxKnqw6mmx5c08Izfk1G/H/WkjRCOCa4LXG+dkpcG0XI8JLPleNOTzoHfr8kFAFYZGkl8oFNiYxzJOGLvoqfW5aCKTHJEdvawkd8XugEVHY+lbjnbpZ2IHa53isvi9H48jkrX7brZc02dnZo9OAFQ+0LrVS2Bq+c= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 86846476-5e28-4f17-6ad5-08d80c679008 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jun 2020 11:23:41.6917 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nZZBXWXPQjjAUuZsLXXVulMwEkeubzYZd4mUvmoibVxyJq+TQsDlaltro2YjaiKw X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB6589 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org imx8mp SoC integrate dwc3 3.30b IP and has some customizations to support low power, which has a seprated wakeup irq and additional logic to wakeup usb from low power mode both for host mode and device mode. Signed-off-by: Li Jun --- drivers/usb/dwc3/Kconfig | 10 ++ drivers/usb/dwc3/Makefile | 1 + drivers/usb/dwc3/dwc3-imx8mp.c | 352 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 363 insertions(+) diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 206caa0..7ef2339 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -138,4 +138,14 @@ config USB_DWC3_QCOM for peripheral mode support. Say 'Y' or 'M' if you have one such device. +config USB_DWC3_IMX8MP + tristate "NXP iMX8MP Platform" + depends on OF && COMMON_CLK + depends on (ARCH_MXC && ARM64) || COMPILE_TEST + default USB_DWC3 + help + NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3 + functionality. + Say 'Y' or 'M' if you have one such device. + endif diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index ae86da0..2259f88 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -51,3 +51,4 @@ obj-$(CONFIG_USB_DWC3_MESON_G12A) += dwc3-meson-g12a.o obj-$(CONFIG_USB_DWC3_OF_SIMPLE) += dwc3-of-simple.o obj-$(CONFIG_USB_DWC3_ST) += dwc3-st.o obj-$(CONFIG_USB_DWC3_QCOM) += dwc3-qcom.o +obj-$(CONFIG_USB_DWC3_IMX8MP) += dwc3-imx8mp.o diff --git a/drivers/usb/dwc3/dwc3-imx8mp.c b/drivers/usb/dwc3/dwc3-imx8mp.c new file mode 100644 index 0000000..d4e9e99 --- /dev/null +++ b/drivers/usb/dwc3/dwc3-imx8mp.c @@ -0,0 +1,352 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * dwc3-imx8mp.c - NXP imx8mp Specific Glue layer + * + * Copyright (c) 2020 NXP. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "core.h" + +/* USB wakeup registers */ +#define USB_WAKEUP_CTRL 0x00 + +/* Global wakeup interrupt enable, also used to clear interrupt */ +#define USB_WAKEUP_EN BIT(31) +/* Wakeup from connect or disconnect, only for superspeed */ +#define USB_WAKEUP_SS_CONN BIT(5) +/* 0 select vbus_valid, 1 select sessvld */ +#define USB_WAKEUP_VBUS_SRC_SESS_VAL BIT(4) +/* Enable signal for wake up from u3 state */ +#define USB_WAKEUP_U3_EN BIT(3) +/* Enable signal for wake up from id change */ +#define USB_WAKEUP_ID_EN BIT(2) +/* Enable signal for wake up from vbus change */ +#define USB_WAKEUP_VBUS_EN BIT(1) +/* Enable signal for wake up from dp/dm change */ +#define USB_WAKEUP_DPDM_EN BIT(0) + +#define USB_WAKEUP_EN_MASK GENMASK(5, 0) + +struct dwc3_imx8mp { + struct device *dev; + struct platform_device *dwc3; + void __iomem *glue_base; + struct clk_bulk_data *clks; + int num_clks; + int irq; + bool pm_suspended; + bool wakeup_pending; +}; + +static const struct clk_bulk_data dwc3_imx8mp_clks[] = { + { .id = "hsio" }, + { .id = "bus" }, + { .id = "suspend" }, +}; + +static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx) +{ + struct dwc3 *dwc3 = platform_get_drvdata(dwc3_imx->dwc3); + u32 val; + + if (!dwc3) + return; + + val = readl(dwc3_imx->glue_base + USB_WAKEUP_CTRL); + + if ((dwc3->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc3->xhci) + val |= USB_WAKEUP_EN | USB_WAKEUP_SS_CONN | + USB_WAKEUP_U3_EN | USB_WAKEUP_DPDM_EN; + else if (dwc3->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) + val |= USB_WAKEUP_EN | USB_WAKEUP_VBUS_EN | + USB_WAKEUP_VBUS_SRC_SESS_VAL; + + writel(val, dwc3_imx->glue_base + USB_WAKEUP_CTRL); +} + +static void dwc3_imx8mp_wakeup_disable(struct dwc3_imx8mp *dwc3_imx) +{ + u32 val; + + val = readl(dwc3_imx->glue_base + USB_WAKEUP_CTRL); + val &= ~(USB_WAKEUP_EN | USB_WAKEUP_EN_MASK); + writel(val, dwc3_imx->glue_base + USB_WAKEUP_CTRL); +} + +static irqreturn_t dwc3_imx8mp_interrupt(int irq, void *_dwc3_imx) +{ + struct dwc3_imx8mp *dwc3_imx = _dwc3_imx; + struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3); + + if (!dwc3_imx->pm_suspended) + return IRQ_HANDLED; + + disable_irq_nosync(dwc3_imx->irq); + dwc3_imx->wakeup_pending = true; + + if ((dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc->xhci) + pm_runtime_resume(&dwc->xhci->dev); + else if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) + pm_runtime_get(dwc->dev); + + return IRQ_HANDLED; +} + +static int dwc3_imx8mp_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *dwc3_np, *node = dev->of_node; + struct dwc3_imx8mp *dwc3_imx; + int err, irq; + + if (!node) { + dev_err(dev, "device node not found\n"); + return -EINVAL; + } + + dwc3_imx = devm_kzalloc(dev, sizeof(*dwc3_imx), GFP_KERNEL); + if (!dwc3_imx) + return -ENOMEM; + + platform_set_drvdata(pdev, dwc3_imx); + + dwc3_imx->dev = dev; + + dwc3_imx->glue_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(dwc3_imx->glue_base)) + return PTR_ERR(dwc3_imx->glue_base); + + dwc3_imx->clks = devm_kmemdup(dev, dwc3_imx8mp_clks, + sizeof(dwc3_imx8mp_clks), GFP_KERNEL); + if (!dwc3_imx->clks) + return -ENOMEM; + + dwc3_imx->num_clks = ARRAY_SIZE(dwc3_imx8mp_clks); + err = devm_clk_bulk_get(dev, dwc3_imx->num_clks, dwc3_imx->clks); + if (err) { + dev_err(dev, "Failed to request all necessary clocks\n"); + return err; + } + + err = clk_bulk_prepare_enable(dwc3_imx->num_clks, dwc3_imx->clks); + if (err) + return err; + + /* Double enable suspend clk to keep it always on */ + err = clk_prepare_enable(dwc3_imx->clks[dwc3_imx->num_clks-1].clk); + if (err) + goto disable_bulk_clk; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + err = irq; + goto disable_clks; + } + dwc3_imx->irq = irq; + + err = devm_request_threaded_irq(dev, irq, NULL, dwc3_imx8mp_interrupt, + IRQF_ONESHOT, dev_name(dev), dwc3_imx); + if (err) { + dev_err(dev, "failed to request IRQ #%d --> %d\n", irq, err); + goto disable_clks; + } + + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + err = pm_runtime_get_sync(dev); + if (err < 0) + goto disable_rpm; + + dwc3_np = of_get_child_by_name(node, "dwc3"); + if (!dwc3_np) { + dev_err(dev, "failed to find dwc3 core child\n"); + goto disable_rpm; + } + + err = of_platform_populate(node, NULL, NULL, dev); + if (err) { + dev_err(&pdev->dev, "failed to create dwc3 core\n"); + goto disable_rpm; + } + + dwc3_imx->dwc3 = of_find_device_by_node(dwc3_np); + if (!dwc3_imx->dwc3) { + dev_err(dev, "failed to get dwc3 platform device\n"); + err = -ENODEV; + goto depopulate; + } + + device_set_wakeup_capable(dev, true); + pm_runtime_put(dev); + + return 0; + +depopulate: + of_platform_depopulate(dev); +disable_rpm: + pm_runtime_disable(dev); + pm_runtime_put_noidle(dev); +disable_clks: + clk_disable_unprepare(dwc3_imx->clks[dwc3_imx->num_clks-1].clk); +disable_bulk_clk: + clk_bulk_disable_unprepare(dwc3_imx->num_clks, dwc3_imx->clks); + + return err; +} + +static int dwc3_imx8mp_remove(struct platform_device *pdev) +{ + struct dwc3_imx8mp *dwc3_imx = platform_get_drvdata(pdev); + struct device *dev = &pdev->dev; + + pm_runtime_get_sync(dev); + of_platform_depopulate(dev); + + clk_bulk_disable_unprepare(dwc3_imx->num_clks, dwc3_imx->clks); + clk_disable_unprepare(dwc3_imx->clks[dwc3_imx->num_clks-1].clk); + + pm_runtime_disable(dev); + pm_runtime_put_noidle(dev); + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static int dwc3_imx8mp_suspend(struct dwc3_imx8mp *dwc3_imx, pm_message_t msg) +{ + if (dwc3_imx->pm_suspended) + return 0; + + /* Wakeup enable */ + if (PMSG_IS_AUTO(msg) || device_may_wakeup(dwc3_imx->dev)) + dwc3_imx8mp_wakeup_enable(dwc3_imx); + + clk_bulk_disable_unprepare(dwc3_imx->num_clks, dwc3_imx->clks); + dwc3_imx->pm_suspended = true; + + return 0; +} + +static int dwc3_imx8mp_resume(struct dwc3_imx8mp *dwc3_imx, pm_message_t msg) +{ + struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3); + int ret = 0; + + if (!dwc3_imx->pm_suspended) + return 0; + + ret = clk_bulk_prepare_enable(dwc3_imx->num_clks, dwc3_imx->clks); + if (ret) + return ret; + + /* Wakeup disable */ + dwc3_imx8mp_wakeup_disable(dwc3_imx); + dwc3_imx->pm_suspended = false; + + if (dwc3_imx->wakeup_pending) { + dwc3_imx->wakeup_pending = false; + if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) { + pm_runtime_mark_last_busy(dwc->dev); + pm_runtime_put_autosuspend(dwc->dev); + } else { + /* + * Add wait for xhci switch from suspend + * clock to normal clock to detect connection. + */ + usleep_range(9000, 10000); + } + enable_irq(dwc3_imx->irq); + } + + return ret; +} + +static int __maybe_unused dwc3_imx8mp_pm_suspend(struct device *dev) +{ + struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev); + int ret; + + ret = dwc3_imx8mp_suspend(dwc3_imx, PMSG_SUSPEND); + + if (device_may_wakeup(dwc3_imx->dev)) + enable_irq_wake(dwc3_imx->irq); + + dev_dbg(dev, "dwc3 imx8mp pm suspend.\n"); + + return ret; +} + +static int __maybe_unused dwc3_imx8mp_pm_resume(struct device *dev) +{ + struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev); + int ret; + + if (device_may_wakeup(dwc3_imx->dev)) + disable_irq_wake(dwc3_imx->irq); + + ret = dwc3_imx8mp_resume(dwc3_imx, PMSG_RESUME); + + pm_runtime_disable(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + dev_dbg(dev, "dwc3 imx8mp pm resume.\n"); + + return ret; +} + +static int __maybe_unused dwc3_imx8mp_runtime_suspend(struct device *dev) +{ + struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev); + + dev_dbg(dev, "dwc3 imx8mp runtime suspend.\n"); + + return dwc3_imx8mp_suspend(dwc3_imx, PMSG_AUTO_SUSPEND); +} + +static int __maybe_unused dwc3_imx8mp_runtime_resume(struct device *dev) +{ + struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev); + + dev_dbg(dev, "dwc3 imx8mp runtime resume.\n"); + + return dwc3_imx8mp_resume(dwc3_imx, PMSG_AUTO_RESUME); +} + +static const struct dev_pm_ops dwc3_imx8mp_dev_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(dwc3_imx8mp_pm_suspend, dwc3_imx8mp_pm_resume) + SET_RUNTIME_PM_OPS(dwc3_imx8mp_runtime_suspend, + dwc3_imx8mp_runtime_resume, NULL) +}; + +static const struct of_device_id dwc3_imx8mp_of_match[] = { + { .compatible = "fsl,imx8mp-dwc3", }, + {}, +}; +MODULE_DEVICE_TABLE(of, dwc3_imx8mp_of_match); + +static struct platform_driver dwc3_imx8mp_driver = { + .probe = dwc3_imx8mp_probe, + .remove = dwc3_imx8mp_remove, + .driver = { + .name = "imx8mp-dwc3", + .pm = &dwc3_imx8mp_dev_pm_ops, + .of_match_table = dwc3_imx8mp_of_match, + }, +}; + +module_platform_driver(dwc3_imx8mp_driver); + +MODULE_ALIAS("platform:imx8mp-dwc3"); +MODULE_AUTHOR("jun.li@nxp.com"); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("DesignWare USB3 imx8mp Glue Layer"); From patchwork Tue Jun 9 11:12:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jun Li X-Patchwork-Id: 11595287 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 133BA913 for ; Tue, 9 Jun 2020 11:23:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E1FA620835 for ; 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X-MS-Exchange-AntiSpam-MessageData: GtwYerJbBGOc1gQHF+5++ciOXnS/wYCWY36PnU37Gp292ktyBBY77V8nTS5VTT2jpAmuPvdL1Ey/xNo4RzfyQTsP9M71nRNeZlHZf0j5zwycEGMYIruzI+xHQqIwayvokobC9fMdfifoPqQsuAiZXyVeUQ9PAbX1Rqn4qkD0W/QLrbDR/1QVueXzJez/LrImaf90v7zDf3iKAwjqNKj7c4SltQHXai/bBi3KSNdY3eA6/40/iSRKNXvEPKlUad9qaQB69SkrA0033NyX0psSE9/UJoeBKSEGpWJjzQ4Ev4JvxnvIo4xmeeG8Ji70Pa347zvcwcx1N4mOK0AUPBwP+oUcrAx2r9JMKmL1dC6d4FHz79jFQvtqj2eGVPpKgx2vc/CEGqsl+ZC2TthpUxU4Ixn67j1maJJarR/rc/QPmo1uHC2h9jnTN6imN0ukQjL86lhztlbDgDPRt/UxKCurov2b2K8M5x+YURV4C2BWpJk= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6c2af535-833c-4c67-e7e0-08d80c67926f X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jun 2020 11:23:45.3315 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: of8FsjKhrxKCHA3Mp2WXinzZXrb2iqUagOpQM/jrrIT0SOobCAyggoxYPP/sSu5s X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB6589 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org imx8mp integrates 2 identical dwc3 based USB3 controllers and Synopsys phys, each instance has additional wakeup logic to support low powe mode, so the glue layer need a node with dwc3 core sub node. Signed-off-by: Li Jun --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 79 +++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 9b1616e..b0a0de8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -650,5 +650,84 @@ interrupts = ; interrupt-parent = <&gic>; }; + + usb3_phy0: usb-phy@381f0040 { + compatible = "fsl,imx8mp-usb-phy"; + reg = <0x381f0040 0x40>; + clocks = <&clk IMX8MP_CLK_USB_PHY_ROOT>; + clock-names = "phy"; + assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>; + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; + #phy-cells = <0>; + status = "disabled"; + }; + + usb3_0: usb@32f10100 { + compatible = "fsl,imx8mp-dwc3"; + reg = <0x32f10100 0x8>; + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, + <&clk IMX8MP_CLK_HSIO_AXI_DIV>, + <&clk IMX8MP_CLK_USB_ROOT>; + clock-names = "hsio", "bus", "suspend"; + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI_SRC>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; + assigned-clock-rates = <500000000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <1>; + ranges; + status = "disabled"; + + usb_dwc3_0: dwc3@38100000 { + compatible = "snps,dwc3"; + reg = <0x38100000 0x10000>; + interrupts = ; + phys = <&usb3_phy0>, <&usb3_phy0>; + phy-names = "usb2-phy", "usb3-phy"; + snps,xhci-dis-64bit-support-quirk; + snps,dis-u2-freeclk-exists-quirk; + status = "disabled"; + }; + + }; + + usb3_phy1: usb-phy@382f0040 { + compatible = "fsl,imx8mp-usb-phy"; + reg = <0x382f0040 0x40>; + clocks = <&clk IMX8MP_CLK_USB_PHY_ROOT>; + clock-names = "phy"; + assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>; + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; + #phy-cells = <0>; + status = "disabled"; + }; + + usb3_1: usb@32f10108 { + compatible = "fsl,imx8mp-dwc3"; + reg = <0x32f10108 0x8>; + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, + <&clk IMX8MP_CLK_HSIO_AXI_DIV>, + <&clk IMX8MP_CLK_USB_ROOT>; + clock-names = "hsio", "bus", "suspend"; + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI_SRC>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; + assigned-clock-rates = <500000000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <1>; + ranges; + status = "disabled"; + + usb_dwc3_1: dwc3@38200000 { + compatible = "snps,dwc3"; + reg = <0x38200000 0x10000>; + interrupts = ; + phys = <&usb3_phy1>, <&usb3_phy1>; + phy-names = "usb2-phy", "usb3-phy"; + snps,xhci-dis-64bit-support-quirk; + snps,dis-u2-freeclk-exists-quirk; + status = "disabled"; + }; + }; }; }; From patchwork Tue Jun 9 11:12:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jun Li X-Patchwork-Id: 11595289 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B90A0913 for ; Tue, 9 Jun 2020 11:23:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9C7A620814 for ; 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dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=nxp.com; Received: from VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) by VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3066.20; Tue, 9 Jun 2020 11:23:49 +0000 Received: from VE1PR04MB6528.eurprd04.prod.outlook.com ([fe80::5086:ae9e:6397:6b03]) by VE1PR04MB6528.eurprd04.prod.outlook.com ([fe80::5086:ae9e:6397:6b03%7]) with mapi id 15.20.3066.023; Tue, 9 Jun 2020 11:23:49 +0000 From: Li Jun To: balbi@kernel.org, shawnguo@kernel.org Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, peter.chen@nxp.com Subject: [PATCH 5/6] arm64: dts: imx8mp-evk: enable usb1 as host mode Date: Tue, 9 Jun 2020 19:12:44 +0800 Message-Id: <1591701165-12872-6-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591701165-12872-1-git-send-email-jun.li@nxp.com> References: <1591701165-12872-1-git-send-email-jun.li@nxp.com> X-ClientProxiedBy: SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) To VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3066.18 via Frontend Transport; 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Signed-off-by: Li Jun --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 32 ++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index 3da1fff..fbe056c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -43,6 +43,19 @@ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + reg_usb1_host_vbus: regulator-usb1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb1_host_vbus"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_vbus>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + }; &fec { @@ -91,6 +104,19 @@ status = "okay"; }; +&usb3_phy1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&usb_dwc3_1 { + dr_mode = "host"; + status = "okay"; +}; + &usdhc2 { assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; assigned-clock-rates = <400000000>; @@ -172,6 +198,12 @@ >; }; + pinctrl_usb1_vbus: usb1grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x19 + >; + }; + pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 From patchwork Tue Jun 9 11:12:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jun Li X-Patchwork-Id: 11595291 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DFA7B913 for ; Tue, 9 Jun 2020 11:24:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C40A620812 for ; Tue, 9 Jun 2020 11:24:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=nxp.com header.i=@nxp.com header.b="IljScxy/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728988AbgFILYA (ORCPT ); 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Tue, 9 Jun 2020 11:23:52 +0000 From: Li Jun To: balbi@kernel.org, shawnguo@kernel.org Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, peter.chen@nxp.com Subject: [PATCH 6/6] dt-bindings: usb: dwc3-imx8mp: add imx8mp dwc3 glue bindings Date: Tue, 9 Jun 2020 19:12:45 +0800 Message-Id: <1591701165-12872-7-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591701165-12872-1-git-send-email-jun.li@nxp.com> References: <1591701165-12872-1-git-send-email-jun.li@nxp.com> X-ClientProxiedBy: SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) To VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3066.18 via Frontend Transport; Tue, 9 Jun 2020 11:23:49 +0000 X-Mailer: git-send-email 2.7.4 X-Originating-IP: [119.31.174.66] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: d8e4a52f-f952-48a7-1a59-08d80c6796c6 X-MS-TrafficTypeDiagnostic: VE1PR04MB6622: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3044; X-Forefront-PRVS: 042957ACD7 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 75IXlFsjAFA8GMKdQdW60e/3+0tP2Hr1TMjbh896dfjBrhiGoSJ35Z7Z8GZodU7GnB4hEZvYoNCZXcgNQizMCiMU4FV5Gl5ChSeDtJzoqUPmGZ9sUrEerZkyidG4zwKKUADIkcwvqmYVCpLXaLgfJVWcwScLN9ivbE4Z5DTGImIagbWQpZ+LaqJfxqRqtQjrULUWGCLTDn7XKmQI3NNMNT6RDRGFxcvJ3mtpwb5K6UZzOLBGtfitLQbiBmwdt3SzwY+wzTP5SB+0LhkjZwAS3O+6kc1xBrXiYrbNxlXhnrau0oTrqTdqxH1fBy5PjJojG2Vpo8Vl+UUlkJ5qLGeRrcpxwDiZGNcd7pjRfQxD3g70TYfTViNeJ+M4MB6qs8AqMESoLkKvHR8Pc6FtTkdPnr4EBC7kG6d6hyH6LvYlKgeg+2CfX/Lhmu43xwHZZj6ut2s03FnBuvn95daJGlsYylqIHsdi5oCE6Whr9mzwg0s= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VE1PR04MB6528.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFTY:;SFS:(4636009)(366004)(26005)(186003)(8936002)(8676002)(16526019)(4326008)(83380400001)(86362001)(69590400007)(498600001)(5660300002)(66946007)(66556008)(6666004)(6486002)(2906002)(6506007)(36756003)(52116002)(966005)(2616005)(956004)(6512007)(66476007)(32563001);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData: 1jJfodwmo/x3L5t7kzK4I/qPsSkaiePyY/sTAAjsuXoumge8QfesHCi4iaeohaoyRkYCMhltsCSqkTTI714of106LU3s0FHSrstXVkW5GIdUUG73oj7DNNi1vkbjJKCdYm0WSRtsIUAFYxpPUjOBT3VKBPnsH5HlSB2jnMAWgax9HG4SRwj2iKLB+VZHm7cqhuiaKs01ZaNIhm6zYyzUineaYEDtc/C8eLswAcGTHQ/XGSs+1INP7ATRalqpsc7bu3BLu+CwMq+fxHEEqUumeZOtsS0ovQ152SPnH9XaMDvHE6yaK9yQo5+3utobnZaPGHN5WLc/h30H+6pbwUZj+9icD7uEkLat0eZLmWY2i7A/cPoSSRO2Ri9D5R84KoWRM0VZiGe4wXlNKVjQrxaqQLLv/1gUf/zz/HlklC4g+JyakZM7LZ5ACyNgQB6FjyHpMx9qo1s9tewyU7prw5fwREFEfF4kCkK2FOZlFv3msL0= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d8e4a52f-f952-48a7-1a59-08d80c6796c6 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jun 2020 11:23:52.5943 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: iPfPrZz/2vef+Hdxde735Yuk+5KomyZV8CyTT58aiIzgWNerkNea/4x5HZs7ceZz X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB6622 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org NXP imx8mp integrates 2 dwc3 3.30b IP and add some wakeup logic to support low power mode, the glue layer is for this wakeup functionality, which has a separated interrupt, can support wakeup from U3 and connect events for host, and vbus wakeup for device. Signed-off-by: Li Jun --- .../devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml | 87 ++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml new file mode 100644 index 0000000..823db058 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2020 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP iMX8MP Soc USB Controller + +maintainers: + - Li Jun + +properties: + compatible: + items: + - const: fsl,imx8mp-dwc3 + + reg: + maxItems: 1 + description: Address and length of the register set for the wrapper of + dwc3 core on the SOC. + + "#address-cells": + enum: [ 1, 2 ] + + "#size-cells": + enum: [ 1, 2 ] + + interrupts: + maxItems: 1 + description: The interrupt that is asserted when a wakeup event is + received. + + clocks: + description: + A list of phandle and clock-specifier pairs for the clocks + listed in clock-names. + items: + - description: system hsio root clock. + - description: system bus AXI clock. + - description: suspend clock, used for wakeup logic. + + clock-names: + items: + - const: hsio + - const: bus + - const: suspend + +# Required child node: + + dwc3: + description: This is the node representing the DWC3 controller instance + Documentation/devicetree/bindings/usb/dwc3.txt + +required: + - compatible + - reg + - interrupts + - clocks + +examples: + - | + #include + #include + usb3_0: usb@32f10100 { + compatible = "fsl,imx8mp-dwc3"; + reg = <0x32f10100 0x8>; + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, + <&clk IMX8MP_CLK_HSIO_AXI_DIV>, + <&clk IMX8MP_CLK_USB_ROOT>; + clock-names = "hsio", "bus", "suspend"; + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI_SRC>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; + assigned-clock-rates = <500000000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3@38100000 { + compatible = "snps,dwc3"; + reg = <0x38100000 0x10000>; + interrupts = ; + phys = <&usb3_phy0>, <&usb3_phy0>; + phy-names = "usb2-phy", "usb3-phy"; + }; + };