From patchwork Sat Jun 20 09:34:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Lobakin X-Patchwork-Id: 11615843 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C037E138C for ; Sat, 20 Jun 2020 09:34:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A709023A77 for ; Sat, 20 Jun 2020 09:34:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="mWjxeu+J" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727876AbgFTJe5 (ORCPT ); Sat, 20 Jun 2020 05:34:57 -0400 Received: from mail1.protonmail.ch ([185.70.40.18]:32218 "EHLO mail1.protonmail.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727874AbgFTJe4 (ORCPT ); Sat, 20 Jun 2020 05:34:56 -0400 Date: Sat, 20 Jun 2020 09:34:43 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail; t=1592645694; bh=agNVtYyFVqOBDHZGb6RZWP94lkQhp18/tjm/4c8bTHY=; h=Date:To:From:Cc:Reply-To:Subject:In-Reply-To:References:From; b=mWjxeu+JH7vswWbq8t1FQGPD3AKApQlQopiFf+wEtsvR3Qmh3MKXhWbFBpLKJzaIg oS9uT7imSL5OwgErXQOYXKPzAuM7RPLnhQgioCWIijpaOkI0BYMeRk2Uy6/1SMX2xU l+BNRJ+1joIdlRmwi8UY4Gs2WzbQKFEbf4OMCr7XHvGuUg4GDG8QwFrOdcdts7VMZg 4I9YwvryOfyDrAxqqA0g+SIGoltrJafuEO5nIfj2zPSOKc5WGvrFIA6k4yeagmOsRc 31eVG8XKntKR+j1wiDXCyT5eudkz90pvS6SYhzIGhWFn7XxMz8KweAWKzdalcwKxPD nXwFRRbRBGrzQ== To: Thomas Bogendoerfer From: Alexander Lobakin Cc: Alexandre Belloni , Paul Burton , Alexander Lobakin , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Reply-To: Alexander Lobakin Subject: [PATCH mips-next 1/3] MIPS: generic/ip32: io: fix __mem_ioswabq() Message-ID: In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-1.2 required=7.0 tests=ALL_TRUSTED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF shortcircuit=no autolearn=disabled version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on mail.protonmail.ch Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org *readq() family operates with u64 arguments, so they need 64-bit byteswaps. Correct macros for Generic MIPS and IP-32 to match other machines' implementations. Signed-off-by: Alexander Lobakin --- arch/mips/include/asm/mach-generic/mangle-port.h | 2 +- arch/mips/include/asm/mach-ip32/mangle-port.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/mach-generic/mangle-port.h b/arch/mips/include/asm/mach-generic/mangle-port.h index f49dc990214b..e4daf163706c 100644 --- a/arch/mips/include/asm/mach-generic/mangle-port.h +++ b/arch/mips/include/asm/mach-generic/mangle-port.h @@ -45,7 +45,7 @@ # define ioswabl(a, x) (x) # define __mem_ioswabl(a, x) cpu_to_le32(x) # define ioswabq(a, x) (x) -# define __mem_ioswabq(a, x) cpu_to_le32(x) +# define __mem_ioswabq(a, x) cpu_to_le64(x) #endif diff --git a/arch/mips/include/asm/mach-ip32/mangle-port.h b/arch/mips/include/asm/mach-ip32/mangle-port.h index f1d0f1756a9f..c5ef72ccb0d5 100644 --- a/arch/mips/include/asm/mach-ip32/mangle-port.h +++ b/arch/mips/include/asm/mach-ip32/mangle-port.h @@ -21,6 +21,6 @@ # define ioswabl(a, x) (x) # define __mem_ioswabl(a, x) cpu_to_le32(x) # define ioswabq(a, x) (x) -# define __mem_ioswabq(a, x) cpu_to_le32(x) +# define __mem_ioswabq(a, x) cpu_to_le64(x) #endif /* __ASM_MACH_IP32_MANGLE_PORT_H */ From patchwork Sat Jun 20 09:34:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Lobakin X-Patchwork-Id: 11615845 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4C3A91731 for ; Sat, 20 Jun 2020 09:35:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2D80D21582 for ; Sat, 20 Jun 2020 09:35:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="J6R89rH4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727841AbgFTJe6 (ORCPT ); Sat, 20 Jun 2020 05:34:58 -0400 Received: from mail2.protonmail.ch ([185.70.40.22]:54587 "EHLO mail2.protonmail.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727866AbgFTJe6 (ORCPT ); Sat, 20 Jun 2020 05:34:58 -0400 Date: Sat, 20 Jun 2020 09:34:51 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail; t=1592645694; bh=AmHbVOMk66AqezIk6cxSXO5/iQAq0kMicOJudm4j0nU=; h=Date:To:From:Cc:Reply-To:Subject:In-Reply-To:References:From; b=J6R89rH4S6CN6c8EcCRqpTBc/YykQDuLfkKvjSsI1rswYs8WnzkV9UFia8TP/9Q9C qYbwmksLHPfDILMII95hmI3B1LLh9fJBBV0uKd+sjUKnRMyMtr60RdGXftYqxEhqTL ETxdshEhvF1O7yk1KHlL2g/x1+m8M0T3mSusHc9FXfwYEJAhnrq5tpOeT1BqN8MFDZ McbL8t2fEa99uzKDJb/LKkSIZlNsz36MTy2FjGPVkczwAr5x31PKa6JI36gv6Uztm+ /Pu/h3h31fuO8e8UzaJzTKpon3S90Y7pchsv8/9h/NpLajchj3OQmSRa970UkpBeUr zv2f4lnlN9DJg== To: Thomas Bogendoerfer From: Alexander Lobakin Cc: Alexandre Belloni , Paul Burton , Alexander Lobakin , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Reply-To: Alexander Lobakin Subject: [PATCH mips-next 2/3] MIPS: io: fix sparse flood on asm/io.h Message-ID: In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-1.2 required=7.0 tests=ALL_TRUSTED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF shortcircuit=no autolearn=disabled version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on mail.protonmail.ch Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org MIPS MMIO macros for byteswapping from/to hardware endianness are a bit tricky because they use cpu_to_le{16,32,64}() in both directions. This generates a lot of questions from sparse as __le{16,32,64} types are 'restricted' and direct cast is forbidden in order to prevent messing up the byteorder. As MMIO ops are used in almost every single driver, this leads to console flooding and complicates bug hunting. We could fix it in a more proper way, i.e. separate from device / to device byteswap macros and expand __BUILD_MEMORY_*(), but this seems redundant and will produce code duplication. Instead, just expand the existing *ioswab*() macros with forced typecasting to stop floods. Signed-off-by: Alexander Lobakin --- .../include/asm/mach-cavium-octeon/mangle-port.h | 12 +++++++++--- arch/mips/include/asm/mach-generic/mangle-port.h | 12 ++++++------ arch/mips/include/asm/mach-ip27/mangle-port.h | 6 +++--- arch/mips/include/asm/mach-ip30/mangle-port.h | 6 +++--- arch/mips/include/asm/mach-ip32/mangle-port.h | 6 +++--- arch/mips/include/asm/mach-tx39xx/mangle-port.h | 6 +++--- arch/mips/include/asm/mach-tx49xx/mangle-port.h | 6 +++--- 7 files changed, 30 insertions(+), 24 deletions(-) diff --git a/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h b/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h index 8ff2cbdf2c3e..239fcc874b99 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h +++ b/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h @@ -48,11 +48,17 @@ static inline bool __should_swizzle_addr(u64 p) # define ioswabb(a, x) (x) # define __mem_ioswabb(a, x) (x) -# define ioswabw(a, x) (__should_swizzle_bits(a) ? le16_to_cpu(x) : x) +# define ioswabw(a, x) (__should_swizzle_bits(a) ? \ + le16_to_cpu((__force __le16)(x)) : \ + (x)) # define __mem_ioswabw(a, x) (x) -# define ioswabl(a, x) (__should_swizzle_bits(a) ? le32_to_cpu(x) : x) +# define ioswabl(a, x) (__should_swizzle_bits(a) ? \ + le32_to_cpu((__force __le32)(x)) : \ + (x)) # define __mem_ioswabl(a, x) (x) -# define ioswabq(a, x) (__should_swizzle_bits(a) ? le64_to_cpu(x) : x) +# define ioswabq(a, x) (__should_swizzle_bits(a) ? \ + le64_to_cpu((__force __le64)(x)) : \ + (x)) # define __mem_ioswabq(a, x) (x) #endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-generic/mangle-port.h b/arch/mips/include/asm/mach-generic/mangle-port.h index e4daf163706c..77c65c294db6 100644 --- a/arch/mips/include/asm/mach-generic/mangle-port.h +++ b/arch/mips/include/asm/mach-generic/mangle-port.h @@ -29,11 +29,11 @@ # define ioswabb(a, x) (x) # define __mem_ioswabb(a, x) (x) -# define ioswabw(a, x) le16_to_cpu(x) +# define ioswabw(a, x) le16_to_cpu((__force __le16)(x)) # define __mem_ioswabw(a, x) (x) -# define ioswabl(a, x) le32_to_cpu(x) +# define ioswabl(a, x) le32_to_cpu((__force __le32)(x)) # define __mem_ioswabl(a, x) (x) -# define ioswabq(a, x) le64_to_cpu(x) +# define ioswabq(a, x) le64_to_cpu((__force __le64)(x)) # define __mem_ioswabq(a, x) (x) #else @@ -41,11 +41,11 @@ # define ioswabb(a, x) (x) # define __mem_ioswabb(a, x) (x) # define ioswabw(a, x) (x) -# define __mem_ioswabw(a, x) cpu_to_le16(x) +# define __mem_ioswabw(a, x) ((__force u16)cpu_to_le16(x)) # define ioswabl(a, x) (x) -# define __mem_ioswabl(a, x) cpu_to_le32(x) +# define __mem_ioswabl(a, x) ((__force u32)cpu_to_le32(x)) # define ioswabq(a, x) (x) -# define __mem_ioswabq(a, x) cpu_to_le64(x) +# define __mem_ioswabq(a, x) ((__force u64)cpu_to_le64(x)) #endif diff --git a/arch/mips/include/asm/mach-ip27/mangle-port.h b/arch/mips/include/asm/mach-ip27/mangle-port.h index 27c56efa519f..f71c38bbfc2f 100644 --- a/arch/mips/include/asm/mach-ip27/mangle-port.h +++ b/arch/mips/include/asm/mach-ip27/mangle-port.h @@ -16,10 +16,10 @@ # define ioswabb(a, x) (x) # define __mem_ioswabb(a, x) (x) # define ioswabw(a, x) (x) -# define __mem_ioswabw(a, x) cpu_to_le16(x) +# define __mem_ioswabw(a, x) ((__force u16)cpu_to_le16(x)) # define ioswabl(a, x) (x) -# define __mem_ioswabl(a, x) cpu_to_le32(x) +# define __mem_ioswabl(a, x) ((__force u32)cpu_to_le32(x)) # define ioswabq(a, x) (x) -# define __mem_ioswabq(a, x) cpu_to_le64(x) +# define __mem_ioswabq(a, x) ((__force u64)cpu_to_le64(x)) #endif /* __ASM_MACH_IP27_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-ip30/mangle-port.h b/arch/mips/include/asm/mach-ip30/mangle-port.h index f3e1262a2d5e..439c6a601830 100644 --- a/arch/mips/include/asm/mach-ip30/mangle-port.h +++ b/arch/mips/include/asm/mach-ip30/mangle-port.h @@ -13,10 +13,10 @@ #define ioswabb(a, x) (x) #define __mem_ioswabb(a, x) (x) #define ioswabw(a, x) (x) -#define __mem_ioswabw(a, x) cpu_to_le16(x) +#define __mem_ioswabw(a, x) ((__force u16)cpu_to_le16(x)) #define ioswabl(a, x) (x) -#define __mem_ioswabl(a, x) cpu_to_le32(x) +#define __mem_ioswabl(a, x) ((__force u32)cpu_to_le32(x)) #define ioswabq(a, x) (x) -#define __mem_ioswabq(a, x) cpu_to_le64(x) +#define __mem_ioswabq(a, x) ((__force u64)cpu_to_le64(x)) #endif /* __ASM_MACH_IP30_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-ip32/mangle-port.h b/arch/mips/include/asm/mach-ip32/mangle-port.h index c5ef72ccb0d5..4bc3d20e8293 100644 --- a/arch/mips/include/asm/mach-ip32/mangle-port.h +++ b/arch/mips/include/asm/mach-ip32/mangle-port.h @@ -17,10 +17,10 @@ # define ioswabb(a, x) (x) # define __mem_ioswabb(a, x) (x) # define ioswabw(a, x) (x) -# define __mem_ioswabw(a, x) cpu_to_le16(x) +# define __mem_ioswabw(a, x) ((__force u16)cpu_to_le16(x)) # define ioswabl(a, x) (x) -# define __mem_ioswabl(a, x) cpu_to_le32(x) +# define __mem_ioswabl(a, x) ((__force u32)cpu_to_le32(x)) # define ioswabq(a, x) (x) -# define __mem_ioswabq(a, x) cpu_to_le64(x) +# define __mem_ioswabq(a, x) ((__force u64)cpu_to_le64(x)) #endif /* __ASM_MACH_IP32_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-tx39xx/mangle-port.h b/arch/mips/include/asm/mach-tx39xx/mangle-port.h index ab7a70bd895e..95be459950f7 100644 --- a/arch/mips/include/asm/mach-tx39xx/mangle-port.h +++ b/arch/mips/include/asm/mach-tx39xx/mangle-port.h @@ -14,11 +14,11 @@ extern unsigned long (*__swizzle_addr_b)(unsigned long port); #define ioswabb(a, x) (x) #define __mem_ioswabb(a, x) (x) -#define ioswabw(a, x) le16_to_cpu(x) +#define ioswabw(a, x) le16_to_cpu((__force __le16)(x)) #define __mem_ioswabw(a, x) (x) -#define ioswabl(a, x) le32_to_cpu(x) +#define ioswabl(a, x) le32_to_cpu((__force __le32)(x)) #define __mem_ioswabl(a, x) (x) -#define ioswabq(a, x) le64_to_cpu(x) +#define ioswabq(a, x) le64_to_cpu((__force __le64)(x)) #define __mem_ioswabq(a, x) (x) #endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-tx49xx/mangle-port.h b/arch/mips/include/asm/mach-tx49xx/mangle-port.h index e061ef38fb5f..98c7abf4484a 100644 --- a/arch/mips/include/asm/mach-tx49xx/mangle-port.h +++ b/arch/mips/include/asm/mach-tx49xx/mangle-port.h @@ -16,12 +16,12 @@ extern u16 (*ioswabw)(volatile u16 *a, u16 x); extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x); #else -#define ioswabw(a, x) le16_to_cpu(x) +#define ioswabw(a, x) le16_to_cpu((__force __le16)(x)) #define __mem_ioswabw(a, x) (x) #endif -#define ioswabl(a, x) le32_to_cpu(x) +#define ioswabl(a, x) le32_to_cpu((__force __le32)(x)) #define __mem_ioswabl(a, x) (x) -#define ioswabq(a, x) le64_to_cpu(x) +#define ioswabq(a, x) le64_to_cpu((__force __le64)(x)) #define __mem_ioswabq(a, x) (x) #endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */ From patchwork Sat Jun 20 09:35:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Lobakin X-Patchwork-Id: 11615847 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7865F1746 for ; Sat, 20 Jun 2020 09:35:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 50A3B21582 for ; Sat, 20 Jun 2020 09:35:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="DTzrTbxZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727873AbgFTJfN (ORCPT ); Sat, 20 Jun 2020 05:35:13 -0400 Received: from mail-40136.protonmail.ch ([185.70.40.136]:56248 "EHLO mail-40136.protonmail.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726533AbgFTJfN (ORCPT ); Sat, 20 Jun 2020 05:35:13 -0400 Date: Sat, 20 Jun 2020 09:35:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail; t=1592645711; bh=ZqCBGivQpOR7bWQOuKEUf/s+T102VDiFA/V/fTLFZqc=; h=Date:To:From:Cc:Reply-To:Subject:In-Reply-To:References:From; b=DTzrTbxZrXttoZLXPKtH8AZoe5YO3WXyoqCLvHbdez2+t565T/Lerh1pRuOpcAicl dN7Z3iUCq8Figxs+3Fy917O08s5P3fzo56FUgsPf5Vn7SM3E0PeK2fVFYQSLTv3z0E mhXIceiqbwYrdsbtgR9BDoExCrJl4OHiV49wH3of+5YrB9ejbIHW75CgL9a3L+HOTQ a/IX+yb7G6/CDg9uyl48vNFxC64jo8/CwI8j2wDOAnPC3af6QWVgACKp7/UFt3X6yq bBeclz7JT1yB5tW59NbaOyXSL2utlZBcC7BZBFJbPq7l/FpmpUxbpTFUoL2lshYJRj IFNKA8M+uYmyg== To: Thomas Bogendoerfer From: Alexander Lobakin Cc: Alexandre Belloni , Paul Burton , Alexander Lobakin , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Reply-To: Alexander Lobakin Subject: [PATCH mips-next 3/3] MIPS: checksum: fix sparse flooding on asm/checksum.h Message-ID: In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-1.2 required=7.0 tests=ALL_TRUSTED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF shortcircuit=no autolearn=disabled version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on mail.protonmail.ch Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org csum_fold() in MIPS' asm/checksum.h is another source of sparse flooding when building different networking source code. The thing is that only half of __wsum <--> u32 casts inside the funtion is forced, which is insufficient. Add all necessary forced typecasting to stop floods and simplify actual bug hunting. Signed-off-by: Alexander Lobakin --- arch/mips/include/asm/checksum.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/checksum.h b/arch/mips/include/asm/checksum.h index dcebaaf8c862..181f7d14efb9 100644 --- a/arch/mips/include/asm/checksum.h +++ b/arch/mips/include/asm/checksum.h @@ -113,9 +113,9 @@ static inline __sum16 csum_fold(__wsum csum) u32 sum = (__force u32)csum; sum += (sum << 16); - csum = (sum < csum); + csum = (__force __wsum)(sum < (__force u32)csum); sum >>= 16; - sum += csum; + sum += (__force u32)csum; return (__force __sum16)~sum; }