From patchwork Sat Jun 20 14:46:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616007 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8B00514B7 for ; Sat, 20 Jun 2020 14:47:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6D0DB23BDD for ; Sat, 20 Jun 2020 14:47:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="P2+3b3ax" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728256AbgFTOr7 (ORCPT ); Sat, 20 Jun 2020 10:47:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728217AbgFTOr4 (ORCPT ); Sat, 20 Jun 2020 10:47:56 -0400 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3746C06174E; Sat, 20 Jun 2020 07:47:55 -0700 (PDT) Received: by mail-wm1-x341.google.com with SMTP id p19so951308wmg.1; Sat, 20 Jun 2020 07:47:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DCG0ql+6iUBjTSaUb3iHAe/NIrTHP1VLdsVQ8Ju6DOs=; b=P2+3b3axWG/S/fjGIYsYAaPdVg3QP/NlOTEPRydXd3FNpLSyJUlsAQDBw9s0MW8Brw kP1K3DRkrGbhtyEtXDVcLyfKbFQZ+UDCFvTDyAY0KISNkUTX5RxpM1V0MRsOVfO2ELoH STuclzSAAhzMp5vXLK7k161vvOnhITnbv0DanYPtG6IeYQQ5+GSYuDY0THjA4h2NWaxj 3gr9DdoBkbKDa3sIyEV0G5FkkUhng78A2OJaf1L21paviwIQxhHwTDZQ6HjW55OT+Ni4 Xc0r13sdJ+FV68Y/igICO8OhefNrpu2/YXVvFv22X4aVT7U6LdwkfAheyvAq2h+Gz05p bt8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DCG0ql+6iUBjTSaUb3iHAe/NIrTHP1VLdsVQ8Ju6DOs=; b=EwaAVk0jwBrc1knvKKEAhwprCWmlmIpO4rfsXUnGr2IzTbHP/3Z3t4kDzYXidqOV2y /zwDXkdNFyXZCZsRDvyklA7y4VZmh1/psMefxzKbDg5OBb3OJWDrre36Y6kcMZa+hXnd qa5Tnz1Li+QNbg1Ufl3qjNr0PNQSSr6tqVoxEjRC7hjNwvUpbuNojxrmUfdd9o4WD7hd 2KJpJhxayyLpxmxjcTF0ZVjHpQRcaJ0qw28mQDNSVnuZOUCApbFMjN6FN6fXT6yOy2vG C88+n5cjIoK0wez1m+rSUFilLNRy5ijSb3lv6JnKk8gzK+9qJV6LuXu7Ng1PgqoSs6s2 qgiQ== X-Gm-Message-State: AOAM533bJhn64MxjdER/XZfj2+jpfVB7zfKX6e8O4YUhGdYkq3yNME+5 SeLXoFxXUsK+h6/2MA+5O5U= X-Google-Smtp-Source: ABdhPJx8xESk/Dr1cADTllfCQmttACysPX0T/qpnwjIwQaBzpUaYwpf/xHGKXvtU08ISEaaTNDmOCA== X-Received: by 2002:a1c:4e08:: with SMTP id g8mr2294425wmh.24.1592664474670; Sat, 20 Jun 2020 07:47:54 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.47.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:47:54 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/21] clk: qcom: smd: Add support for MSM8992/4 rpm clocks Date: Sat, 20 Jun 2020 16:46:17 +0200 Message-Id: <20200620144639.335093-2-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add rpm smd clocks, PMIC and bus clocks which are required on MSM8992, MSM8994 (and APQ variants) for clients to vote on. Signed-off-by: Konrad Dybcio --- .../devicetree/bindings/clock/qcom,rpmcc.txt | 2 + drivers/clk/qcom/clk-smd-rpm.c | 172 ++++++++++++++++++ include/dt-bindings/clock/qcom,rpmcc.h | 4 + 3 files changed, 178 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt index 90a1349bc713..f864ea69a590 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt @@ -17,6 +17,8 @@ Required properties : "qcom,rpmcc-msm8976", "qcom,rpmcc" "qcom,rpmcc-apq8064", "qcom,rpmcc" "qcom,rpmcc-ipq806x", "qcom,rpmcc" + "qcom,rpmcc-msm8992", "qcom,rpmcc" + "qcom,rpmcc-msm8994", "qcom,rpmcc" "qcom,rpmcc-msm8996", "qcom,rpmcc" "qcom,rpmcc-msm8998", "qcom,rpmcc" "qcom,rpmcc-qcs404", "qcom,rpmcc" diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 52f63ad787ba..429517340148 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -574,6 +574,176 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8976 = { .num_clks = ARRAY_SIZE(msm8976_clks), }; +/* msm8992 */ +DEFINE_CLK_SMD_RPM(msm8992, pnoc_clk, pnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8992, ocmemgx_clk, ocmemgx_a_clk, QCOM_SMD_RPM_MEM_CLK, 2); +DEFINE_CLK_SMD_RPM(msm8992, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8992, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2); +DEFINE_CLK_SMD_RPM(msm8992, gfx3d_clk_src, gfx3d_a_clk_src, QCOM_SMD_RPM_MEM_CLK, 1); +DEFINE_CLK_SMD_RPM(msm8992, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, bb_clk1, bb_clk1_a, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8992, bb_clk1_pin, bb_clk1_a_pin, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, bb_clk2, bb_clk2_a, 2); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8992, bb_clk2_pin, bb_clk2_a_pin, 2); + +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk1, div_clk1_a, 11); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk2, div_clk2_a, 12); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13); +DEFINE_CLK_SMD_RPM(msm8992, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, ln_bb_clk, ln_bb_a_clk, 8); +DEFINE_CLK_SMD_RPM(msm8992, mmssnoc_ahb_clk, mmssnoc_ahb_a_clk, + QCOM_SMD_RPM_BUS_CLK, 3); +DEFINE_CLK_SMD_RPM_QDSS(msm8992, qdss_clk, qdss_a_clk, + QCOM_SMD_RPM_MISC_CLK, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, rf_clk1, rf_clk1_a, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, rf_clk2, rf_clk2_a, 5); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8992, rf_clk1_pin, rf_clk1_a_pin, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8992, rf_clk2_pin, rf_clk2_a_pin, 5); + +DEFINE_CLK_SMD_RPM(msm8992, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8992, ce2_clk, ce2_a_clk, QCOM_SMD_RPM_CE_CLK, 1); + +static struct clk_smd_rpm *msm8992_clks[] = { + [RPM_SMD_PNOC_CLK] = &msm8992_pnoc_clk, + [RPM_SMD_PNOC_A_CLK] = &msm8992_pnoc_a_clk, + [RPM_SMD_OCMEMGX_CLK] = &msm8992_ocmemgx_clk, + [RPM_SMD_OCMEMGX_A_CLK] = &msm8992_ocmemgx_a_clk, + [RPM_SMD_BIMC_CLK] = &msm8992_bimc_clk, + [RPM_SMD_BIMC_A_CLK] = &msm8992_bimc_a_clk, + [RPM_SMD_CNOC_CLK] = &msm8992_cnoc_clk, + [RPM_SMD_CNOC_A_CLK] = &msm8992_cnoc_a_clk, + [RPM_SMD_GFX3D_CLK_SRC] = &msm8992_gfx3d_clk_src, + [RPM_SMD_GFX3D_A_CLK_SRC] = &msm8992_gfx3d_a_clk_src, + [RPM_SMD_SNOC_CLK] = &msm8992_snoc_clk, + [RPM_SMD_SNOC_A_CLK] = &msm8992_snoc_a_clk, + [RPM_SMD_BB_CLK1] = &msm8992_bb_clk1, + [RPM_SMD_BB_CLK1_A] = &msm8992_bb_clk1_a, + [RPM_SMD_BB_CLK1_PIN] = &msm8992_bb_clk1_pin, + [RPM_SMD_BB_CLK1_A_PIN] = &msm8992_bb_clk1_a_pin, + [RPM_SMD_BB_CLK2] = &msm8992_bb_clk2, + [RPM_SMD_BB_CLK2_A] = &msm8992_bb_clk2_a, + [RPM_SMD_BB_CLK2_PIN] = &msm8992_bb_clk2_pin, + [RPM_SMD_BB_CLK2_A_PIN] = &msm8992_bb_clk2_a_pin, + [RPM_SMD_DIV_CLK1] = &msm8992_div_clk1, + [RPM_SMD_DIV_A_CLK1] = &msm8992_div_clk1_a, + [RPM_SMD_DIV_CLK2] = &msm8992_div_clk2, + [RPM_SMD_DIV_A_CLK2] = &msm8992_div_clk2_a, + [RPM_SMD_DIV_CLK3] = &msm8992_div_clk3, + [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a, + [RPM_SMD_IPA_CLK] = &msm8992_ipa_clk, + [RPM_SMD_IPA_A_CLK] = &msm8992_ipa_a_clk, + [RPM_SMD_LN_BB_CLK] = &msm8992_ln_bb_clk, + [RPM_SMD_LN_BB_A_CLK] = &msm8992_ln_bb_a_clk, + [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8992_mmssnoc_ahb_clk, + [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8992_mmssnoc_ahb_a_clk, + [RPM_SMD_QDSS_CLK] = &msm8992_qdss_clk, + [RPM_SMD_QDSS_A_CLK] = &msm8992_qdss_a_clk, + [RPM_SMD_RF_CLK1] = &msm8992_rf_clk1, + [RPM_SMD_RF_CLK1_A] = &msm8992_rf_clk1_a, + [RPM_SMD_RF_CLK2] = &msm8992_rf_clk2, + [RPM_SMD_RF_CLK2_A] = &msm8992_rf_clk2_a, + [RPM_SMD_RF_CLK1_PIN] = &msm8992_rf_clk1_pin, + [RPM_SMD_RF_CLK1_A_PIN] = &msm8992_rf_clk1_a_pin, + [RPM_SMD_RF_CLK2_PIN] = &msm8992_rf_clk2_pin, + [RPM_SMD_RF_CLK2_A_PIN] = &msm8992_rf_clk2_a_pin, + [RPM_SMD_CE1_CLK] = &msm8992_ce1_clk, + [RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk, + [RPM_SMD_CE2_CLK] = &msm8992_ce2_clk, + [RPM_SMD_CE2_A_CLK] = &msm8992_ce2_a_clk, +}; + +static const struct rpm_smd_clk_desc rpm_clk_msm8992 = { + .clks = msm8992_clks, + .num_clks = ARRAY_SIZE(msm8992_clks), +}; + +/* msm8994 */ +DEFINE_CLK_SMD_RPM(msm8994, pnoc_clk, pnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8994, ocmemgx_clk, ocmemgx_a_clk, QCOM_SMD_RPM_MEM_CLK, 2); +DEFINE_CLK_SMD_RPM(msm8994, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8994, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2); +DEFINE_CLK_SMD_RPM(msm8994, gfx3d_clk_src, gfx3d_a_clk_src, QCOM_SMD_RPM_MEM_CLK, 1); +DEFINE_CLK_SMD_RPM(msm8994, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8994, bb_clk1, bb_clk1_a, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8994, bb_clk1_pin, bb_clk1_a_pin, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8994, bb_clk2, bb_clk2_a, 2); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8994, bb_clk2_pin, bb_clk2_a_pin, 2); + +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8994, div_clk1, div_clk1_a, 11); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8994, div_clk2, div_clk2_a, 12); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8994, div_clk3, div_clk3_a, 13); +DEFINE_CLK_SMD_RPM(msm8994, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8994, ln_bb_clk, ln_bb_a_clk, 8); +DEFINE_CLK_SMD_RPM(msm8994, mmssnoc_ahb_clk, mmssnoc_ahb_a_clk, + QCOM_SMD_RPM_BUS_CLK, 3); +DEFINE_CLK_SMD_RPM_QDSS(msm8994, qdss_clk, qdss_a_clk, + QCOM_SMD_RPM_MISC_CLK, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8994, rf_clk1, rf_clk1_a, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8994, rf_clk2, rf_clk2_a, 5); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8994, rf_clk1_pin, rf_clk1_a_pin, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8994, rf_clk2_pin, rf_clk2_a_pin, 5); + +DEFINE_CLK_SMD_RPM(msm8994, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0); +DEFINE_CLK_SMD_RPM(msm8994, ce2_clk, ce2_a_clk, QCOM_SMD_RPM_CE_CLK, 1); +DEFINE_CLK_SMD_RPM(msm8994, ce3_clk, ce3_a_clk, QCOM_SMD_RPM_CE_CLK, 2); + +static struct clk_smd_rpm *msm8994_clks[] = { + [RPM_SMD_PNOC_CLK] = &msm8994_pnoc_clk, + [RPM_SMD_PNOC_A_CLK] = &msm8994_pnoc_a_clk, + [RPM_SMD_OCMEMGX_CLK] = &msm8994_ocmemgx_clk, + [RPM_SMD_OCMEMGX_A_CLK] = &msm8994_ocmemgx_a_clk, + [RPM_SMD_BIMC_CLK] = &msm8994_bimc_clk, + [RPM_SMD_BIMC_A_CLK] = &msm8994_bimc_a_clk, + [RPM_SMD_CNOC_CLK] = &msm8994_cnoc_clk, + [RPM_SMD_CNOC_A_CLK] = &msm8994_cnoc_a_clk, + [RPM_SMD_GFX3D_CLK_SRC] = &msm8994_gfx3d_clk_src, + [RPM_SMD_GFX3D_A_CLK_SRC] = &msm8994_gfx3d_a_clk_src, + [RPM_SMD_SNOC_CLK] = &msm8994_snoc_clk, + [RPM_SMD_SNOC_A_CLK] = &msm8994_snoc_a_clk, + [RPM_SMD_BB_CLK1] = &msm8994_bb_clk1, + [RPM_SMD_BB_CLK1_A] = &msm8994_bb_clk1_a, + [RPM_SMD_BB_CLK1_PIN] = &msm8994_bb_clk1_pin, + [RPM_SMD_BB_CLK1_A_PIN] = &msm8994_bb_clk1_a_pin, + [RPM_SMD_BB_CLK2] = &msm8994_bb_clk2, + [RPM_SMD_BB_CLK2_A] = &msm8994_bb_clk2_a, + [RPM_SMD_BB_CLK2_PIN] = &msm8994_bb_clk2_pin, + [RPM_SMD_BB_CLK2_A_PIN] = &msm8994_bb_clk2_a_pin, + [RPM_SMD_DIV_CLK1] = &msm8994_div_clk1, + [RPM_SMD_DIV_A_CLK1] = &msm8994_div_clk1_a, + [RPM_SMD_DIV_CLK2] = &msm8994_div_clk2, + [RPM_SMD_DIV_A_CLK2] = &msm8994_div_clk2_a, + [RPM_SMD_DIV_CLK3] = &msm8994_div_clk3, + [RPM_SMD_DIV_A_CLK3] = &msm8994_div_clk3_a, + [RPM_SMD_IPA_CLK] = &msm8994_ipa_clk, + [RPM_SMD_IPA_A_CLK] = &msm8994_ipa_a_clk, + [RPM_SMD_LN_BB_CLK] = &msm8994_ln_bb_clk, + [RPM_SMD_LN_BB_A_CLK] = &msm8994_ln_bb_a_clk, + [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8994_mmssnoc_ahb_clk, + [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8994_mmssnoc_ahb_a_clk, + [RPM_SMD_QDSS_CLK] = &msm8994_qdss_clk, + [RPM_SMD_QDSS_A_CLK] = &msm8994_qdss_a_clk, + [RPM_SMD_RF_CLK1] = &msm8994_rf_clk1, + [RPM_SMD_RF_CLK1_A] = &msm8994_rf_clk1_a, + [RPM_SMD_RF_CLK2] = &msm8994_rf_clk2, + [RPM_SMD_RF_CLK2_A] = &msm8994_rf_clk2_a, + [RPM_SMD_RF_CLK1_PIN] = &msm8994_rf_clk1_pin, + [RPM_SMD_RF_CLK1_A_PIN] = &msm8994_rf_clk1_a_pin, + [RPM_SMD_RF_CLK2_PIN] = &msm8994_rf_clk2_pin, + [RPM_SMD_RF_CLK2_A_PIN] = &msm8994_rf_clk2_a_pin, + [RPM_SMD_CE1_CLK] = &msm8994_ce1_clk, + [RPM_SMD_CE1_A_CLK] = &msm8994_ce1_a_clk, + [RPM_SMD_CE2_CLK] = &msm8994_ce2_clk, + [RPM_SMD_CE2_A_CLK] = &msm8994_ce2_a_clk, + [RPM_SMD_CE3_CLK] = &msm8994_ce3_clk, + [RPM_SMD_CE3_A_CLK] = &msm8994_ce3_a_clk, +}; + +static const struct rpm_smd_clk_desc rpm_clk_msm8994 = { + .clks = msm8994_clks, + .num_clks = ARRAY_SIZE(msm8994_clks), +}; + + /* msm8996 */ DEFINE_CLK_SMD_RPM(msm8996, pcnoc_clk, pcnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0); DEFINE_CLK_SMD_RPM(msm8996, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); @@ -770,6 +940,8 @@ static const struct of_device_id rpm_smd_clk_match_table[] = { { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 }, { .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 }, { .compatible = "qcom,rpmcc-msm8976", .data = &rpm_clk_msm8976 }, + { .compatible = "qcom,rpmcc-msm8992", .data = &rpm_clk_msm8992 }, + { .compatible = "qcom,rpmcc-msm8994", .data = &rpm_clk_msm8994 }, { .compatible = "qcom,rpmcc-msm8996", .data = &rpm_clk_msm8996 }, { .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 }, { .compatible = "qcom,rpmcc-qcs404", .data = &rpm_clk_qcs404 }, diff --git a/include/dt-bindings/clock/qcom,rpmcc.h b/include/dt-bindings/clock/qcom,rpmcc.h index ae74c43c485d..9cbf17027afd 100644 --- a/include/dt-bindings/clock/qcom,rpmcc.h +++ b/include/dt-bindings/clock/qcom,rpmcc.h @@ -133,5 +133,9 @@ #define RPM_SMD_RF_CLK3_A 87 #define RPM_SMD_RF_CLK3_PIN 88 #define RPM_SMD_RF_CLK3_A_PIN 89 +#define RPM_SMD_CE2_CLK 90 +#define RPM_SMD_CE2_A_CLK 91 +#define RPM_SMD_CE3_CLK 92 +#define RPM_SMD_CE3_A_CLK 93 #endif From patchwork Sat Jun 20 14:46:18 2020 Content-Type: text/plain; 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[83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.47.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:47:57 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/21] arm64: dts: qcom: msm8994: Add SPMI PMIC arbiter device Date: Sat, 20 Jun 2020 16:46:18 +0200 Message-Id: <20200620144639.335093-3-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index b1c2d7d6a0f2..f10c8b34bd08 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -149,6 +149,22 @@ blsp1_uart2: serial@f991e000 { <&clock_gcc GCC_BLSP1_AHB_CLK>; }; + spmi_bus: qcom,spmi@fc4c0000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0xfc4cf000 0x1000>, + <0xfc4cb000 0x1000>, + <0xfc4ca000 0x1000>; + reg-names = "core", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts = ; + qcom,ee = <0>; + qcom,channel = <0>; + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + }; + tcsr_mutex_regs: syscon@fd484000 { compatible = "syscon"; reg = <0xfd484000 0x2000>; From patchwork Sat Jun 20 14:46:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616087 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BAF4114E3 for ; Sat, 20 Jun 2020 14:49:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A192B23C3F for ; Sat, 20 Jun 2020 14:49:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Zy74E0+6" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728305AbgFTOtr (ORCPT ); Sat, 20 Jun 2020 10:49:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728217AbgFTOsD (ORCPT ); Sat, 20 Jun 2020 10:48:03 -0400 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B7D47C0613EE; Sat, 20 Jun 2020 07:48:02 -0700 (PDT) Received: by mail-wr1-x443.google.com with SMTP id g18so3285814wrm.2; Sat, 20 Jun 2020 07:48:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SrlkwV285XuTdyl/PIHuoBUtm4YgGtLa2zYtiTLuxck=; b=Zy74E0+6f7pH5/r0ZNokuvL9FU2uTCe1MiNprcXQXDz79+AlECWmpNy7JxNaM5UTJZ jElyasxE4Pov/dzIvah9UVTLGRNQli0aPKRBjsxkwj3gSnjC+3rxTZ7JKgdY6ygCH9T/ tVWBxDX8Xv0QMK3pzc7hpw4d+s9TVXGOgNRLRDF1WtCjBVsi+acJrCiBqar4gtLueb2A o+AtTwrHWQDYiP+ubvA3SYO+wxLEJ+slRuIegtSGWitmA8jN7tNfWZNEUEUmDJnq6gVp knZaAeTIZJYWuF+9XAsuyvxBIXtt5ewKr2ISAOOTtpBksgQPwDGRVvnj/61H+GA8hDgF CLZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SrlkwV285XuTdyl/PIHuoBUtm4YgGtLa2zYtiTLuxck=; b=PPToyj5iOccfS8N6ZN36EVuzn76LEOnzCvbmz+uKjK8jXXJDXobsDg+GdZPMpkxBDg TaWgkTVxYNRwwEAA0SGwcn/fb6UWcPMjzyYNQoc6vrJHhCWALfqrAccLAmTAXkIkbPy4 45yMJDxndZPtW6DxFE2/FOdvF5+H2ulhiFnjYyp7yVj9vCeshew3mBApV/BKoYBjud05 TEIdU+uSCDpavAX3SGiD97lFlexh3oQGrz362fiPkuHTbMBCJ7ejgu7rmOPhqCoI4tt9 Dp5s7DRDmruy56oMEDEIuXf3r2JC0k1Xrzhg8G5ckzxokEf456yokFdm3ux3LKGoDPcr YbQA== X-Gm-Message-State: AOAM530UeKCl8y7SlZ1snMAh+gqbVgy1Kp5TQAxgrGGYdVTQR9dLjuat AXBpQ0hc4+b3FSlPxA7yLMI= X-Google-Smtp-Source: ABdhPJx0v7q+wiETpU3p5StWy8f5tDVwmoyKyi6TR9jiyqY96GXfs+mks17mnzD7dtX+pfWd6WY/xg== X-Received: by 2002:adf:e3c9:: with SMTP id k9mr1183722wrm.379.1592664481536; Sat, 20 Jun 2020 07:48:01 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:01 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/21] arm64: dts: qcom: msm8994: Add a proper CPU map Date: Sat, 20 Jun 2020 16:46:19 +0200 Message-Id: <20200620144639.335093-4-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add a proper CPU map to enable the use of all 8 cores. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 100 ++++++++++++++++++++++++-- 1 file changed, 96 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index f10c8b34bd08..ebb6a0630604 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -20,26 +20,118 @@ / { chosen { }; cpus { - #address-cells = <1>; + #address-cells = <2>; #size-cells = <0>; + cpu-map { cluster0 { core0 { cpu = <&CPU0>; }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU4>; + }; + + core1 { + cpu = <&CPU5>; + }; + + core2 { + cpu = <&CPU6>; + }; + + core3 { + cpu = <&CPU7>; + }; }; }; CPU0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; - reg = <0x0>; + reg = <0x0 0x0>; next-level-cache = <&L2_0>; + enable-method = "psci"; L2_0: l2-cache { - compatible = "cache"; - cache-level = <2>; + compatible = "cache"; + cache-level = <2>; }; }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CPU4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x100>; + next-level-cache = <&L2_1>; + enable-method = "psci"; + L2_1: l2-cache { + compatible = "cache"; + cache-level = <2>; + }; + }; + + CPU5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x101>; + next-level-cache = <&L2_1>; + enable-method = "psci"; + }; + + CPU6: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x101>; + next-level-cache = <&L2_1>; + enable-method = "psci"; + }; + + CPU7: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x101>; + next-level-cache = <&L2_1>; + enable-method = "psci"; + }; }; timer { From patchwork Sat Jun 20 14:46:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616021 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B593060D for ; Sat, 20 Jun 2020 14:48:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9D6D723BEE for ; Sat, 20 Jun 2020 14:48:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kxaFFEHA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728306AbgFTOsI (ORCPT ); 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[83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:04 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/21] arm64: dts: qcom: msm8994: Wrap clock nodes into clocks {} Date: Sat, 20 Jun 2020 16:46:20 +0200 Message-Id: <20200620144639.335093-5-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Wrap xo_board and sleep_clk into clocks {} to follow the style used in other device trees. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index ebb6a0630604..0e8cf7e3dd85 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -277,16 +277,18 @@ memory { reg = <0 0 0 0>; }; - xo_board: xo_board { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; - }; + clocks { + xo_board: xo_board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + }; - sleep_clk: sleep_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; + sleep_clk: sleep_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; reserved-memory { From patchwork Sat Jun 20 14:46:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616009 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 174E314B7 for ; Sat, 20 Jun 2020 14:48:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F163723BE2 for ; Sat, 20 Jun 2020 14:48:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EzaSBXNB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728326AbgFTOsL (ORCPT ); Sat, 20 Jun 2020 10:48:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728210AbgFTOsK (ORCPT ); Sat, 20 Jun 2020 10:48:10 -0400 Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A59B2C06174E; Sat, 20 Jun 2020 07:48:09 -0700 (PDT) Received: by mail-wr1-x444.google.com with SMTP id l10so12342521wrr.10; Sat, 20 Jun 2020 07:48:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gc0U5BY5xfcdQl/eC7NgZpP6UnL7LldYy3w5rHojCg4=; b=EzaSBXNBnxFRM6fuFA81/CVP4RUExXAKANnj8fH0ME9BCKMj6aR+oEsIEWKLADI07H xS7nTzJsYvK7MWKNYLggwY3cWR75kF5K+vAOjgYHGtkptdj52b0MCS2+ShfBKjLvlphU 5dzXAE34siSY6Hy1WZZthzK3tk1MNQSMsMKSbq0kfcuL2bxyc4qbhGr7ldBzmJFSfGVM C4GCZ+jGaeuk4NldIiWnwuo2K4KwqGv2wkdmQM1MDc6iqC4gpnBitpSsW5+0wB47LdBD pJhV1cXnvl9bTIWFzVPCsEMKad+nIH+bed78x+2CUSln/zUJm/LhER2HPmLvO82CzoIn TM/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gc0U5BY5xfcdQl/eC7NgZpP6UnL7LldYy3w5rHojCg4=; b=G9NJSxU/8jX5bYnYvVawMGvkPAjSZwiGkW9NEbIvl8VMGSmmkMvylOungHGNBvWS5Y BdkzHx8i9DtzvrlZC9mukGqb8SY3EMh5RMovuItgR5Vvh7e2YRymxrtVqxxxh3l9mjV+ VaRuuorhN98Lh8VCIhcuMaofjliXM6UuhU79fEzrsWviHh500sExnqwfG1+ozWLcthdz n1vA2VS/S10Sqh+vJF0vMHeBul7F7gJQJdYyynlbdzEcILKW5o2Ln60pfrUYi05lAX8M yV031hRCyGy7KXrq6Yk1Hy9VdLCiPYcc1n7DHTNExb4QJLvJviTPLGAMv+iYP6M1Wv5P DwiA== X-Gm-Message-State: AOAM532YtIYrzFjYNJHJY2rFAiwclT6mgrRaa1uJ2gsFRmy0oQXoQDQn nGTJ7pdC4rdMa9kf/Bb9TXmx0PDVLh0= X-Google-Smtp-Source: ABdhPJwLjTvuB811cO0MxzNKNmFnd9+h9sS47O5p7YfQzAjHcqoe6HNS9NlEowLN4/yHzUthrYubOA== X-Received: by 2002:adf:e50a:: with SMTP id j10mr10142108wrm.71.1592664488324; Sat, 20 Jun 2020 07:48:08 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:07 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/21] arm64: dts: qcom: msm8994: Rename the smem node and remove its unit address Date: Sat, 20 Jun 2020 16:46:21 +0200 Message-Id: <20200620144639.335093-6-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Change the way smem node is described to match other upstream device trees. The previous style was used in downstream kernels. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 0e8cf7e3dd85..5206605d3bad 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -308,7 +308,7 @@ tcsr_mutex: hwlock { #hwlock-cells = <1>; }; - qcom,smem@6a00000 { + smem { compatible = "qcom,smem"; memory-region = <&smem_mem>; hwlocks = <&tcsr_mutex 3>; From patchwork Sat Jun 20 14:46:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616017 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E7E9914B7 for ; Sat, 20 Jun 2020 14:48:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D07E823BEE for ; Sat, 20 Jun 2020 14:48:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cMnpiBxZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728341AbgFTOsP (ORCPT ); Sat, 20 Jun 2020 10:48:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728336AbgFTOsN (ORCPT ); Sat, 20 Jun 2020 10:48:13 -0400 Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0533EC06174E; Sat, 20 Jun 2020 07:48:13 -0700 (PDT) Received: by mail-wm1-x342.google.com with SMTP id r15so11580851wmh.5; Sat, 20 Jun 2020 07:48:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=97wbQO3HMusWpuHqKL79C/u+rKBTCTTZZ6SBIzBl9PE=; b=cMnpiBxZiDYDzw4uGKAoNZpkjuKVlc+D+GHXdon3uQV8Qoghompf9JQLyRN41iuqjR NcVInPRAxh7FdUp+p78swb6TrvaAQ9II9hvGmeMlL/VE23bILX6FelAm89u9dkv824jZ gk2AetPmd99Wym+1/IhCd0Y5EV5ijIAVNN7UsFMZpgw+yD4FwnCaHf00rImuwFFdOOF9 M97vPvoXQP+cSkc+KGk68y7F5FUAup0qvdAXRxaXDhg9B409F7+zCVvYrDAvFmWTSZPj ivbtAkKrUrH+NqvIJD2aHwfeClEqQ411nm9EfgsNzjh8tsuRoQ7OrDDM/UoK/WuhHbSl zTlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=97wbQO3HMusWpuHqKL79C/u+rKBTCTTZZ6SBIzBl9PE=; b=M9tjWyWEjZWaXz3cXhGdQPWkFbjk7Mdv29+EPuJxb7C4T3KhFSPIWjkg62g8VY2X0D IfxPJWJ70cZR8ihOaa1JbWyNpqYBPZWm4Re2C19mPdFFTVRl7gIL9oUPKEwGy427H6pY BcIfe04Sm4Z64soDeL2en5BmlKSdO+yiWy1WmNW1RSFGmbRJhnpStdlGMHq3hIr+yadE rUvaHa7wR/zpoyv3CvRAUu/7GOhNeEnEcXI4R6jxliGgEJ44smEu79eS21YQrU1C4GTW A9w9WpBhNKOHFZeT7oqEOucVQQkFYHwppr4VWzb4FBl5JezTlHwnk9NbQygCwaBAbseM RHng== X-Gm-Message-State: AOAM531Jzizx1R/oT2Y6nmCVvL/ErpoRudl20r5tHKtoFKtun0KNaTXi I4IqGD2WWo7zD+3HOPsrH+E= X-Google-Smtp-Source: ABdhPJxPPCZTcP1X8Ly2/ULSqMN+F6lM5HwtTB42vjEXiLjnqa4XOjODJwCK1xhMUn7E8hd62oeRDg== X-Received: by 2002:a1c:668b:: with SMTP id a133mr6490605wmc.10.1592664491798; Sat, 20 Jun 2020 07:48:11 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:11 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/21] arm64: dts: qcom: msm8994: Rename clock_gcc label to gcc Date: Sat, 20 Jun 2020 16:46:22 +0200 Message-Id: <20200620144639.335093-7-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Change the label to follow the style used in other device trees. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 5206605d3bad..0a6d637fbbba 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -237,8 +237,8 @@ blsp1_uart2: serial@f991e000 { interrupts = ; status = "disabled"; clock-names = "core", "iface"; - clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>, - <&clock_gcc GCC_BLSP1_AHB_CLK>; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; }; spmi_bus: qcom,spmi@fc4c0000 { @@ -262,7 +262,7 @@ tcsr_mutex_regs: syscon@fd484000 { reg = <0xfd484000 0x2000>; }; - clock_gcc: clock-controller@fc400000 { + gcc: clock-controller@fc400000 { compatible = "qcom,gcc-msm8994"; #clock-cells = <1>; #reset-cells = <1>; From patchwork Sat Jun 20 14:46:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616013 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CB63A14E3 for ; Sat, 20 Jun 2020 14:48:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AF35B23C30 for ; Sat, 20 Jun 2020 14:48:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="F5qP6dFh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728363AbgFTOsV (ORCPT ); Sat, 20 Jun 2020 10:48:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728348AbgFTOsQ (ORCPT ); Sat, 20 Jun 2020 10:48:16 -0400 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3DC8DC06174E; Sat, 20 Jun 2020 07:48:16 -0700 (PDT) Received: by mail-wm1-x341.google.com with SMTP id g10so10911863wmh.4; Sat, 20 Jun 2020 07:48:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5QBFLdNPnq+Qfa+k76IKoOZK33SWyXuGFD7NQgeZQzk=; b=F5qP6dFhmxwp+W/R/YGMI4Ae7wBgy5ztNWzGkNfpcDpS527jJyVPCkALByOxPk+ORI AUADGyNB1lynXwd3rqI8cnyBvapvlcv6oSj1swMv4RJKZIiqqwDpvEhYmGbAVgm+OZGA 6MCLczOEq0w205tBS0u2RZ2cT2+M/5CV+Xz/7ZHctSqz7MKmDV8+J0MvpM5AFF84s9CE vpkK8F7YH+Tv0Ji4lhOb45lRz+jPSIiEuWKPzPx3UfmP0gHfs/08uSWVqH2XlZeI/Sgq pIlnMd80LVOPef5LISYdznMA+nXcFnL+wo0LOaX7LLOQFJHZ/quJbeYdEkoziJwfcaIs ZDOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5QBFLdNPnq+Qfa+k76IKoOZK33SWyXuGFD7NQgeZQzk=; b=XfISIDmCPPtX+2ynQ4b//z7VT3PdtVSo5Ok0jxY1TKzCQaCW83yzRzovRjw2BIF83s bjrRChvSA6f9YFL6qMMzeqY6EDb55zb46crhxbKRkelQ7t0WSY/Zepuq9/4abw1tJ/AU Wigb90g01FKs3/U0joC087c+icKFNWAh3Anzy4mgruDfiNKm/XuXCP865PrXS9pxOB3U 4ExnYQ7OBW03oPJrzyARPocBVa8W80sThs0s3ELZEL/6SiKhQtJCqHDdS8uB2PQ6Glr+ Bk0A8Z39jrfyNYHqp3C7fWlb/Suxj8J8Vy/QMZdZy1WQ6k2fKXfyy+z76cCO8JvgsrdA WA5Q== X-Gm-Message-State: AOAM5317cmw6QQofoG+3lU7Wsbq+BUr6ocFSGu+rhgjPvzYEVzkFvB7L 0vIGC7wx09sA0FOSRmmEkF0= X-Google-Smtp-Source: ABdhPJy7140U3HXRbr7bMNKYjSf2UUwJaFxPG5rDtjrQKVmTtWryGCy7RTeF59XPpqftQO+Lhs71DQ== X-Received: by 2002:a1c:98cc:: with SMTP id a195mr8989696wme.89.1592664495042; Sat, 20 Jun 2020 07:48:15 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:14 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/21] arm64: dts: qcom: msm8994: Add apcs node Date: Sat, 20 Jun 2020 16:46:23 +0200 Message-Id: <20200620144639.335093-8-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add apcs node so that we can enable SMD RPM Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 0a6d637fbbba..8853559f755d 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -269,6 +269,11 @@ gcc: clock-controller@fc400000 { #power-domain-cells = <1>; reg = <0xfc400000 0x2000>; }; + + apcs: syscon@f900d000 { + compatible = "syscon"; + reg = <0xf900d000 0x2000>; + }; }; memory { From patchwork Sat Jun 20 14:46:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616023 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF56D60D for ; Sat, 20 Jun 2020 14:48:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A6CEE23BEC for ; Sat, 20 Jun 2020 14:48:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="L2MDQZW+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728379AbgFTOs3 (ORCPT ); Sat, 20 Jun 2020 10:48:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728336AbgFTOsU (ORCPT ); Sat, 20 Jun 2020 10:48:20 -0400 Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [IPv6:2a00:1450:4864:20::343]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DB92C06174E; Sat, 20 Jun 2020 07:48:19 -0700 (PDT) Received: by mail-wm1-x343.google.com with SMTP id f185so11596445wmf.3; Sat, 20 Jun 2020 07:48:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PSLEOK9fPCw4hWzP+JVNPy4yvTUndH25kPo0XCKTFOs=; b=L2MDQZW+LoBYVV+Jw08MZmX0aVHmdOCK6+wvfPeW+mfKVs1Fa4J59aLNI8nl4x9ZeU RDd+6J40MwgbvaaD3Op/Yb1VnTTHt814DHZbB4u07+KR+Co7S6f9ivm6cisy5qK+W/c3 OTuOZGfRB5qSfSRHk4gjvCWPDhlN7mBeYUc/kwYKXF3JmabOfAXnRr1R5i7Ji+dzlz4Q PT8U5LRDclMrpOjqoIsRndHk+RaC+2MAxA2NH9TDAL5bk+tgaNej5H4DKlk0wz/WbQfK j6F+/fzpcLGik2U7z53r8qbFbqm1Wyqo2I5hXPjJja4/x5wGGjNacBLF5Fjb5nbYnC9O TKZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PSLEOK9fPCw4hWzP+JVNPy4yvTUndH25kPo0XCKTFOs=; b=Tlt8w3pEchmKGt6D5zA9y1yGt241NEBy+gJ8eTOn9TlD5SJKXlLp5eIPlFA9ZTYnNP 1QARpCkc72JaxhuI9hUin3MzGtL6o9bNcoN3WBaxR+iL0pHH32ZE7caFmgFwMd3HEGlf lP93rGjGBMxFY95groRYubf00/YgRa+68W8CStrD8XYmhlboq2VYP0J5cgRePTqOnwMY BOxfP1+TKS3UEcm4GA20N6rgKgUb4HfvjP1NSfUvsOPxhMbrTPizEcba+AjhK7VeWkeQ LrpXsCrbSQRq47eMEOYBo17BGUvAjGSaWSzABMFnK7CoXqarwtDM7OiRKgoaZhkhPzRu abcA== X-Gm-Message-State: AOAM530ENBi5J/aL0c69Q4DFfaveBYcYJ5r3l7lhRHJZE5FOfNoIIVY3 PwVtGH9pJ0sWQvp8l1s7eWY= X-Google-Smtp-Source: ABdhPJw0cCQKipE56GoSUjaEegp9czLgVsWprul1TCDgo9Xlzobxs+x+JKzDuSfVTnjh8Fuqno/MQQ== X-Received: by 2002:a05:600c:210:: with SMTP id 16mr9626715wmi.185.1592664498431; Sat, 20 Jun 2020 07:48:18 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:18 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/21] arm64: dts: qcom: msm8994: Add pmu node Date: Sat, 20 Jun 2020 16:46:24 +0200 Message-Id: <20200620144639.335093-9-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add the CPU PMU to get perf support for hardware events. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 8853559f755d..adb1ebd15667 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -282,6 +282,11 @@ memory { reg = <0 0 0 0>; }; + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + }; + clocks { xo_board: xo_board { compatible = "fixed-clock"; From patchwork Sat Jun 20 14:46:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616073 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DBE2C14B7 for ; Sat, 20 Jun 2020 14:49:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C2C6A23CD5 for ; Sat, 20 Jun 2020 14:49:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="LIeBcIrJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728384AbgFTOs3 (ORCPT ); Sat, 20 Jun 2020 10:48:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728348AbgFTOsZ (ORCPT ); Sat, 20 Jun 2020 10:48:25 -0400 Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4ACD7C0613EE; Sat, 20 Jun 2020 07:48:25 -0700 (PDT) Received: by mail-wr1-x441.google.com with SMTP id l11so12380599wru.0; Sat, 20 Jun 2020 07:48:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=p7Zl7lqrThNKdsqg3QbPFVZu6d1ST335CM8NkSqvRSU=; b=LIeBcIrJ3ecmKXNYIeszQaZlRVNNTxuJ418s85/jubTj/u6h9YLE2j2TddBJ4/ZYTj GaajqqoyzoJex+Tk+BAIrai+LxbgmjrZa4T+1PnJQTF1E6011BOqUnWhA/SzBXTz7kn7 +3RdTGEwZb4P2qCYbCbnKLrtcQvIltU+U6eulxE2H4IA91v3lWjQaps0dJfpVAuYFK1E KkzOlY6PraOAmYlZqSkiZtWQ4SOZ1N2apP0Gd92d8h4+ukVMDpTyJqTegSGkhu91jl0x I1qIHx8FgvizAxg46XsilMnEbEeQYkuP+YLp+7n9z5ro4KRAakKM8UPpKuSAfFIg65Wl 5ghQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p7Zl7lqrThNKdsqg3QbPFVZu6d1ST335CM8NkSqvRSU=; b=hQB8udHy1RR5cxK0u47j/08mLO26X4spqDR5lb6e8DGQMh9nF01uMMtq/ypxMKSD/h cq6ewcvjqcB+s9kJXC8RwIrLr0cjwpe9lWi4sphtOTf+/K3vjczPXq5dh11pnk+sArNo rYeWGcO+ngoxMaX9PLmZgVywdbC9SWBK8BSGnoWpQWoM6lAFefcMskE0ANeNZKgeappE 9P9PUZFk8KAxQvLkFuT2sxiMwO/0rRdYPU+gzEWHSV6KytytW5iQl1CKpVWArpoYCGDk Os0K5DfXKmia71LlJHE1QlOtqv81SqHOAEujXmZWoMHtkrU/K1bTPCP7wmykZuzSUoR4 Ir/Q== X-Gm-Message-State: AOAM533UjsK+8d2fWv/AnFiy4T2HT83eWMbLKXCn4C4AKZfMW3BkoEM9 3N/v1uakqvwGDS9dzbaPpKY= X-Google-Smtp-Source: ABdhPJw1WAcTW3meA7eqByw3FB5W2Ahyf/5p/55ugLQgziZCG2Q2KAKToi6OI5m21LQPLucdThBjnQ== X-Received: by 2002:adf:e4cc:: with SMTP id v12mr9114825wrm.183.1592664501803; Sat, 20 Jun 2020 07:48:21 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:21 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/21] arm64: dts: qcom: msm8994: Add PSCI node Date: Sat, 20 Jun 2020 16:46:25 +0200 Message-Id: <20200620144639.335093-10-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add PSCI node to enable multi-processor startup. Note that not every 8994 device firmware supports PSCI, and even if, then it can only start the cores and not shut them down. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index adb1ebd15667..076da1fc52a1 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -287,6 +287,11 @@ pmu { interrupts = ; }; + psci { + compatible = "arm,psci-0.2"; + method = "hvc"; + }; + clocks { xo_board: xo_board { compatible = "fixed-clock"; From patchwork Sat Jun 20 14:46:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616081 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4EB6B14B7 for ; Sat, 20 Jun 2020 14:49:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3635A23C8F for ; Sat, 20 Jun 2020 14:49:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="iaL3LNNd" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728591AbgFTOtm (ORCPT ); Sat, 20 Jun 2020 10:49:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728305AbgFTOs0 (ORCPT ); Sat, 20 Jun 2020 10:48:26 -0400 Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6BBA7C0613EF; Sat, 20 Jun 2020 07:48:26 -0700 (PDT) Received: by mail-wr1-x444.google.com with SMTP id a6so10393801wrm.4; Sat, 20 Jun 2020 07:48:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NDbZgnSpbzmFJhwG16PsfsPK9AUHPobxxZQXjVJN29U=; b=iaL3LNNdHL41hKDdpsxLURMBf5Xnsa+lvpKlLhDUyxgwRIV4XNCDHxU5WMbngvLNI6 gmN4RUHKZ8jMrZZuM+SO+/N79sFKjpQ8XBTxaGCBmnYSHnEau58NIfhPjvADfsqZ5h3Z wFnZ2J02KiF+kSUXD6UijoWqaNxLHAAhpYZidtC3JTb/PtS3iEucEIx2CoEGgVr74lHT byBxAGtaYAKyUi8w3LqCgENoDwAs7kmhLasOsOIxJdS4KO++/61gUwTthr8CHe6cRh6z XMQL8MdqCfEhTJ+SalkxRfRE9USYE0uO2DHyMVDND/WjYYQ7JsJHUv4zFsrYYpTSr1wP 4A0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NDbZgnSpbzmFJhwG16PsfsPK9AUHPobxxZQXjVJN29U=; b=a0kY7AxYtqUNRTcgzrV9HoSBavkEV1pg3seF48Qxe6G0E8xe/vpPxtZQatWG3X3EnO 5jUI2vyN3aknymX2aGsOqPeqfE70jTohUP5rLyGwXjo+oqLfU0RL44jdNUv8wQGg5edN jNgUnJjf8WI3e9YXx+8edXAuME9RhEp3LM4pG1qTbO47TyN2t04r2dYrjahIss0xoQZR cvuWdg9HUDC9EOJDefcJeeZXQiDYjBmrDfvF4NH5xVs89tDjkUt6mdSTmhDiw/pNwPYS Gh3IM06sUtBWtiQNYjUyTWKgIV6KyoqFEiRuwfsmAOyphw+623Y/YVl+mpn6uc6JyeE9 xHSw== X-Gm-Message-State: AOAM533mOfADpRNPEuBdo3TH3NleYHmVy8OYR7WMIlQPpE2ukNSdEMSD Iru14bL7IKpDfqWLRO0u1QE= X-Google-Smtp-Source: ABdhPJxBvZ+semH55mfvKCNOcVb+Fqw1ld1fdNag1bM73sxOXrgytMVS0gg5e0wvOa8zXBHydObz5Q== X-Received: by 2002:adf:8444:: with SMTP id 62mr9145192wrf.278.1592664505142; Sat, 20 Jun 2020 07:48:25 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:24 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/21] arm64: dts: qcom: msm8994: Add support for SMD RPM Date: Sat, 20 Jun 2020 16:46:26 +0200 Message-Id: <20200620144639.335093-11-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for SMD RPM, including pm8994 and pmi8994 regulators. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 108 ++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 076da1fc52a1..f623f7e08994 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -262,6 +262,11 @@ tcsr_mutex_regs: syscon@fd484000 { reg = <0xfd484000 0x2000>; }; + rpm_msg_ram: memory@fc428000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0xfc428000 0x4000>; + }; + gcc: clock-controller@fc400000 { compatible = "qcom,gcc-msm8994"; #clock-cells = <1>; @@ -292,6 +297,97 @@ psci { method = "hvc"; }; + smd_rpm: smd { + compatible = "qcom,smd"; + rpm { + interrupts = ; + qcom,ipc = <&apcs 8 0>; + qcom,smd-edge = <15>; + qcom,local-pid = <0>; + qcom,remote-pid = <6>; + + rpm_requests: rpm-requests { + compatible = "qcom,rpm-msm8994"; + qcom,smd-channels = "rpm_requests"; + + rpmcc: qcom,rpmcc { + compatible = "qcom,rpmcc-msm8994"; + #clock-cells = <1>; + }; + + pm8994-regulators { + compatible = "qcom,rpm-pm8994-regulators"; + + vdd_l1-supply = <&pm8994_s1>; + vdd_l2_26_28-supply = <&pm8994_s3>; + vdd_l3_11-supply = <&pm8994_s3>; + vdd_l4_27_31-supply = <&pm8994_s3>; + vdd_l5_7-supply = <&pm8994_s3>; + vdd_l6_12_32-supply = <&pm8994_s5>; + vdd_l8_16_30-supply = <&vreg_vph_pwr>; + vdd_l9_10_18_22-supply = <&vreg_vph_pwr>; + vdd_l13_19_23_24-supply = <&vreg_vph_pwr>; + vdd_l14_15-supply = <&pm8994_s5>; + vdd_l17_29-supply = <&vreg_vph_pwr>; + vdd_l20_21-supply = <&vreg_vph_pwr>; + vdd_l25-supply = <&pm8994_s5>; + vdd_lvs1_2 = <&pm8994_s4>; + + pm8994_s1: s1 {}; + pm8994_s2: s2 {}; + pm8994_s3: s3 {}; + pm8994_s4: s4 {}; + pm8994_s5: s5 {}; + pm8994_s6: s6 {}; + pm8994_s7: s7 {}; + + pm8994_l1: l1 {}; + pm8994_l2: l2 {}; + pm8994_l3: l3 {}; + pm8994_l4: l4 {}; + pm8994_l6: l6 {}; + pm8994_l8: l8 {}; + pm8994_l9: l9 {}; + pm8994_l10: l10 {}; + pm8994_l11: l11 {}; + pm8994_l12: l12 {}; + pm8994_l13: l13 {}; + pm8994_l14: l14 {}; + pm8994_l15: l15 {}; + pm8994_l16: l16 {}; + pm8994_l17: l17 {}; + pm8994_l18: l18 {}; + pm8994_l19: l19 {}; + pm8994_l20: l20 {}; + pm8994_l21: l21 {}; + pm8994_l22: l22 {}; + pm8994_l23: l23 {}; + pm8994_l24: l24 {}; + pm8994_l25: l25 {}; + pm8994_l26: l26 {}; + pm8994_l27: l27 {}; + pm8994_l28: l28 {}; + pm8994_l29: l29 {}; + pm8994_l30: l30 {}; + pm8994_l31: l31 {}; + pm8994_l32: l32 {}; + + pm8994_lvs1: lvs1 {}; + pm8994_lvs2: lvs2 {}; + }; + + pmi8994-regulators { + compatible = "qcom,rpm-pmi8994-regulators"; + + pmi8994_s1: s1 {}; + pmi8994_s2: s2 {}; + pmi8994_s3: s3 {}; + pmi8994_bby: boost-bypass {}; + }; + }; + }; + }; + clocks { xo_board: xo_board { compatible = "fixed-clock"; @@ -306,6 +402,17 @@ sleep_clk: sleep_clk { }; }; + vreg_vph_pwr: vreg-vph-pwr { + compatible = "regulator-fixed"; + status = "okay"; + regulator-name = "vph-pwr"; + + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + + regulator-always-on; + }; + reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -326,6 +433,7 @@ tcsr_mutex: hwlock { smem { compatible = "qcom,smem"; memory-region = <&smem_mem>; + qcom,rpm-msg-ram = <&rpm_msg_ram>; hwlocks = <&tcsr_mutex 3>; }; }; From patchwork Sat Jun 20 14:46:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616067 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E714360D for ; Sat, 20 Jun 2020 14:49:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CE81223CCD for ; Sat, 20 Jun 2020 14:49:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ZC0H/wpr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728336AbgFTOsc (ORCPT ); Sat, 20 Jun 2020 10:48:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728387AbgFTOsa (ORCPT ); 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[83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:28 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/21] arm64: dts: qcom: msm8994: Add SDHCI1 node Date: Sat, 20 Jun 2020 16:46:27 +0200 Message-Id: <20200620144639.335093-12-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Enable support for SDHCI on msm8994-based devices. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index f623f7e08994..f363b678c3b3 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -279,6 +279,33 @@ apcs: syscon@f900d000 { compatible = "syscon"; reg = <0xf900d000 0x2000>; }; + + sdhc1: sdhci@f9824900 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>; + reg-names = "hc_mem", "core_mem"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC1_APPS_CLK>, + <&gcc GCC_SDCC1_AHB_CLK>, + <&xo_board>; + clock-names = "core", "iface", "xo"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on + &sdc1_rclk_on>; + pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off + &sdc1_rclk_off>; + + regulator-always-on; + bus-width = <8>; + mmc-hs400-1_8v; + non-removable; + status = "disabled"; + }; }; memory { From patchwork Sat Jun 20 14:46:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616063 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6FB7114B7 for ; Sat, 20 Jun 2020 14:49:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5849023C3F for ; Sat, 20 Jun 2020 14:49:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="jHflshu8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728579AbgFTOte (ORCPT ); Sat, 20 Jun 2020 10:49:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728397AbgFTOsd (ORCPT ); Sat, 20 Jun 2020 10:48:33 -0400 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 297ACC06174E; Sat, 20 Jun 2020 07:48:33 -0700 (PDT) Received: by mail-wr1-x443.google.com with SMTP id g18so3286549wrm.2; Sat, 20 Jun 2020 07:48:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v6vJgKaplvVYu5CK3tSSKZqp8AdKD52jPGys9WAg2ik=; b=jHflshu8MRE0tbnm3v4T8SNN7diDQz/65jfJwoRnXg9SXiyswmRiTudYNu5y2EhTd8 9LCUerKNPQnaudvq0y6cL0QTInaecz0xsTE9+MUTr5NkgN7G8FaSOdgkJkjcShOpsJap hmcxl4nYNv5M6pVmc/baYFnx4Fv3QbOukg39FtzP0RbYSgf6YLozeyZ6IKPgMYSxOfOF 8DDJltnpYLnCfW+fmqDZlDlhzGKMyf52dLjpmx65XRL4bMthb1cCIdDikIpql7zs7CN7 szoQpR05oCjZigJhMedZX51o28754Nnwy7nlp8erOwDRf5hslsAWwfNHtF338mezZatQ S4HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v6vJgKaplvVYu5CK3tSSKZqp8AdKD52jPGys9WAg2ik=; b=EQmQy9EJPyfSb57QGiP4Ndvo9Au82ynaI6kAfG/1V/nb8ClmtR6CfgoSiqT3LAfdQw Box3nQmKNP71mA/sSnJ5EyNjlijPAFrFcKdz5aXlNu6NdyMgnf+pASO/Bp8Y19cDvGBc rrL2VT2mksPiGnR4MwsEZmsJTqid5Mdmtkth4CitJ9qehf7rx8VfOQza+tK/a9DXutoC UMYyFNJ/excsF7WWScPHTYavTemEqx9n3GO1MJ3UzuxJ2LuZJxWj6AzZjUv9PcSToB+o n1314ATC+hE1ZQoIL1JxWh2kkQ4g1NfxgkJFp0N5jZlPI0q57LiXvZoCJlfsacm1R8TH 8cnw== X-Gm-Message-State: AOAM532rTAjYilaDTuBf2IY01Pa6NgR2qlgoHgdVQXZdab1J5LL8cdkI p5706piUWHLc6w7NfEUioCM= X-Google-Smtp-Source: ABdhPJzu4Y9C4y0Qd65ugxbI0YADYBBvj5/MB+c7KXfREiadsPdCL4sXLQALh/+8JVVDHClvdKd65w== X-Received: by 2002:adf:c404:: with SMTP id v4mr9061373wrf.85.1592664511955; Sat, 20 Jun 2020 07:48:31 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:31 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 12/21] arm64: dts: qcom: msm8994: Remove qcom,msm-id and qcom-pmic-id properties Date: Sat, 20 Jun 2020 16:46:28 +0200 Message-Id: <20200620144639.335093-13-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org These should be set on a per-device basis, as they also include hardware revision bits that can vary between boards using the same SoC. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index f363b678c3b3..b1a3f1732d84 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -8,10 +8,7 @@ / { model = "Qualcomm Technologies, Inc. MSM 8994"; compatible = "qcom,msm8994"; - // msm-id and pmic-id are required by bootloader for - // proper selection of dt blob - qcom,msm-id = <207 0x20000>; - qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>; + interrupt-parent = <&intc>; #address-cells = <2>; From patchwork Sat Jun 20 14:46:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616059 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1643214B7 for ; Sat, 20 Jun 2020 14:49:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F2F9C23C43 for ; Sat, 20 Jun 2020 14:49:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KI7Hid2+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728414AbgFTOsi (ORCPT ); Sat, 20 Jun 2020 10:48:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728387AbgFTOsg (ORCPT ); Sat, 20 Jun 2020 10:48:36 -0400 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B38BC06174E; Sat, 20 Jun 2020 07:48:36 -0700 (PDT) Received: by mail-wr1-x443.google.com with SMTP id b6so12338541wrs.11; Sat, 20 Jun 2020 07:48:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PCYX+4y1d3sit7Cy0bnnSZ/0gVVWMuNbGae/R+4UFWY=; b=KI7Hid2+UGR8UrsUwGEY+cD1zAKNwD7P7JqaVeWeOTQKf3OxdjuYWKGcrTffN/3UJT S1uyHRedsJ4mXBYt6TjfMOiDlEhHa1BmaBJgmDMmJ0OzWMfkTHd6P4KUyil1HOUTo8Si gp6FNbW5yVuylNkL0oyFPDVRYrCajbkJCZTTu20EkaudGgFZeCDAySgIGwEZcpvDCnWP w1z4ZHMwzKf3r2nXh+dLaUqjtdz4F8e4kLIwRdbYJjVpOipMYMmofsYyKfysZ2fEhMN8 ts3PE+uUeZv1XSjinYEoEGm/ZPD3w0HdKxhTPFRD395VhAnZ9qpsyuldiR4HXiYzFtBH Ic7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PCYX+4y1d3sit7Cy0bnnSZ/0gVVWMuNbGae/R+4UFWY=; b=sKguT8CrtSsqbwnn/r07KnYeM4mxBR5CBR9NY6Rfy1TZjJSp3YuNu99G7SIqFsJii1 GB3Yo9JHncr41hWlLgLW/9/MbsFOHYUJwl3AYMd8d7V3aoVfSSyO/1x3JlYptd8xI9Ux oky/J87pIx/SVcdQiCdMFKKTFunIw1TwzRPej41+WV+mvjhFGcDt/QGCkL4Jrjo3Z7A5 9BJ5cPMS7SkpV70KExSeh1ZL6pVFMSgtxNUjJseSWeDHjBr5LMgmmlfvGt35mw0F+Tgp urNCyJg2IpMHj0EaZVAFO9C5+bSXZPF1HyiXw56K17f17Q+JBbhJ2bpxlbq/ZJ/SkKnp 1HNA== X-Gm-Message-State: AOAM533/v+6mi0B7+nAH4JWuJwhqUs9HjJyHzWHmPFQckH833cdl5rQ6 Wmu7NB+jAdy1fGJJPKL/mR4= X-Google-Smtp-Source: ABdhPJx+fwpSJ7HchGBJIBA+lsOrCHBkLOyHiF8Zo7gXVFGhZy6xWwww2mi0w2zBqjv/B9twTy8tzw== X-Received: by 2002:a05:6000:108c:: with SMTP id y12mr9205057wrw.88.1592664515423; Sat, 20 Jun 2020 07:48:35 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:35 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/21] arm64: dts: qcom: msm8994: Make comments C style Date: Sat, 20 Jun 2020 16:46:29 +0200 Message-Id: <20200620144639.335093-14-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index b1a3f1732d84..19c9ac30453e 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only -/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. - */ +/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. */ #include #include @@ -307,7 +306,7 @@ sdhc1: sdhci@f9824900 { memory { device_type = "memory"; - // We expect the bootloader to fill in the reg + /* We expect the bootloader to fill in the reg */ reg = <0 0 0 0>; }; From patchwork Sat Jun 20 14:46:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616027 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EB32F14B7 for ; Sat, 20 Jun 2020 14:48:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D273523C85 for ; Sat, 20 Jun 2020 14:48:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TFqlGt7g" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728427AbgFTOsm (ORCPT ); Sat, 20 Jun 2020 10:48:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48620 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728387AbgFTOsk (ORCPT ); Sat, 20 Jun 2020 10:48:40 -0400 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1948C06174E; Sat, 20 Jun 2020 07:48:39 -0700 (PDT) Received: by mail-wm1-x341.google.com with SMTP id r9so10917611wmh.2; Sat, 20 Jun 2020 07:48:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wW++sDpeHDTflJ6Os2FkMg1pvptnu0Wqw0CM6692GDw=; b=TFqlGt7gIuJWhVEeGO0rF4Vy01QGpx5pao6xea3Fgfr6Ej4mfttKT+CcCwluN69Bs7 njkE+qRCOamQ4N2KXQv4zTp3BW4CzjMveXMQ/aH0Wa2wLE+lVs4CcivOHiuC+DeBMaVq SQshm4dRu29nANZr6uZC3YBlH5odcv3ZauV+J/FSbjOym+7q0GcdUkM40xJyqvXGiZUN 3/AwbHmumci14ETcIinEbN5WVcPCit0OOsIV6WJD9BN4DB4t1nwlv05cVMf/WFlT2yTD ylpaDjqVXX426pk9WgHhwSe1RNSveBWRNQv6nfiOnlZq85QKLGIUHgnQofUoXMeHq1+4 dvMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wW++sDpeHDTflJ6Os2FkMg1pvptnu0Wqw0CM6692GDw=; b=WLcgxLltfvqFGIn0ofV5KQuCKe+tYvISjh+zE8i6wqxUKCnp+RtOivogzWcR2Sblfx drJvWhbdW6HGIeIhGfn7vkejVRKqVVGc4ZRlQjAb+Tp0jXgwpnt1mtvADr/fqo5KSomk /JVTYRKDCvFTa3kk0akndVMFx9fzjUmcwisvpo0+gTANcvpsxvuIzN9QQI0tz2rtvPgl +s5/dnvQwIv/FqFHvqDKorsbpXk7o+fxjVufAacMXOrj8ah6ePcTpqLh+AjXqJrihJSN Bq0HNPYhC+pS6KMDQIKdd/zyaI+0GiJOeWnrbESutS4vAAfj0/D1vuxy2MpgrTqYAx51 ikBw== X-Gm-Message-State: AOAM531IwD4iKN5HKopTcSWaylvq6TN+9kDvvtVu324+avNWekyREdu5 c5OmOz5pLLxuLTZZUdC1VZU= X-Google-Smtp-Source: ABdhPJyHijlKf4XRf2GRReiuVkDcHieN0Bw5U+8y3OT5wOyOBtC2V7MwSL8c9lB8vErDv/XzYs9N9Q== X-Received: by 2002:a1c:a385:: with SMTP id m127mr8504361wme.112.1592664518789; Sat, 20 Jun 2020 07:48:38 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:38 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 14/21] arm64: dts: qcom: msm8994: Add SCM node Date: Sat, 20 Jun 2020 16:46:30 +0200 Message-Id: <20200620144639.335093-15-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 19c9ac30453e..df35c975c94c 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -138,6 +138,12 @@ timer { <1 1 0xff08>; }; + firmware { + scm { + compatible = "qcom,scm-msm8992"; + }; + }; + soc: soc { #address-cells = <1>; From patchwork Sat Jun 20 14:46:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616055 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8A64960D for ; Sat, 20 Jun 2020 14:49:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6E1B723C3F for ; Sat, 20 Jun 2020 14:49:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="J7Q0k4xa" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728387AbgFTOsq (ORCPT ); Sat, 20 Jun 2020 10:48:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728433AbgFTOsn (ORCPT ); Sat, 20 Jun 2020 10:48:43 -0400 Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50FEEC06174E; Sat, 20 Jun 2020 07:48:43 -0700 (PDT) Received: by mail-wm1-x344.google.com with SMTP id r9so10917673wmh.2; Sat, 20 Jun 2020 07:48:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iDykADcxrijpqv/X+4zRhTKtVeA53wtr3kZ/KK6Yknc=; b=J7Q0k4xazhrgTh5VPqb5vVtvVnAQUxeodb+dzDqLGvJrqG7htnM5ErZWBNI+q/ZQAE vbidlWrnjRon7INnbfePJsJjulJYceMcyh1h4dJVt45HwIYq+kWTZwOyBY3yVCm2ZB9T arTMjWuGitXg5AifgLdHFjyj+jOvOcbSmxSZ/GDLuLhG00r9spHWcwL72eEdpZ3qs0ve gqAVhNZ99FVC/9z4sz51pdxuyVEqJgsGjYKO6g2uTeVo5gseMR+n9YYlBAylr1goZBKU 1usdXPoT/ubHobG3urVYurXB1FAx9R5wfOMnyxKhoxFfzEmt9o2oWozbpbiMrFuHyq/l TpgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iDykADcxrijpqv/X+4zRhTKtVeA53wtr3kZ/KK6Yknc=; b=AS/xW3pG1Su+EtM21H7itbEzrTiAzSFkCqydIiSh8PR9BlAqW9T5PNhr1bznf5JEWR D9bdpWwKtYqunPmzGeXgri3RbS3f5I0Ie5P1e1ZZ0NSB+D/EQik3JI9jRrNElijtTQWa kBIa2IDE+sHVmp66lMTmhxXN/koH5HQEq6fZVS6SguvqGPJsTvyf4YKLjEQ4lTBhADgs vUNkdByFUiQ/5cm65XI76F5I9nwloj262Rq8lz9Qq3vgKzD+G9t/3KvyHJA7LZk9S6HR rDXJoOshYgfzCppNKA3xoParKVh6EYYX9SNa7Bqu9AUoiyxrIHyBbnmoiQN6ms7gbl2F S1Dw== X-Gm-Message-State: AOAM5316NRm7Vu+LreuaNvuF+qwo5/ZYLKY8L7xY0334qYssKzyJ61/V NcDeC+fvkaAyAGJ7C7JaLs8= X-Google-Smtp-Source: ABdhPJzK+JnkPaEomg+uDiJites2Z/svU9kDxcqK//WHNt1MFHp5Nkk3E0e4oqkFB2vOs0hnBGLuEQ== X-Received: by 2002:a7b:c113:: with SMTP id w19mr9542513wmi.161.1592664522060; Sat, 20 Jun 2020 07:48:42 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:41 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 15/21] arm64: dts: qcom: msm8994: Add BLSP2 UART2 node Date: Sat, 20 Jun 2020 16:46:31 +0200 Message-Id: <20200620144639.335093-16-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add a BLSP2 UART2 node to enable serial connection. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index df35c975c94c..20e859eb1318 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -243,6 +243,15 @@ blsp1_uart2: serial@f991e000 { <&gcc GCC_BLSP1_AHB_CLK>; }; + blsp2_uart2: serial@f995e000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0xf995e000 0x1000>; + interrupt = ; + clock-names = "core", "iface"; + clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, + <&gcc GCC_BLSP2_AHB_CLK>; + }; + spmi_bus: qcom,spmi@fc4c0000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xfc4cf000 0x1000>, From patchwork Sat Jun 20 14:46:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616031 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7E93160D for ; Sat, 20 Jun 2020 14:48:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 613FD23C17 for ; Sat, 20 Jun 2020 14:48:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Er4IWP/2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728459AbgFTOst (ORCPT ); Sat, 20 Jun 2020 10:48:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728453AbgFTOsr (ORCPT ); Sat, 20 Jun 2020 10:48:47 -0400 Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C49EAC06174E; Sat, 20 Jun 2020 07:48:46 -0700 (PDT) Received: by mail-wr1-x441.google.com with SMTP id h5so12378104wrc.7; Sat, 20 Jun 2020 07:48:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lk7n6WWJEaKpqahLfl1t5fyczJ/mlA5iUEng93nFK38=; b=Er4IWP/2B+clhB0mmK2gYlOh+0PX2ia7ULK24cTIHB6o73+wVQ3wwDtQ0pCaZJkrLK 92traMIydeEFLoL7gbxNGwyjqjwnaWb+tJJP38Yjv51LTm+SfV23x21mpJQ0yYA4UhF6 gn4Pjc20z3Tq3qzngFhO/N/kAfWlP5NkxUWBYq8dP/01Tbm1j+wrI3YCrz099w5QjcBF OGwufvMC0ZPEN3hBcfPIfiE7ORI0sfE5zL7uGDW/YM2pd95C6k8TVPSUQn6bjYdL8Wtj y0Oj5W8qB04r4hXy0+sJU07oAyrWT82OpsKWaufl7Ty9qlTi8pORFR5dYgoaR+tbtUBe VuDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lk7n6WWJEaKpqahLfl1t5fyczJ/mlA5iUEng93nFK38=; b=TfYLS0Ab7KcLH9H93I0DHg3swCutrMzLSO/TvLPJrGoyrMr08Ruhd4pQZxTn458IRr 8PreXjFVMaGP0z0U2CSimMKqtvZRjqBiMhKaZdPcVQni7NmE3MOZQpaW2wgp5vAUJrBW qK4WZR1Y//acGKzawVGRvUebIEH3AKx77SfCqTyqOL/ikeHN9HYvUj4m9zkAEwTTnpBR EtIeIlWaXb8E2LQWit2g3kBGHb7Fe4c/tgYfyKsX66qihGL8uNc0/tC98QHwohPsVcbX Yq3xWyDWCshXaTPOS7L9XEWznRzF7174Hi38a+UtElckXrJIVoZih7o64xjRhizcuZhZ kV6Q== X-Gm-Message-State: AOAM532y+P83RR3kuRG0s+IK4ZQNMhIboL1HEocoQQy+y9dWsMgXbvbW polEQFZZp2Jp/64AaMeYNQU= X-Google-Smtp-Source: ABdhPJxs3oBcbCnLACnH5GiCl6gep4+tKj2q1GBRMvInldVTcEt09HSCIexg8R0D/EJnCha5icr80A== X-Received: by 2002:adf:8444:: with SMTP id 62mr9146171wrf.278.1592664525509; Sat, 20 Jun 2020 07:48:45 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:45 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 16/21] arm64: dts: qcom: msm8994: Add I2C, SPI and BLSP DMA nodes Date: Sat, 20 Jun 2020 16:46:32 +0200 Message-Id: <20200620144639.335093-17-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for I2C and SPI buses to enable peripherals such as touchscreens or sensors. Also add DMA nodes and configuration Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 137 +++++++++++++++++++++++++- 1 file changed, 136 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 20e859eb1318..7a7b22e2d5cc 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -233,14 +233,40 @@ msmgpio: pinctrl@fd510000 { #interrupt-cells = <2>; }; + blsp1_dma: dma@f9904000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0xf9904000 0x19000>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + num-channels = <18>; + qcom,num-ees = <4>; + }; + + blsp2_dma: dma@f9944000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0xf9944000 0x19000>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + num-channels = <18>; + qcom,num-ees = <4>; + }; + blsp1_uart2: serial@f991e000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0xf991e000 0x1000>; interrupts = ; - status = "disabled"; clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; + status = "disabled"; }; blsp2_uart2: serial@f995e000 { @@ -250,6 +276,115 @@ blsp2_uart2: serial@f995e000 { clock-names = "core", "iface"; clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; + dmas = <&blsp1_dma 2>, <&blsp1_dma 3>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + blsp_i2c1: i2c@f9923000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0xf9923000 0x500>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <400000>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_default>; + pinctrl-1 = <&i2c1_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + blsp_i2c2: i2c@f9924000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0xf9924000 0x500>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <355000>; + dmas = <&blsp1_dma 14>, <&blsp1_dma 15>; + dma-names = "tx", "rx"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c2_default>; + pinctrl-1 = <&i2c2_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + /* I2C3 doesn't exist */ + + blsp_i2c4: i2c@f9926000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0xf9926000 0x500>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <355000>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c4_default>; + pinctrl-1 = <&i2c4_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + blsp_i2c5: i2c@f9967000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0xf9967000 0x500>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_AHB_CLK>, + <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <355000>; + dmas = <&blsp2_dma 20>, <&blsp2_dma 21>; + dma-names = "tx", "rx"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c5_default>; + pinctrl-1 = <&i2c5_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + blsp_i2c6: i2c@f9928000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0xf9928000 0x500>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <355000>; + dmas = <&blsp1_dma 22>, <&blsp1_dma 23>; + dma-names = "tx", "rx"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c6_default>; + pinctrl-1 = <&i2c6_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + blsp_spi0: spi@f9923000 { + compatible = "qcom,spi-qup-v2.2.1"; + reg = <0xf9923000 0x500>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + spi-max-frequency = <19200000>; + dmas = <&blsp1_dma 12>, <&blsp1_dma 13>; + dma-names = "tx", "rx"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_spi0_default>; + pinctrl-1 = <&blsp1_spi0_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; }; spmi_bus: qcom,spmi@fc4c0000 { From patchwork Sat Jun 20 14:46:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616035 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7D7B314E3 for ; Sat, 20 Jun 2020 14:48:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6469923C2E for ; Sat, 20 Jun 2020 14:48:59 +0000 (UTC) Authentication-Results: mail.kernel.org; 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[83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:48 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 17/21] arm64: dts: qcom: Update msm8994 pin configuration Date: Sat, 20 Jun 2020 16:46:33 +0200 Message-Id: <20200620144639.335093-18-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This allows us to use I2C, SPI and the second UART. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994-pins.dtsi | 272 +++++++++++++++++++++ 1 file changed, 272 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi index 2e118d967f53..9fbdc46991da 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi @@ -27,4 +27,276 @@ pinconf { bias-pull-down; }; }; + + blsp2_uart2_default: blsp2_uart2_default { + pinmux { + function = "blsp_uart8"; + pins = "gpio45", "gpio46"; + }; + pinconf { + pins = "gpio45", "gpio46"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp2_uart2_sleep: blsp2_uart2_sleep { + pinmux { + function = "gpio"; + pins = "gpio45", "gpio46"; + }; + pinconf { + pins = "gpio45", "gpio46"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + i2c1_default: i2c1_default { + pinmux { + function = "blsp_i2c1"; + pins = "gpio2", "gpio3"; + }; + pinconf { + pins = "gpio2", "gpio3"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c1_sleep: i2c1_sleep { + pinmux { + function = "gpio"; + pins = "gpio2", "gpio3"; + }; + pinconf { + pins = "gpio2", "gpio3"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c2_default: i2c2_default { + pinmux { + function = "blsp_i2c2"; + pins = "gpio6", "gpio7"; + }; + pinconf { + pins = "gpio6", "gpio7"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c2_sleep: i2c2_sleep { + pinmux { + function = "gpio"; + pins = "gpio6", "gpio7"; + }; + pinconf { + pins = "gpio6", "gpio7"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c4_default: i2c4_default { + pinmux { + function = "blsp_i2c4"; + pins = "gpio19", "gpio20"; + }; + pinconf { + pins = "gpio19", "gpio20"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c4_sleep: i2c4_sleep { + pinmux { + function = "gpio"; + pins = "gpio19", "gpio20"; + }; + pinconf { + pins = "gpio19", "gpio20"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; + + i2c5_default: i2c5_default { + pinmux { + function = "blsp_i2c5"; + pins = "gpio23", "gpio24"; + }; + pinconf { + pins = "gpio23", "gpio24"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c5_sleep: i2c5_sleep { + pinmux { + function = "gpio"; + pins = "gpio23", "gpio24"; + }; + pinconf { + pins = "gpio23", "gpio24"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c6_default: i2c6_default { + pinmux { + function = "blsp_i2c6"; + pins = "gpio28", "gpio27"; + }; + pinconf { + pins = "gpio28", "gpio27"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c6_sleep: i2c6_sleep { + pinmux { + function = "gpio"; + pins = "gpio28", "gpio27"; + }; + pinconf { + pins = "gpio28", "gpio27"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_spi0_default: blsp1_spi0_default { + pinmux { + function = "blsp_spi1"; + pins = "gpio0", "gpio1", "gpio3"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio8"; + }; + pinconf { + pins = "gpio0", "gpio1", "gpio3"; + drive-strength = <10>; + bias-pull-down; + }; + pinconf_cs { + pins = "gpio8"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_spi0_sleep: blsp1_spi0_sleep { + pinmux { + function = "gpio"; + pins = "gpio0", "gpio1", "gpio3"; + }; + pinconf { + pins = "gpio0", "gpio1", "gpio3"; + drive-strength = <2>; + bias-disable; + }; + }; + + pmx_sdc1_clk { + sdc1_clk_on: clk-on { + pinmux { + pins = "sdc1_clk"; + }; + pinconf { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <16>; + }; + }; + + sdc1_clk_off: clk-off { + pinmux { + pins = "sdc1_clk"; + }; + pinconf { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <2>; + }; + }; + }; + + pmx_sdc1_cmd { + sdc1_cmd_on: cmd-on { + pinmux { + pins = "sdc1_cmd"; + }; + pinconf { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <8>; + }; + }; + + sdc1_cmd_off: cmd-off { + pinmux { + pins = "sdc1_cmd"; + }; + pinconf { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + }; + }; + + pmx_sdc1_data { + sdc1_data_on: data-on { + pinmux { + pins = "sdc1_data"; + }; + pinconf { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <8>; + }; + }; + + sdc1_data_off: data-off { + pinmux { + pins = "sdc1_data"; + }; + pinconf { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <2>; + }; + }; + }; + + pmx_sdc1_rclk { + sdc1_rclk_on: rclk-on { + pinmux { + pins = "sdc1_rclk"; + }; + pinconf { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc1_rclk_off: rclk-off { + pinmux { + pins = "sdc1_rclk"; + }; + pinconf { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + }; }; From patchwork Sat Jun 20 14:46:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616047 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C549D14B7 for ; Sat, 20 Jun 2020 14:49:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AD22A23C43 for ; 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[83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:52 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 18/21] regulator: qcom_smd: Fix pmi8994 label Date: Sat, 20 Jun 2020 16:46:34 +0200 Message-Id: <20200620144639.335093-19-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org s3 was mislabeled as s2. Fix it. Signed-off-by: Konrad Dybcio Reviewed-by: Bjorn Andersson --- drivers/regulator/qcom_smd-regulator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c index 53a64d856926..7f5c318c8259 100644 --- a/drivers/regulator/qcom_smd-regulator.c +++ b/drivers/regulator/qcom_smd-regulator.c @@ -821,7 +821,7 @@ static const struct rpm_regulator_data rpm_pm8994_regulators[] = { static const struct rpm_regulator_data rpm_pmi8994_regulators[] = { { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" }, { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" }, - { "s2", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" }, + { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" }, { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" }, {} }; From patchwork Sat Jun 20 14:46:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616051 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4428B14E3 for ; Sat, 20 Jun 2020 14:49:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 278D823C91 for ; Sat, 20 Jun 2020 14:49:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="iwNmrvk/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728544AbgFTOtQ (ORCPT ); Sat, 20 Jun 2020 10:49:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728476AbgFTOs5 (ORCPT ); Sat, 20 Jun 2020 10:48:57 -0400 Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0091AC06174E; Sat, 20 Jun 2020 07:48:56 -0700 (PDT) Received: by mail-wr1-x444.google.com with SMTP id l11so12381369wru.0; Sat, 20 Jun 2020 07:48:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4YzpTtuQd8igcmEb94rslBu/tpG/FsBo/caSislaGaQ=; b=iwNmrvk/680CIVcmDysYUApImaXy0T8JwUvUbmSL7asI/B/S8GMypZ+7ED7NUvwkE+ 8pNceqGjHvAdILbh4MCWjhyKOS+qtHBINaJRmSTyYLWurHDA1TH7XnI/HM40iizw0hu2 czzMdJuK3obWErYgS8Z/0981GFXt0FmeVkPlLd/oMPvPlIwCBRJ88W2qW5cawwZs2/Gs CdqmzlkWtIjrxWlwOmM2+q6+cNgU7Ed5oM3p+BxqmS9m2fymjWWcTK5OKLFArldAUs1D AlIcDEi0lhYIlVOBHcRx35Dsfnyp1Pz+46i+rUS4p23h5KDLCQpPAvOdyZYncMBIgX5p qVlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4YzpTtuQd8igcmEb94rslBu/tpG/FsBo/caSislaGaQ=; b=i0P//gOedXIELQd8uLv8+JwUsLhAlqgUCmXiVsYqad50wX14mQlkX+oLaWNlQcrBIc 1Quw0DVPgBYB4Nj2FR1JKUDN1FyAnlJeZpbXBb/aGhoR1WrotdTxNFuSEvlvEpapkPP/ h9GsPE9WuB0j212HLjR4LrR03Mion8rOA+ZEXC4H9FRXatLKa407uX7xYPxH99hxMOlj U+apYf6yLu+Gb9Ie/fo9ohjVH1KLIx4p3D5s+CN7kTKgEIGTJOAV7Rxth+MDqgB8pwfr WpG2lkD8xKsa3ZjULpFJDwrv2f2YlcGJuwWu99uYu3gKsiJ04qzA1tD19MFPvTKLI/ks QF8g== X-Gm-Message-State: AOAM530ol9Gdq1oK4QmALKGoe7Hi0JFhsU5jDg5OqNHy87JR/kd9M5A+ Jkk/cvMn7jIzAD1YlmjEjBc= X-Google-Smtp-Source: ABdhPJxAPPFs2N1QEGxO1eVQZpi2K00TAe7zNr5W0BALYsIcs5XsPpdsiVUS/XzMOaEciBnT1Lm27Q== X-Received: by 2002:a5d:5549:: with SMTP id g9mr5585965wrw.419.1592664535797; Sat, 20 Jun 2020 07:48:55 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:55 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 19/21] arm64: dts: qcom: angler: Add qcom,msm-id and pmic-id Date: Sat, 20 Jun 2020 16:46:35 +0200 Message-Id: <20200620144639.335093-20-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add properties required for the bootloader to select the correct bootloader blob. They have been removed from the SoC device tree as they should be set on a per-device basis. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994-angler-rev-101.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994-angler-rev-101.dts b/arch/arm64/boot/dts/qcom/msm8994-angler-rev-101.dts index a5f9a6ab512c..baa55643b40f 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-angler-rev-101.dts +++ b/arch/arm64/boot/dts/qcom/msm8994-angler-rev-101.dts @@ -11,6 +11,8 @@ / { model = "Huawei Nexus 6P"; compatible = "huawei,angler", "qcom,msm8994"; /* required for bootloader to select correct board */ + qcom,msm-id = <207 0x20000>; + qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>; qcom,board-id = <8026 0>; aliases { From patchwork Sat Jun 20 14:46:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616045 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E6A7414E3 for ; Sat, 20 Jun 2020 14:49:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CDE0F23C2E for ; Sat, 20 Jun 2020 14:49:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="YIVQuHWg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728519AbgFTOtC (ORCPT ); Sat, 20 Jun 2020 10:49:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728514AbgFTOtA (ORCPT ); Sat, 20 Jun 2020 10:49:00 -0400 Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82DC9C0613EE; Sat, 20 Jun 2020 07:49:00 -0700 (PDT) Received: by mail-wr1-x441.google.com with SMTP id o11so4645371wrv.9; Sat, 20 Jun 2020 07:49:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MeYEH2NT9Ksi+ZUmEtGsNon+EIn/ZBuaDVI8zEZeGNg=; b=YIVQuHWgM49qYpXdPQNympBBYQbbFBGZkjEsqcqyETwRj9kf9t0RjWOhgajtTRudJY 3fE7rcSE9EkylJbhu8jq1c/HIuxBME215cESDRerNFMLO8pZoDrSOPOrO19P8haQ7wZY gwlTLuXXa356Ul6P833I6C+GCZTibNTrgxrPlQWFj1JWc5ivinYpyAskhI0ji81rDSDt 6vgHp4Q6OOehHBdEPB95GqCuuQUkjJE+3FCaBOTESO+A2iYbGrFJ0EZHwa/UXy5UIG5N SR9IBqIg3rXL2V/IN9IfTd0iTn19YJPyulo0Ry9HUuX5S+LgkcUP6EzWeo6/F5yrEuc8 LH8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MeYEH2NT9Ksi+ZUmEtGsNon+EIn/ZBuaDVI8zEZeGNg=; b=o0PwuT6nCh8xo/S9ZIdu1yQA/EYhFOP1oL9a3d7Sn3HtNH8eLVYzGYfN3k8YVmJxtS kluii6OeWHlxWrFmZR/AUGrxT9PDUypQKRcaGmss3SKnUfX3r1xLQ39vgpGPzeVhnFeP 5zIYa711Xjxou7IFY8Ji0SSEjNAa0gktxZ0Uhn8YSycaPbXyG4721Ip1eQ+AdZ+83HDE BBX1hieNpIXRa7aulZAxlmvbgsVR4Y2iB6vK4E4jA3LP4p7FKzNPuaiG92rareFiP+rj sHbdxURVmzIrhh1oFGC4qytJ0v6os5r6/l1417F+0eTAk6LiLmQxhkTrPzzbVNrIJTfg 1XzQ== X-Gm-Message-State: AOAM530G0BCsDmBZizl2I6d8Mpy7rYyETpOaILlGwu1QSLknANdBSYVo usqYiihbrI8bUckmPU5NWdI= X-Google-Smtp-Source: ABdhPJxyZZKyky8VpeKa0oZKBtCvFQtDQKh0NHz7gHoYnCoXTmRSjraU8MLDG5kVZX4AVNoj2HbGMQ== X-Received: by 2002:a05:6000:108c:: with SMTP id y12mr9206195wrw.88.1592664539229; Sat, 20 Jun 2020 07:48:59 -0700 (PDT) Received: from localhost.localdomain (abae138.neoplus.adsl.tpnet.pl. [83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.48.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:48:58 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 20/21] arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW) Date: Sat, 20 Jun 2020 16:46:36 +0200 Message-Id: <20200620144639.335093-21-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add device tree support for the Sony Xperia Z5 smartphone. The kitakami part in DT name comes from Sony platform naming and is there to indicate that as more Sony devices using msm8994 are added to the kernel, they will share a lot of common code. The board currently supports * Serial * SDHCI * I2C * Regulator configuration * pstore log dump * GPIO keys Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../msm8994-sony-xperia-kitakami-sumire.dts | 410 ++++++++++++++++++ 2 files changed, 411 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 0f2c33d611df..01ca9ac9f905 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a3u-eur.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a5u-eur.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8992-bullhead-rev-101.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8994-angler-rev-101.dtb +dtb-$(CONFIG_ARCH_QCOM) += msm8994-sony-xperia-kitakami-sumire.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-asus-novago-tp370ql.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dts b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dts new file mode 100644 index 000000000000..3b0a880416c4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dts @@ -0,0 +1,410 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2020, Konrad Dybcio + */ + +/dts-v1/; + +#include "msm8994.dtsi" +#include "pm8994.dtsi" +#include "pmi8994.dtsi" +#include +#include + +/ { + model = "SoMC Sumire-ROW"; + compatible = "somc,sumire-row", "qcom,msm8994"; + /* required for bootloader to select correct board */ + qcom,msm-id = <0xcf 0x20001>; + qcom,pmic-id = <0x10009 0x1000a 0x00 0x00>; + qcom,board-id = <8 0>; + + /* Xperia Z5's firmware doesn't support PSCI */ + /delete-node/ psci; + + soc { + serial@f991e000 { + status = "okay"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_uart2_default>; + pinctrl-1 = <&blsp1_uart2_sleep>; + }; + + serial@f995e000 { + status = "okay"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp2_uart2_default>; + pinctrl-1 = <&blsp2_uart2_sleep>; + }; + + /* I2C1 is disabled on this board */ + + i2c@f9924000 { + status = "okay"; + + /* NXP NFC */ + }; + + i2c@f9926000 { + status = "okay"; + + /* Empty but active */ + }; + + i2c@f9967000 { + status = "okay"; + + /* SMB1357 charger and sii8620 HDMI/MHL bridge */ + }; + + i2c@f9928000 { + status = "okay"; + + /* Synaptics touchscreen */ + }; + + sdhci@f9824900 { + status = "okay"; + + /* Downstream pushes 2.95V to the sdhci device, + but upstream driver REALLY wants to make vmmc 1.8v + cause of the hs400-1_8v mode. MMC works fine without + that regulator, so let's not use it for now. + vqmmc is also disabled cause driver stll complains. + + vmmc-supply = <&pm8994_l20>; + vqmmc-supply = <&pm8994_s4>; + */ + }; + + spi@f9923000 { + status = "okay"; + + /* FPC fingerprint reader */ + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + button@0 { + label = "Volume Down"; + gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + wakeup-source; + debounce-interval = <15>; + }; + + button@1 { + label = "Volume Up"; + gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + wakeup-source; + debounce-interval = <15>; + }; + + button@2 { + label = "Camera Snapshot"; + gpios = <&pm8994_gpios 4 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + wakeup-source; + debounce-interval = <15>; + }; + + button@3 { + label = "Camera Focus"; + gpios = <&pm8994_gpios 5 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + wakeup-source; + debounce-interval = <15>; + }; + + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* This is for getting crash logs using Android downstream kernels */ + ramoops@1fe00000 { + compatible = "ramoops"; + reg = <0x0 0x1fe00000 0x0 0x200000>; + console-size = <0x100000>; + record-size = <0x10000>; + ftrace-size = <0x10000>; + pmsg-size = <0x80000>; + }; + + continuous_splash: framebuffer@3401000{ + reg = <0x0 0x3401000 0x0 0x2200000>; + no-map; + }; + + dfps_data_mem: dfps_data_mem@3400000 { + reg = <0x0 0x3400000 0x0 0x1000>; + no-map; + }; + + peripheral_region: peripheral_region@7400000 { + reg = <0x0 0x7400000 0x0 0x1c00000>; + no-map; + }; + + modem_region: modem_region@9000000 { + reg = <0x0 0x9000000 0x0 0x5a00000>; + no-map; + }; + + tzapp: modem_region@ea00000 { + reg = <0x0 0xea00000 0x0 0x1900000>; + no-map; + }; + + fb_region: fb_region@40000000 { + reg = <0x00 0x40000000 0x00 0x1000000>; + no-map; + }; + }; +}; + +&smd_rpm { + rpm { + rpm_requests { + pm8994-regulators { + s1 { + /* Unused */ + status = "disabled"; + }; + + s2 { + /* Unused */ + status = "disabled"; + }; + + s3 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + }; + + s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + s5 { + regulator-min-microvolt = <2150000>; + regulator-max-microvolt = <2150000>; + }; + + s7 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + l1 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + l2 { + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + }; + + l3 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + l4 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + l5 { + /* Unused */ + status = "disabled"; + }; + + l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l7 { + /* Unused */ + status = "disabled"; + }; + + l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l11 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l16 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + l17 { + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + }; + + l18 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + + l19 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + l20 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-always-on; + regulator-boot-on; + }; + + l21 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-always-on; + }; + + l22 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + l23 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + l24 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3150000>; + }; + + l25 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + l26 { + regulator-min-microvolt = <987500>; + regulator-max-microvolt = <987500>; + }; + + l27 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + l28 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + l29 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + l30 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l31 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + }; + + l32 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + lvs1 { + /* Downstream sets it to enabled but + doesn't specify a voltage range */ + status = "okay"; + }; + + lvs2 { + /* Downstream sets it to enabled but + doesn't specify a voltage range */ + status = "okay"; + }; + }; + pmi8994-regulators { + s1 { + regulator-min-microvolt = <1025000>; + regulator-max-microvolt = <1025000>; + }; + + s2 { + /* Unused */ + status = "disabled"; + }; + + boost-bypass { + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3600000>; + }; + }; + }; + }; +}; \ No newline at end of file From patchwork Sat Jun 20 14:46:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 11616043 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB99D60D for ; Sat, 20 Jun 2020 14:49:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 827BD23C43 for ; Sat, 20 Jun 2020 14:49:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EeO10bvW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728531AbgFTOtH (ORCPT ); Sat, 20 Jun 2020 10:49:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728527AbgFTOtF (ORCPT ); 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[83.6.168.138]) by smtp.googlemail.com with ESMTPSA id 63sm11928379wra.86.2020.06.20.07.49.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Jun 2020 07:49:02 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Liam Girdwood , Mark Brown , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 21/21] arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead. Date: Sat, 20 Jun 2020 16:46:37 +0200 Message-Id: <20200620144639.335093-22-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200620144639.335093-1-konradybcio@gmail.com> References: <20200620144639.335093-1-konradybcio@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This was the only device using that dtsi, so no point keeping it separate AND with a confusing name (bullhead is based on msm8992 and the file contains regulator values for that specific board). Signed-off-by: Konrad Dybcio --- .../dts/qcom/msm8992-bullhead-rev-101.dts | 264 ++++++++++++++++- arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi | 268 ------------------ 2 files changed, 263 insertions(+), 269 deletions(-) delete mode 100644 arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi diff --git a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts index 32670d5afdd6..893fc5b8fc34 100644 --- a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts +++ b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts @@ -47,4 +47,266 @@ ramoops@1ff00000 { }; }; -#include "msm8994-smd-rpm.dtsi" +&smd_rpm { + rpm { + rpm_requests { + pm8994-regulators { + + vdd_l1-supply = <&pm8994_s1>; + vdd_l2_26_28-supply = <&pm8994_s3>; + vdd_l3_11-supply = <&pm8994_s3>; + vdd_l4_27_31-supply = <&pm8994_s3>; + vdd_l5_7-supply = <&pm8994_s3>; + vdd_l6_12_32-supply = <&pm8994_s5>; + vdd_l8_16_30-supply = <&vreg_vph_pwr>; + vdd_l9_10_18_22-supply = <&vreg_vph_pwr>; + vdd_l13_19_23_24-supply = <&vreg_vph_pwr>; + vdd_l14_15-supply = <&pm8994_s5>; + vdd_l17_29-supply = <&vreg_vph_pwr>; + vdd_l20_21-supply = <&vreg_vph_pwr>; + vdd_l25-supply = <&pm8994_s5>; + vdd_lvs1_2 = <&pm8994_s4>; + + s1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + }; + + s2 { + /* TODO */ + }; + + s3 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + }; + + s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-allow-set-load; + regulator-system-load = <325000>; + }; + + s5 { + regulator-min-microvolt = <2150000>; + regulator-max-microvolt = <2150000>; + }; + + s7 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + l1 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + l2 { + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + }; + + l3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + l4 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + l5 { + /* TODO */ + }; + + l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l7 { + /* TODO */ + }; + + l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + }; + + l11 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + qcom,init-voltage = <1200000>; + }; + + l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + proxy-supply = <&pm8994_l12>; + qcom,proxy-consumer-enable; + qcom,proxy-consumer-current = <10000>; + status = "okay"; + }; + + l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + qcom,init-voltage = <2950000>; + status = "okay"; + }; + + l14 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + qcom,init-voltage = <1200000>; + proxy-supply = <&pm8994_l14>; + qcom,proxy-consumer-enable; + qcom,proxy-consumer-current = <10000>; + status = "okay"; + }; + + l15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + status = "okay"; + }; + + l16 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + qcom,init-voltage = <2700000>; + status = "okay"; + }; + + l17 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + qcom,init-voltage = <2700000>; + status = "okay"; + }; + + l18 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + qcom,init-voltage = <3000000>; + qcom,init-ldo-mode = <1>; + }; + + l19 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + status = "okay"; + }; + + l20 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-always-on; + regulator-boot-on; + regulator-allow-set-load; + regulator-system-load = <570000>; + }; + + l21 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + qcom,init-voltage = <1800000>; + }; + + l22 { + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + qcom,init-voltage = <3100000>; + }; + + l23 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + qcom,init-voltage = <2800000>; + }; + + l24 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3150000>; + qcom,init-voltage = <3075000>; + }; + + l25 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + }; + + l26 { + /* TODO: value from downstream + regulator-min-microvolt = <987500>; + fails to apply */ + }; + + l27 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + qcom,init-voltage = <1050000>; + }; + + l28 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + qcom,init-voltage = <1000000>; + proxy-supply = <&pm8994_l28>; + qcom,proxy-consumer-enable; + qcom,proxy-consumer-current = <10000>; + }; + + l29 { + /* TODO: Unsupported voltage range. + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + qcom,init-voltage = <2800000>; + */ + }; + + l30 { + /* TODO: get this verified + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + */ + }; + + l31 { + regulator-min-microvolt = <1262500>; + regulator-max-microvolt = <1262500>; + qcom,init-voltage = <1262500>; + }; + + l32 { + /* TODO: get this verified + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,init-voltage = <1800000>; + */ + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi b/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi deleted file mode 100644 index 31e3eb6ab515..000000000000 --- a/arch/arm64/boot/dts/qcom/msm8994-smd-rpm.dtsi +++ /dev/null @@ -1,268 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* Copyright (c) 2015, LGE Inc. All rights reserved. - * Copyright (c) 2016, The Linux Foundation. All rights reserved. - */ - -&smd_rpm { - rpm { - rpm_requests { - pm8994-regulators { - - vdd_l1-supply = <&pm8994_s1>; - vdd_l2_26_28-supply = <&pm8994_s3>; - vdd_l3_11-supply = <&pm8994_s3>; - vdd_l4_27_31-supply = <&pm8994_s3>; - vdd_l5_7-supply = <&pm8994_s3>; - vdd_l6_12_32-supply = <&pm8994_s5>; - vdd_l8_16_30-supply = <&vreg_vph_pwr>; - vdd_l9_10_18_22-supply = <&vreg_vph_pwr>; - vdd_l13_19_23_24-supply = <&vreg_vph_pwr>; - vdd_l14_15-supply = <&pm8994_s5>; - vdd_l17_29-supply = <&vreg_vph_pwr>; - vdd_l20_21-supply = <&vreg_vph_pwr>; - vdd_l25-supply = <&pm8994_s5>; - vdd_lvs1_2 = <&pm8994_s4>; - - s1 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <800000>; - }; - - s2 { - /* TODO */ - }; - - s3 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - }; - - s4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-allow-set-load; - regulator-system-load = <325000>; - }; - - s5 { - regulator-min-microvolt = <2150000>; - regulator-max-microvolt = <2150000>; - }; - - s7 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - }; - - l1 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - }; - - l2 { - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - }; - - l3 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - - l4 { - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - }; - - l5 { - /* TODO */ - }; - - l6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - l7 { - /* TODO */ - }; - - l8 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - l9 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - l10 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,init-voltage = <1800000>; - }; - - l11 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - qcom,init-voltage = <1200000>; - }; - - l12 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,init-voltage = <1800000>; - proxy-supply = <&pm8994_l12>; - qcom,proxy-consumer-enable; - qcom,proxy-consumer-current = <10000>; - status = "okay"; - }; - - l13 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2950000>; - qcom,init-voltage = <2950000>; - status = "okay"; - }; - - l14 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - qcom,init-voltage = <1200000>; - proxy-supply = <&pm8994_l14>; - qcom,proxy-consumer-enable; - qcom,proxy-consumer-current = <10000>; - status = "okay"; - }; - - l15 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,init-voltage = <1800000>; - status = "okay"; - }; - - l16 { - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2700000>; - qcom,init-voltage = <2700000>; - status = "okay"; - }; - - l17 { - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2700000>; - qcom,init-voltage = <2700000>; - status = "okay"; - }; - - l18 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - qcom,init-voltage = <3000000>; - qcom,init-ldo-mode = <1>; - }; - - l19 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,init-voltage = <1800000>; - status = "okay"; - }; - - l20 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - regulator-always-on; - regulator-boot-on; - regulator-allow-set-load; - regulator-system-load = <570000>; - }; - - l21 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - qcom,init-voltage = <1800000>; - }; - - l22 { - regulator-min-microvolt = <3100000>; - regulator-max-microvolt = <3100000>; - qcom,init-voltage = <3100000>; - }; - - l23 { - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - qcom,init-voltage = <2800000>; - }; - - l24 { - regulator-min-microvolt = <3075000>; - regulator-max-microvolt = <3150000>; - qcom,init-voltage = <3075000>; - }; - - l25 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,init-voltage = <1800000>; - }; - - l26 { - /* TODO: value from downstream - regulator-min-microvolt = <987500>; - fails to apply */ - }; - - l27 { - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - qcom,init-voltage = <1050000>; - }; - - l28 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - qcom,init-voltage = <1000000>; - proxy-supply = <&pm8994_l28>; - qcom,proxy-consumer-enable; - qcom,proxy-consumer-current = <10000>; - }; - - l29 { - /* TODO: Unsupported voltage range. - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - qcom,init-voltage = <2800000>; - */ - }; - - l30 { - /* TODO: get this verified - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,init-voltage = <1800000>; - */ - }; - - l31 { - regulator-min-microvolt = <1262500>; - regulator-max-microvolt = <1262500>; - qcom,init-voltage = <1262500>; - }; - - l32 { - /* TODO: get this verified - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,init-voltage = <1800000>; - */ - }; - }; - }; - }; -};