From patchwork Mon Jun 22 23:03:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean V Kelley X-Patchwork-Id: 11619339 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A9B6B13A0 for ; Mon, 22 Jun 2020 23:04:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8A46020776 for ; Mon, 22 Jun 2020 23:04:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731099AbgFVXEE (ORCPT ); Mon, 22 Jun 2020 19:04:04 -0400 Received: from mga18.intel.com ([134.134.136.126]:29070 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730785AbgFVXED (ORCPT ); Mon, 22 Jun 2020 19:04:03 -0400 IronPort-SDR: NeJHZLFAkfHcHZX50+MQ6b/NZ59jNa6sxxumq/SiCEAkIjrRF9gLc45joSxzCfYzijNA03qqT4 jf0HCLVkaTNQ== X-IronPort-AV: E=McAfee;i="6000,8403,9660"; a="131307410" X-IronPort-AV: E=Sophos;i="5.75,268,1589266800"; d="scan'208";a="131307410" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2020 16:04:02 -0700 IronPort-SDR: pxcxVwaqebvmDdDWxhp3m4FOCZIF3QB2qG3qVTbAK/Hx7+pcfC7Tm7l16hrInNfAoGQhmKxM8r pKshreqcZh8g== X-IronPort-AV: E=Sophos;i="5.75,268,1589266800"; d="scan'208";a="278919572" Received: from skotaven-mobl1.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.74.3]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2020 16:04:01 -0700 From: Sean V Kelley To: mj@ucw.cz, bhelgaas@google.com Cc: linux-pci@vger.kernel.org, Sean V Kelley Subject: [PATCH] pciutils: Add decode support for RCECs Date: Mon, 22 Jun 2020 16:03:30 -0700 Message-Id: <20200622230330.799259-1-sean.v.kelley@linux.intel.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Root Complex Event Collectors provide support for terminating error and PME messages from RCiEPs. This patch provides basic decoding for lspci RCEC Endpoint Association Extended Capability. See PCie 5.0-1, sec 7.9.10 for further details. Signed-off-by: Sean V Kelley --- lib/header.h | 8 +- ls-ecaps.c | 30 ++++- setpci.c | 2 +- tests/cap-rcec | 299 +++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 335 insertions(+), 4 deletions(-) create mode 100644 tests/cap-rcec diff --git a/lib/header.h b/lib/header.h index 472816e..deb5150 100644 --- a/lib/header.h +++ b/lib/header.h @@ -219,7 +219,7 @@ #define PCI_EXT_CAP_ID_PB 0x04 /* Power Budgeting */ #define PCI_EXT_CAP_ID_RCLINK 0x05 /* Root Complex Link Declaration */ #define PCI_EXT_CAP_ID_RCILINK 0x06 /* Root Complex Internal Link Declaration */ -#define PCI_EXT_CAP_ID_RCECOLL 0x07 /* Root Complex Event Collector */ +#define PCI_EXT_CAP_ID_RCEC 0x07 /* Root Complex Event Collector */ #define PCI_EXT_CAP_ID_MFVC 0x08 /* Multi-Function Virtual Channel */ #define PCI_EXT_CAP_ID_VC2 0x09 /* Virtual Channel (2nd ID) */ #define PCI_EXT_CAP_ID_RCRB 0x0a /* Root Complex Register Block */ @@ -1048,6 +1048,12 @@ #define PCI_RCLINK_LINK_ADDR 8 /* Link Entry: Address (64-bit) */ #define PCI_RCLINK_LINK_SIZE 16 /* Link Entry: sizeof */ +/* Root Complex Event Collector */ +#define PCI_RCEC_EP_CAP_VER(reg) (((reg) >> 16) & 0xf) +#define PCI_RCEC_BUSN_REG_VER 0x02 /* as per PCIe sec 7.9.10.1 */ +#define PCI_RCEC_RCIEP_BMAP 0x0004 /* as per PCIe sec 7.9.10.2 */ +#define PCI_RCEC_BUSN_REG 0x0008 /* as per PCIe sec 7.9.10.3 */ + /* PCIe Vendor-Specific Capability */ #define PCI_EVNDR_HEADER 4 /* Vendor-Specific Header */ #define PCI_EVNDR_REGISTERS 8 /* Vendor-Specific Registers */ diff --git a/ls-ecaps.c b/ls-ecaps.c index e71209e..589332d 100644 --- a/ls-ecaps.c +++ b/ls-ecaps.c @@ -634,6 +634,32 @@ cap_rclink(struct device *d, int where) } } +static void +cap_rcec(struct device *d, int where) +{ + printf("Root Complex Event Collector\n"); + if (verbose < 2) + return; + + if (!config_fetch(d, where, 12)) + return; + + u32 hdr = get_conf_long(d, where); + byte cap_ver = PCI_RCEC_EP_CAP_VER(hdr); + u32 bmap = get_conf_long(d, where + PCI_RCEC_RCIEP_BMAP); + printf("\t\tDesc:\tCapabilityVersion=%02x RCiEPBitmap=%08x\n", + cap_ver, + bmap); + + if (cap_ver < PCI_RCEC_BUSN_REG_VER) + return; + + u32 busn = get_conf_long(d, where + PCI_RCEC_BUSN_REG); + printf("\t\t\tRCECLastBus=%02x RCECFirstBus=%02x\n", + BITS(busn, 16, 8), + BITS(busn, 8, 8)); +} + static void cap_dvsec_cxl(struct device *d, int where) { @@ -991,8 +1017,8 @@ show_ext_caps(struct device *d, int type) case PCI_EXT_CAP_ID_RCILINK: printf("Root Complex Internal Link \n"); break; - case PCI_EXT_CAP_ID_RCECOLL: - printf("Root Complex Event Collector \n"); + case PCI_EXT_CAP_ID_RCEC: + cap_rcec(d, where); break; case PCI_EXT_CAP_ID_MFVC: printf("Multi-Function Virtual Channel \n"); diff --git a/setpci.c b/setpci.c index 90ca726..2cb70fa 100644 --- a/setpci.c +++ b/setpci.c @@ -350,7 +350,7 @@ static const struct reg_name pci_reg_names[] = { { 0x20004, 0, 0, "ECAP_PB" }, { 0x20005, 0, 0, "ECAP_RCLINK" }, { 0x20006, 0, 0, "ECAP_RCILINK" }, - { 0x20007, 0, 0, "ECAP_RCECOLL" }, + { 0x20007, 0, 0, "ECAP_RCEC" }, { 0x20008, 0, 0, "ECAP_MFVC" }, { 0x20009, 0, 0, "ECAP_VC2" }, { 0x2000a, 0, 0, "ECAP_RBCB" }, diff --git a/tests/cap-rcec b/tests/cap-rcec new file mode 100644 index 0000000..09a4030 --- /dev/null +++ b/tests/cap-rcec @@ -0,0 +1,299 @@ +6a:00.4 Generic system peripheral [0807]: Intel Corporation Device 0b23 + Subsystem: Intel Corporation Device 0000 + Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR-